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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; Test 32-bit rotates left.3;4; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s5 6; Check the low end of the RLLG range.7define i64 @f1(i64 %a) {8; CHECK-LABEL: f1:9; CHECK:       # %bb.0:10; CHECK-NEXT:    rllg %r2, %r2, 111; CHECK-NEXT:    br %r1412  %parta = shl i64 %a, 113  %partb = lshr i64 %a, 6314  %or = or i64 %parta, %partb15  ret i64 %or16}17 18; Check the high end of the defined RLLG range.19define i64 @f2(i64 %a) {20; CHECK-LABEL: f2:21; CHECK:       # %bb.0:22; CHECK-NEXT:    rllg %r2, %r2, 6323; CHECK-NEXT:    br %r1424  %parta = shl i64 %a, 6325  %partb = lshr i64 %a, 126  %or = or i64 %parta, %partb27  ret i64 %or28}29 30; We don't generate shifts by out-of-range values.31define i64 @f3(i64 %a) {32; CHECK-LABEL: f3:33; CHECK:       # %bb.0:34; CHECK-NEXT:    lghi %r2, -135; CHECK-NEXT:    br %r1436  %parta = shl i64 %a, 6437  %partb = lshr i64 %a, 038  %or = or i64 %parta, %partb39  ret i64 %or40}41 42; Check variable shifts.43define i64 @f4(i64 %a, i64 %amt) {44; CHECK-LABEL: f4:45; CHECK:       # %bb.0:46; CHECK-NEXT:    rllg %r2, %r2, 0(%r3)47; CHECK-NEXT:    br %r1448  %amtb = sub i64 64, %amt49  %parta = shl i64 %a, %amt50  %partb = lshr i64 %a, %amtb51  %or = or i64 %parta, %partb52  ret i64 %or53}54 55; Check shift amounts that have a constant term.56define i64 @f5(i64 %a, i64 %amt) {57; CHECK-LABEL: f5:58; CHECK:       # %bb.0:59; CHECK-NEXT:    rllg %r2, %r2, 10(%r3)60; CHECK-NEXT:    br %r1461  %add = add i64 %amt, 1062  %sub = sub i64 64, %add63  %parta = shl i64 %a, %add64  %partb = lshr i64 %a, %sub65  %or = or i64 %parta, %partb66  ret i64 %or67}68 69; ...and again with a sign-extended 32-bit shift amount.70define i64 @f6(i64 %a, i32 %amt) {71; CHECK-LABEL: f6:72; CHECK:       # %bb.0:73; CHECK-NEXT:    rllg %r2, %r2, 10(%r3)74; CHECK-NEXT:    br %r1475  %add = add i32 %amt, 1076  %sub = sub i32 64, %add77  %addext = sext i32 %add to i6478  %subext = sext i32 %sub to i6479  %parta = shl i64 %a, %addext80  %partb = lshr i64 %a, %subext81  %or = or i64 %parta, %partb82  ret i64 %or83}84 85; ...and now with a zero-extended 32-bit shift amount.86define i64 @f7(i64 %a, i32 %amt) {87; CHECK-LABEL: f7:88; CHECK:       # %bb.0:89; CHECK-NEXT:    rllg %r2, %r2, 10(%r3)90; CHECK-NEXT:    br %r1491  %add = add i32 %amt, 1092  %sub = sub i32 64, %add93  %addext = zext i32 %add to i6494  %subext = zext i32 %sub to i6495  %parta = shl i64 %a, %addext96  %partb = lshr i64 %a, %subext97  %or = or i64 %parta, %partb98  ret i64 %or99}100 101; Check shift amounts that have the largest in-range constant term, and then102; mask the amount.103define i64 @f8(i64 %a, i64 %amt) {104; CHECK-LABEL: f8:105; CHECK:       # %bb.0:106; CHECK-NEXT:    rllg %r2, %r2, -1(%r3)107; CHECK-NEXT:    br %r14108  %add = add i64 %amt, 524287109  %sub = sub i64 64, %add110  %parta = shl i64 %a, %add111  %partb = lshr i64 %a, %sub112  %or = or i64 %parta, %partb113  ret i64 %or114}115 116; Check the next value up, which without masking must use a separate117; addition.118define i64 @f9(i64 %a, i64 %amt) {119; CHECK-LABEL: f9:120; CHECK:       # %bb.0:121; CHECK-NEXT:    afi %r3, 524288122; CHECK-NEXT:    rllg %r2, %r2, 0(%r3)123; CHECK-NEXT:    br %r14124  %add = add i64 %amt, 524288125  %sub = sub i64 64, %add126  %parta = shl i64 %a, %add127  %partb = lshr i64 %a, %sub128  %or = or i64 %parta, %partb129  ret i64 %or130}131 132; Check cases where 1 is subtracted from the shift amount.133define i64 @f10(i64 %a, i64 %amt) {134; CHECK-LABEL: f10:135; CHECK:       # %bb.0:136; CHECK-NEXT:    rllg %r2, %r2, -1(%r3)137; CHECK-NEXT:    br %r14138  %suba = sub i64 %amt, 1139  %subb = sub i64 64, %suba140  %parta = shl i64 %a, %suba141  %partb = lshr i64 %a, %subb142  %or = or i64 %parta, %partb143  ret i64 %or144}145 146; Check the lowest value that can be subtracted from the shift amount.147; Again, we could mask the shift amount instead.148define i64 @f11(i64 %a, i64 %amt) {149; CHECK-LABEL: f11:150; CHECK:       # %bb.0:151; CHECK-NEXT:    rllg %r2, %r2, -524288(%r3)152; CHECK-NEXT:    br %r14153  %suba = sub i64 %amt, 524288154  %subb = sub i64 64, %suba155  %parta = shl i64 %a, %suba156  %partb = lshr i64 %a, %subb157  %or = or i64 %parta, %partb158  ret i64 %or159}160 161; Check the next value down, masking the amount removes the addition.162define i64 @f12(i64 %a, i64 %amt) {163; CHECK-LABEL: f12:164; CHECK:       # %bb.0:165; CHECK-NEXT:    rllg %r2, %r2, -1(%r3)166; CHECK-NEXT:    br %r14167  %suba = sub i64 %amt, 524289168  %subb = sub i64 64, %suba169  %parta = shl i64 %a, %suba170  %partb = lshr i64 %a, %subb171  %or = or i64 %parta, %partb172  ret i64 %or173}174 175; Check that we don't try to generate "indexed" shifts.176define i64 @f13(i64 %a, i64 %b, i64 %c) {177; CHECK-LABEL: f13:178; CHECK:       # %bb.0:179; CHECK-NEXT:    agr %r3, %r4180; CHECK-NEXT:    rllg %r2, %r2, 0(%r3)181; CHECK-NEXT:    br %r14182  %add = add i64 %b, %c183  %sub = sub i64 64, %add184  %parta = shl i64 %a, %add185  %partb = lshr i64 %a, %sub186  %or = or i64 %parta, %partb187  ret i64 %or188}189 190; Check that the shift amount uses an address register.  It cannot be in %r0.191define i64 @f14(i64 %a, ptr %ptr) {192; CHECK-LABEL: f14:193; CHECK:       # %bb.0:194; CHECK-NEXT:    l %r1, 4(%r3)195; CHECK-NEXT:    rllg %r2, %r2, 0(%r1)196; CHECK-NEXT:    br %r14197  %amt = load i64, ptr %ptr198  %amtb = sub i64 64, %amt199  %parta = shl i64 %a, %amt200  %partb = lshr i64 %a, %amtb201  %or = or i64 %parta, %partb202  ret i64 %or203}204