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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 < %s | FileCheck %s3 4; Store a <4 x i31> vector.5define void @fun0(<4 x i31> %src, ptr %p)6; CHECK-LABEL: fun0:7; CHECK: # %bb.0:8; CHECK-NEXT: vlgvf %r0, %v24, 09; CHECK-NEXT: vlvgp %v0, %r0, %r010; CHECK-NEXT: vrepib %v1, 9311; CHECK-NEXT: vlgvf %r0, %v24, 112; CHECK-NEXT: vslb %v0, %v0, %v113; CHECK-NEXT: larl %r1, .LCPI0_014; CHECK-NEXT: vl %v2, 0(%r1), 315; CHECK-NEXT: vsl %v0, %v0, %v116; CHECK-NEXT: vlvgp %v1, %r0, %r017; CHECK-NEXT: vn %v1, %v1, %v218; CHECK-NEXT: vrepib %v3, 6219; CHECK-NEXT: vslb %v1, %v1, %v320; CHECK-NEXT: vlgvf %r0, %v24, 221; CHECK-NEXT: vsl %v1, %v1, %v322; CHECK-NEXT: vo %v0, %v0, %v123; CHECK-NEXT: vlvgp %v1, %r0, %r024; CHECK-NEXT: vn %v1, %v1, %v225; CHECK-NEXT: vrepib %v3, 3126; CHECK-NEXT: vslb %v1, %v1, %v327; CHECK-NEXT: vlgvf %r0, %v24, 328; CHECK-NEXT: vsl %v1, %v1, %v329; CHECK-NEXT: vo %v0, %v0, %v130; CHECK-NEXT: vlvgp %v1, %r0, %r031; CHECK-NEXT: larl %r1, .LCPI0_132; CHECK-NEXT: vn %v1, %v1, %v233; CHECK-NEXT: vo %v0, %v0, %v134; CHECK-NEXT: vl %v1, 0(%r1), 335; CHECK-NEXT: vn %v0, %v0, %v136; CHECK-NEXT: vst %v0, 0(%r2), 437; CHECK-NEXT: br %r1438{39 store <4 x i31> %src, ptr %p40 ret void41}42 43; Store a <16 x i1> vector.44define i16 @fun1(<16 x i1> %src)45; CHECK-LABEL: fun1:46; CHECK: # %bb.0:47; CHECK-NEXT: aghi %r15, -16848; CHECK-NEXT: .cfi_def_cfa_offset 32849; CHECK-NEXT: vlgvb %r0, %v24, 050; CHECK-NEXT: vlgvb %r1, %v24, 151; CHECK-NEXT: risblg %r0, %r0, 16, 144, 1552; CHECK-NEXT: rosbg %r0, %r1, 49, 49, 1453; CHECK-NEXT: vlgvb %r1, %v24, 254; CHECK-NEXT: rosbg %r0, %r1, 50, 50, 1355; CHECK-NEXT: vlgvb %r1, %v24, 356; CHECK-NEXT: rosbg %r0, %r1, 51, 51, 1257; CHECK-NEXT: vlgvb %r1, %v24, 458; CHECK-NEXT: rosbg %r0, %r1, 52, 52, 1159; CHECK-NEXT: vlgvb %r1, %v24, 560; CHECK-NEXT: rosbg %r0, %r1, 53, 53, 1061; CHECK-NEXT: vlgvb %r1, %v24, 662; CHECK-NEXT: rosbg %r0, %r1, 54, 54, 963; CHECK-NEXT: vlgvb %r1, %v24, 764; CHECK-NEXT: rosbg %r0, %r1, 55, 55, 865; CHECK-NEXT: vlgvb %r1, %v24, 866; CHECK-NEXT: rosbg %r0, %r1, 56, 56, 767; CHECK-NEXT: vlgvb %r1, %v24, 968; CHECK-NEXT: rosbg %r0, %r1, 57, 57, 669; CHECK-NEXT: vlgvb %r1, %v24, 1070; CHECK-NEXT: rosbg %r0, %r1, 58, 58, 571; CHECK-NEXT: vlgvb %r1, %v24, 1172; CHECK-NEXT: rosbg %r0, %r1, 59, 59, 473; CHECK-NEXT: vlgvb %r1, %v24, 1274; CHECK-NEXT: rosbg %r0, %r1, 60, 60, 375; CHECK-NEXT: vlgvb %r1, %v24, 1376; CHECK-NEXT: rosbg %r0, %r1, 61, 61, 277; CHECK-NEXT: vlgvb %r1, %v24, 1478; CHECK-NEXT: rosbg %r0, %r1, 62, 62, 179; CHECK-NEXT: vlgvb %r1, %v24, 1580; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 081; CHECK-NEXT: llhr %r2, %r082; CHECK-NEXT: aghi %r15, 16883; CHECK-NEXT: br %r1484{85 %res = bitcast <16 x i1> %src to i1686 ret i16 %res87}88 89; Truncate a <8 x i32> vector to <8 x i31> and store it (test splitting).90define void @fun2(<8 x i32> %src, ptr %p)91; CHECK-LABEL: fun2:92; CHECK: # %bb.0:93; CHECK-NEXT: vlgvf %r0, %v26, 394; CHECK-NEXT: vlvgp %v0, %r0, %r095; CHECK-NEXT: srl %r0, 896; CHECK-NEXT: vsteb %v0, 30(%r2), 1597; CHECK-NEXT: vlvgp %v1, %r0, %r098; CHECK-NEXT: vsteh %v1, 28(%r2), 799; CHECK-NEXT: larl %r1, .LCPI2_0100; CHECK-NEXT: vl %v1, 0(%r1), 3101; CHECK-NEXT: vlgvf %r0, %v26, 2102; CHECK-NEXT: larl %r1, .LCPI2_1103; CHECK-NEXT: vl %v2, 0(%r1), 3104; CHECK-NEXT: vn %v0, %v0, %v1105; CHECK-NEXT: vlvgp %v1, %r0, %r0106; CHECK-NEXT: vn %v1, %v1, %v2107; CHECK-NEXT: vrepib %v3, 31108; CHECK-NEXT: vslb %v1, %v1, %v3109; CHECK-NEXT: vsl %v1, %v1, %v3110; CHECK-NEXT: vo %v0, %v1, %v0111; CHECK-NEXT: vrepib %v3, 24112; CHECK-NEXT: vlgvf %r0, %v24, 3113; CHECK-NEXT: vsrlb %v0, %v0, %v3114; CHECK-NEXT: vstef %v0, 24(%r2), 3115; CHECK-NEXT: vlvgp %v0, %r0, %r0116; CHECK-NEXT: vrepib %v3, 124117; CHECK-NEXT: vlgvf %r0, %v26, 0118; CHECK-NEXT: vslb %v4, %v0, %v3119; CHECK-NEXT: vsl %v3, %v4, %v3120; CHECK-NEXT: vlvgp %v4, %r0, %r0121; CHECK-NEXT: vn %v4, %v4, %v2122; CHECK-NEXT: vlgvf %r0, %v26, 1123; CHECK-NEXT: larl %r1, .LCPI2_2124; CHECK-NEXT: vrepib %v5, 93125; CHECK-NEXT: vslb %v4, %v4, %v5126; CHECK-NEXT: vsl %v4, %v4, %v5127; CHECK-NEXT: vo %v3, %v3, %v4128; CHECK-NEXT: vlvgp %v4, %r0, %r0129; CHECK-NEXT: vlgvf %r0, %v24, 0130; CHECK-NEXT: vn %v4, %v4, %v2131; CHECK-NEXT: vrepib %v5, 62132; CHECK-NEXT: vslb %v4, %v4, %v5133; CHECK-NEXT: vsl %v4, %v4, %v5134; CHECK-NEXT: vo %v4, %v3, %v4135; CHECK-NEXT: vo %v1, %v4, %v1136; CHECK-NEXT: vrepib %v4, 56137; CHECK-NEXT: vrepib %v5, 58138; CHECK-NEXT: vsrlb %v1, %v1, %v4139; CHECK-NEXT: vsteg %v1, 16(%r2), 1140; CHECK-NEXT: vlvgp %v1, %r0, %r0141; CHECK-NEXT: vlgvf %r0, %v24, 1142; CHECK-NEXT: vrepib %v4, 89143; CHECK-NEXT: vslb %v1, %v1, %v4144; CHECK-NEXT: vsl %v1, %v1, %v4145; CHECK-NEXT: vlvgp %v4, %r0, %r0146; CHECK-NEXT: vlgvf %r0, %v24, 2147; CHECK-NEXT: vn %v4, %v4, %v2148; CHECK-NEXT: vslb %v4, %v4, %v5149; CHECK-NEXT: vsl %v4, %v4, %v5150; CHECK-NEXT: vo %v1, %v1, %v4151; CHECK-NEXT: vlvgp %v4, %r0, %r0152; CHECK-NEXT: vn %v2, %v4, %v2153; CHECK-NEXT: vrepib %v4, 27154; CHECK-NEXT: vslb %v2, %v2, %v4155; CHECK-NEXT: vsl %v2, %v2, %v4156; CHECK-NEXT: vo %v1, %v1, %v2157; CHECK-NEXT: vl %v2, 0(%r1), 3158; CHECK-NEXT: vn %v0, %v0, %v2159; CHECK-NEXT: vrepib %v2, 4160; CHECK-NEXT: vsrl %v0, %v0, %v2161; CHECK-NEXT: vo %v0, %v1, %v0162; CHECK-NEXT: vsldb %v0, %v0, %v3, 1163; CHECK-NEXT: vst %v0, 0(%r2), 4164; CHECK-NEXT: br %r14165{166 %tmp = trunc <8 x i32> %src to <8 x i31>167 store <8 x i31> %tmp, ptr %p168 ret void169}170 171; Load and store a <3 x i31> vector (test widening).172define void @fun3(ptr %src, ptr %p)173; CHECK-LABEL: fun3:174; CHECK: # %bb.0:175; CHECK-NEXT: vgbm %v0, 0176; CHECK-NEXT: vleg %v0, 0(%r2), 1177; CHECK-NEXT: vgbm %v1, 0178; CHECK-NEXT: vlef %v1, 8(%r2), 3179; CHECK-NEXT: vrepib %v2, 32180; CHECK-NEXT: vslb %v0, %v0, %v2181; CHECK-NEXT: vo %v0, %v1, %v0182; CHECK-NEXT: vstef %v0, 8(%r3), 3183; CHECK-NEXT: vsrlb %v0, %v0, %v2184; CHECK-NEXT: vsteg %v0, 0(%r3), 1185; CHECK-NEXT: br %r14186{187 %tmp = load <3 x i31>, ptr %src188 store <3 x i31> %tmp, ptr %p189 ret void190}191