114 lines · plain
1; Test the Test Data Class instruction logic operation folding.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s4 5declare i32 @llvm.s390.tdc.f16(half, i64)6declare i32 @llvm.s390.tdc.f32(float, i64)7declare i32 @llvm.s390.tdc.f64(double, i64)8declare i32 @llvm.s390.tdc.f128(fp128, i64)9 10; Check using or i111define i32 @f0(half %x) {12; CHECK-LABEL: f013; CHECK: brasl %r14, __extendhfsf2@PLT14; CHECK: tceb %f0, 715; CHECK-NEXT: ipm [[REG1:%r[0-9]+]]16; CHECK-NEXT: risbg %r2, [[REG1]], 63, 191, 3617 %a = call i32 @llvm.s390.tdc.f16(half %x, i64 3)18 %b = call i32 @llvm.s390.tdc.f16(half %x, i64 6)19 %a1 = icmp ne i32 %a, 020 %b1 = icmp ne i32 %b, 021 %res = or i1 %a1, %b122 %xres = zext i1 %res to i3223 ret i32 %xres24}25 26; Check using or i127define i32 @f1(float %x) {28; CHECK-LABEL: f129; CHECK: tceb %f0, 730; CHECK-NEXT: ipm [[REG1:%r[0-9]+]]31; CHECK-NEXT: risbg %r2, [[REG1]], 63, 191, 3632 %a = call i32 @llvm.s390.tdc.f32(float %x, i64 3)33 %b = call i32 @llvm.s390.tdc.f32(float %x, i64 6)34 %a1 = icmp ne i32 %a, 035 %b1 = icmp ne i32 %b, 036 %res = or i1 %a1, %b137 %xres = zext i1 %res to i3238 ret i32 %xres39}40 41; Check using and i142define i32 @f2(double %x) {43; CHECK-LABEL: f244; CHECK: tcdb %f0, 245; CHECK-NEXT: ipm [[REG1:%r[0-9]+]]46; CHECK-NEXT: risbg %r2, [[REG1]], 63, 191, 3647 %a = call i32 @llvm.s390.tdc.f64(double %x, i64 3)48 %b = call i32 @llvm.s390.tdc.f64(double %x, i64 6)49 %a1 = icmp ne i32 %a, 050 %b1 = icmp ne i32 %b, 051 %res = and i1 %a1, %b152 %xres = zext i1 %res to i3253 ret i32 %xres54}55 56; Check using xor i157define i32 @f3(fp128 %x) {58; CHECK-LABEL: f359; CHECK: tcxb %f0, 560; CHECK-NEXT: ipm [[REG1:%r[0-9]+]]61; CHECK-NEXT: risbg %r2, [[REG1]], 63, 191, 3662 %a = call i32 @llvm.s390.tdc.f128(fp128 %x, i64 3)63 %b = call i32 @llvm.s390.tdc.f128(fp128 %x, i64 6)64 %a1 = icmp ne i32 %a, 065 %b1 = icmp ne i32 %b, 066 %res = xor i1 %a1, %b167 %xres = zext i1 %res to i3268 ret i32 %xres69}70 71; Check using xor i1 - negated test72define i32 @f4(fp128 %x) {73; CHECK-LABEL: f474; CHECK: tcxb %f0, 409075; CHECK-NEXT: ipm [[REG1:%r[0-9]+]]76; CHECK-NEXT: risbg %r2, [[REG1]], 63, 191, 3677 %a = call i32 @llvm.s390.tdc.f128(fp128 %x, i64 3)78 %b = call i32 @llvm.s390.tdc.f128(fp128 %x, i64 6)79 %a1 = icmp ne i32 %a, 080 %b1 = icmp eq i32 %b, 081 %res = xor i1 %a1, %b182 %xres = zext i1 %res to i3283 ret i32 %xres84}85 86; Check different first args87define i32 @f5(float %x, float %y) {88; CHECK-LABEL: f589; CHECK-NOT: tceb {{%f[0-9]+}}, 590; CHECK-DAG: tceb %f0, 391; CHECK-DAG: tceb %f2, 692 %a = call i32 @llvm.s390.tdc.f32(float %x, i64 3)93 %b = call i32 @llvm.s390.tdc.f32(float %y, i64 6)94 %a1 = icmp ne i32 %a, 095 %b1 = icmp ne i32 %b, 096 %res = xor i1 %a1, %b197 %xres = zext i1 %res to i3298 ret i32 %xres99}100 101; Non-const mask (not supported)102define i32 @f6(float %x, i64 %y) {103; CHECK-LABEL: f6104; CHECK-DAG: tceb %f0, 0(%r2)105; CHECK-DAG: tceb %f0, 6106 %a = call i32 @llvm.s390.tdc.f32(float %x, i64 %y)107 %b = call i32 @llvm.s390.tdc.f32(float %x, i64 6)108 %a1 = icmp ne i32 %a, 0109 %b1 = icmp ne i32 %b, 0110 %res = xor i1 %a1, %b1111 %xres = zext i1 %res to i32112 ret i32 %xres113}114