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1; Test v8i16 absolute.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s4 5; Test with slt.6define <8 x i16> @f1(<8 x i16> %val) {7; CHECK-LABEL: f1:8; CHECK: vlph %v24, %v249; CHECK: br %r1410  %cmp = icmp slt <8 x i16> %val, zeroinitializer11  %neg = sub <8 x i16> zeroinitializer, %val12  %ret = select <8 x i1> %cmp, <8 x i16> %neg, <8 x i16> %val13  ret <8 x i16> %ret14}15 16; Test with sle.17define <8 x i16> @f2(<8 x i16> %val) {18; CHECK-LABEL: f2:19; CHECK: vlph %v24, %v2420; CHECK: br %r1421  %cmp = icmp sle <8 x i16> %val, zeroinitializer22  %neg = sub <8 x i16> zeroinitializer, %val23  %ret = select <8 x i1> %cmp, <8 x i16> %neg, <8 x i16> %val24  ret <8 x i16> %ret25}26 27; Test with sgt.28define <8 x i16> @f3(<8 x i16> %val) {29; CHECK-LABEL: f3:30; CHECK: vlph %v24, %v2431; CHECK: br %r1432  %cmp = icmp sgt <8 x i16> %val, zeroinitializer33  %neg = sub <8 x i16> zeroinitializer, %val34  %ret = select <8 x i1> %cmp, <8 x i16> %val, <8 x i16> %neg35  ret <8 x i16> %ret36}37 38; Test with sge.39define <8 x i16> @f4(<8 x i16> %val) {40; CHECK-LABEL: f4:41; CHECK: vlph %v24, %v2442; CHECK: br %r1443  %cmp = icmp sge <8 x i16> %val, zeroinitializer44  %neg = sub <8 x i16> zeroinitializer, %val45  %ret = select <8 x i1> %cmp, <8 x i16> %val, <8 x i16> %neg46  ret <8 x i16> %ret47}48 49; Test that negative absolute uses VLPH too.  There is no vector equivalent50; of LOAD NEGATIVE.51define <8 x i16> @f5(<8 x i16> %val) {52; CHECK-LABEL: f5:53; CHECK: vlph [[REG:%v[0-9]+]], %v2454; CHECK: vlch %v24, [[REG]]55; CHECK: br %r1456  %cmp = icmp slt <8 x i16> %val, zeroinitializer57  %neg = sub <8 x i16> zeroinitializer, %val58  %abs = select <8 x i1> %cmp, <8 x i16> %neg, <8 x i16> %val59  %ret = sub <8 x i16> zeroinitializer, %abs60  ret <8 x i16> %ret61}62 63; Try another form of negative absolute (slt version).64define <8 x i16> @f6(<8 x i16> %val) {65; CHECK-LABEL: f6:66; CHECK: vlph [[REG:%v[0-9]+]], %v2467; CHECK: vlch %v24, [[REG]]68; CHECK: br %r1469  %cmp = icmp slt <8 x i16> %val, zeroinitializer70  %neg = sub <8 x i16> zeroinitializer, %val71  %ret = select <8 x i1> %cmp, <8 x i16> %val, <8 x i16> %neg72  ret <8 x i16> %ret73}74 75; Test with sle.76define <8 x i16> @f7(<8 x i16> %val) {77; CHECK-LABEL: f7:78; CHECK: vlph [[REG:%v[0-9]+]], %v2479; CHECK: vlch %v24, [[REG]]80; CHECK: br %r1481  %cmp = icmp sle <8 x i16> %val, zeroinitializer82  %neg = sub <8 x i16> zeroinitializer, %val83  %ret = select <8 x i1> %cmp, <8 x i16> %val, <8 x i16> %neg84  ret <8 x i16> %ret85}86 87; Test with sgt.88define <8 x i16> @f8(<8 x i16> %val) {89; CHECK-LABEL: f8:90; CHECK: vlph [[REG:%v[0-9]+]], %v2491; CHECK: vlch %v24, [[REG]]92; CHECK: br %r1493  %cmp = icmp sgt <8 x i16> %val, zeroinitializer94  %neg = sub <8 x i16> zeroinitializer, %val95  %ret = select <8 x i1> %cmp, <8 x i16> %neg, <8 x i16> %val96  ret <8 x i16> %ret97}98 99; Test with sge.100define <8 x i16> @f9(<8 x i16> %val) {101; CHECK-LABEL: f9:102; CHECK: vlph [[REG:%v[0-9]+]], %v24103; CHECK: vlch %v24, [[REG]]104; CHECK: br %r14105  %cmp = icmp sge <8 x i16> %val, zeroinitializer106  %neg = sub <8 x i16> zeroinitializer, %val107  %ret = select <8 x i1> %cmp, <8 x i16> %neg, <8 x i16> %val108  ret <8 x i16> %ret109}110 111; Test with an SRA-based boolean vector.112define <8 x i16> @f10(<8 x i16> %val) {113; CHECK-LABEL: f10:114; CHECK: vlph %v24, %v24115; CHECK: br %r14116  %shr = ashr <8 x i16> %val,117              <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>118  %neg = sub <8 x i16> zeroinitializer, %val119  %and1 = and <8 x i16> %shr, %neg120  %not = xor <8 x i16> %shr,121             <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>122  %and2 = and <8 x i16> %not, %val123  %ret = or <8 x i16> %and1, %and2124  ret <8 x i16> %ret125}126 127; ...and again in reverse128define <8 x i16> @f11(<8 x i16> %val) {129; CHECK-LABEL: f11:130; CHECK: vlph [[REG:%v[0-9]+]], %v24131; CHECK: vlch %v24, [[REG]]132; CHECK: br %r14133  %shr = ashr <8 x i16> %val,134              <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>135  %and1 = and <8 x i16> %shr, %val136  %not = xor <8 x i16> %shr,137             <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>138  %neg = sub <8 x i16> zeroinitializer, %val139  %and2 = and <8 x i16> %not, %neg140  %ret = or <8 x i16> %and1, %and2141  ret <8 x i16> %ret142}143