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1; Test v4i32 absolute.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s4 5; Test with slt.6define <4 x i32> @f1(<4 x i32> %val) {7; CHECK-LABEL: f1:8; CHECK: vlpf %v24, %v249; CHECK: br %r1410  %cmp = icmp slt <4 x i32> %val, zeroinitializer11  %neg = sub <4 x i32> zeroinitializer, %val12  %ret = select <4 x i1> %cmp, <4 x i32> %neg, <4 x i32> %val13  ret <4 x i32> %ret14}15 16; Test with sle.17define <4 x i32> @f2(<4 x i32> %val) {18; CHECK-LABEL: f2:19; CHECK: vlpf %v24, %v2420; CHECK: br %r1421  %cmp = icmp sle <4 x i32> %val, zeroinitializer22  %neg = sub <4 x i32> zeroinitializer, %val23  %ret = select <4 x i1> %cmp, <4 x i32> %neg, <4 x i32> %val24  ret <4 x i32> %ret25}26 27; Test with sgt.28define <4 x i32> @f3(<4 x i32> %val) {29; CHECK-LABEL: f3:30; CHECK: vlpf %v24, %v2431; CHECK: br %r1432  %cmp = icmp sgt <4 x i32> %val, zeroinitializer33  %neg = sub <4 x i32> zeroinitializer, %val34  %ret = select <4 x i1> %cmp, <4 x i32> %val, <4 x i32> %neg35  ret <4 x i32> %ret36}37 38; Test with sge.39define <4 x i32> @f4(<4 x i32> %val) {40; CHECK-LABEL: f4:41; CHECK: vlpf %v24, %v2442; CHECK: br %r1443  %cmp = icmp sge <4 x i32> %val, zeroinitializer44  %neg = sub <4 x i32> zeroinitializer, %val45  %ret = select <4 x i1> %cmp, <4 x i32> %val, <4 x i32> %neg46  ret <4 x i32> %ret47}48 49; Test that negative absolute uses VLPF too.  There is no vector equivalent50; of LOAD NEGATIVE.51define <4 x i32> @f5(<4 x i32> %val) {52; CHECK-LABEL: f5:53; CHECK: vlpf [[REG:%v[0-9]+]], %v2454; CHECK: vlcf %v24, [[REG]]55; CHECK: br %r1456  %cmp = icmp slt <4 x i32> %val, zeroinitializer57  %neg = sub <4 x i32> zeroinitializer, %val58  %abs = select <4 x i1> %cmp, <4 x i32> %neg, <4 x i32> %val59  %ret = sub <4 x i32> zeroinitializer, %abs60  ret <4 x i32> %ret61}62 63; Try another form of negative absolute (slt version).64define <4 x i32> @f6(<4 x i32> %val) {65; CHECK-LABEL: f6:66; CHECK: vlpf [[REG:%v[0-9]+]], %v2467; CHECK: vlcf %v24, [[REG]]68; CHECK: br %r1469  %cmp = icmp slt <4 x i32> %val, zeroinitializer70  %neg = sub <4 x i32> zeroinitializer, %val71  %ret = select <4 x i1> %cmp, <4 x i32> %val, <4 x i32> %neg72  ret <4 x i32> %ret73}74 75; Test with sle.76define <4 x i32> @f7(<4 x i32> %val) {77; CHECK-LABEL: f7:78; CHECK: vlpf [[REG:%v[0-9]+]], %v2479; CHECK: vlcf %v24, [[REG]]80; CHECK: br %r1481  %cmp = icmp sle <4 x i32> %val, zeroinitializer82  %neg = sub <4 x i32> zeroinitializer, %val83  %ret = select <4 x i1> %cmp, <4 x i32> %val, <4 x i32> %neg84  ret <4 x i32> %ret85}86 87; Test with sgt.88define <4 x i32> @f8(<4 x i32> %val) {89; CHECK-LABEL: f8:90; CHECK: vlpf [[REG:%v[0-9]+]], %v2491; CHECK: vlcf %v24, [[REG]]92; CHECK: br %r1493  %cmp = icmp sgt <4 x i32> %val, zeroinitializer94  %neg = sub <4 x i32> zeroinitializer, %val95  %ret = select <4 x i1> %cmp, <4 x i32> %neg, <4 x i32> %val96  ret <4 x i32> %ret97}98 99; Test with sge.100define <4 x i32> @f9(<4 x i32> %val) {101; CHECK-LABEL: f9:102; CHECK: vlpf [[REG:%v[0-9]+]], %v24103; CHECK: vlcf %v24, [[REG]]104; CHECK: br %r14105  %cmp = icmp sge <4 x i32> %val, zeroinitializer106  %neg = sub <4 x i32> zeroinitializer, %val107  %ret = select <4 x i1> %cmp, <4 x i32> %neg, <4 x i32> %val108  ret <4 x i32> %ret109}110 111; Test with an SRA-based boolean vector.112define <4 x i32> @f10(<4 x i32> %val) {113; CHECK-LABEL: f10:114; CHECK: vlpf %v24, %v24115; CHECK: br %r14116  %shr = ashr <4 x i32> %val, <i32 31, i32 31, i32 31, i32 31>117  %neg = sub <4 x i32> zeroinitializer, %val118  %and1 = and <4 x i32> %shr, %neg119  %not = xor <4 x i32> %shr, <i32 -1, i32 -1, i32 -1, i32 -1>120  %and2 = and <4 x i32> %not, %val121  %ret = or <4 x i32> %and1, %and2122  ret <4 x i32> %ret123}124 125; ...and again in reverse126define <4 x i32> @f11(<4 x i32> %val) {127; CHECK-LABEL: f11:128; CHECK: vlpf [[REG:%v[0-9]+]], %v24129; CHECK: vlcf %v24, [[REG]]130; CHECK: br %r14131  %shr = ashr <4 x i32> %val, <i32 31, i32 31, i32 31, i32 31>132  %and1 = and <4 x i32> %shr, %val133  %not = xor <4 x i32> %shr, <i32 -1, i32 -1, i32 -1, i32 -1>134  %neg = sub <4 x i32> zeroinitializer, %val135  %and2 = and <4 x i32> %not, %neg136  %ret = or <4 x i32> %and1, %and2137  ret <4 x i32> %ret138}139