413 lines · plain
1; Test v1i128 comparisons.2; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 53;4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s5 6; Test eq.7define <1 x i128> @f1(<1 x i128> %val1, <1 x i128> %val2) {8; CHECK-LABEL: f1:9; CHECK: # %bb.0:10; CHECK-NEXT: vceqgs %v0, %v24, %v2611; CHECK-NEXT: vgbm %v24, 6553512; CHECK-NEXT: ber %r1413; CHECK-NEXT: .LBB0_1:14; CHECK-NEXT: vgbm %v24, 015; CHECK-NEXT: br %r1416 %cmp = icmp eq <1 x i128> %val1, %val217 %ret = sext <1 x i1> %cmp to <1 x i128>18 ret <1 x i128> %ret19}20 21; Test ne.22define <1 x i128> @f2(<1 x i128> %val1, <1 x i128> %val2) {23; CHECK-LABEL: f2:24; CHECK: # %bb.0:25; CHECK-NEXT: vceqgs %v0, %v24, %v2626; CHECK-NEXT: vgbm %v24, 6553527; CHECK-NEXT: bnher %r1428; CHECK-NEXT: .LBB1_1:29; CHECK-NEXT: vgbm %v24, 030; CHECK-NEXT: br %r1431 %cmp = icmp ne <1 x i128> %val1, %val232 %ret = sext <1 x i1> %cmp to <1 x i128>33 ret <1 x i128> %ret34}35 36; Test sgt.37define <1 x i128> @f3(<1 x i128> %val1, <1 x i128> %val2) {38; CHECK-LABEL: f3:39; CHECK: # %bb.0:40; CHECK-NEXT: vecg %v26, %v2441; CHECK-NEXT: jlh .LBB2_242; CHECK-NEXT: # %bb.1:43; CHECK-NEXT: vchlgs %v0, %v24, %v2644; CHECK-NEXT: .LBB2_2:45; CHECK-NEXT: vgbm %v24, 6553546; CHECK-NEXT: blr %r1447; CHECK-NEXT: .LBB2_3:48; CHECK-NEXT: vgbm %v24, 049; CHECK-NEXT: br %r1450 %cmp = icmp sgt <1 x i128> %val1, %val251 %ret = sext <1 x i1> %cmp to <1 x i128>52 ret <1 x i128> %ret53}54 55; Test sge.56define <1 x i128> @f4(<1 x i128> %val1, <1 x i128> %val2) {57; CHECK-LABEL: f4:58; CHECK: # %bb.0:59; CHECK-NEXT: vecg %v24, %v2660; CHECK-NEXT: jlh .LBB3_261; CHECK-NEXT: # %bb.1:62; CHECK-NEXT: vchlgs %v0, %v26, %v2463; CHECK-NEXT: .LBB3_2:64; CHECK-NEXT: vgbm %v24, 6553565; CHECK-NEXT: bnlr %r1466; CHECK-NEXT: .LBB3_3:67; CHECK-NEXT: vgbm %v24, 068; CHECK-NEXT: br %r1469 %cmp = icmp sge <1 x i128> %val1, %val270 %ret = sext <1 x i1> %cmp to <1 x i128>71 ret <1 x i128> %ret72}73 74; Test sle.75define <1 x i128> @f5(<1 x i128> %val1, <1 x i128> %val2) {76; CHECK-LABEL: f5:77; CHECK: # %bb.0:78; CHECK-NEXT: vecg %v26, %v2479; CHECK-NEXT: jlh .LBB4_280; CHECK-NEXT: # %bb.1:81; CHECK-NEXT: vchlgs %v0, %v24, %v2682; CHECK-NEXT: .LBB4_2:83; CHECK-NEXT: vgbm %v24, 6553584; CHECK-NEXT: bnlr %r1485; CHECK-NEXT: .LBB4_3:86; CHECK-NEXT: vgbm %v24, 087; CHECK-NEXT: br %r1488 %cmp = icmp sle <1 x i128> %val1, %val289 %ret = sext <1 x i1> %cmp to <1 x i128>90 ret <1 x i128> %ret91}92 93; Test slt.94define <1 x i128> @f6(<1 x i128> %val1, <1 x i128> %val2) {95; CHECK-LABEL: f6:96; CHECK: # %bb.0:97; CHECK-NEXT: vecg %v24, %v2698; CHECK-NEXT: jlh .LBB5_299; CHECK-NEXT: # %bb.1:100; CHECK-NEXT: vchlgs %v0, %v26, %v24101; CHECK-NEXT: .LBB5_2:102; CHECK-NEXT: vgbm %v24, 65535103; CHECK-NEXT: blr %r14104; CHECK-NEXT: .LBB5_3:105; CHECK-NEXT: vgbm %v24, 0106; CHECK-NEXT: br %r14107 %cmp = icmp slt <1 x i128> %val1, %val2108 %ret = sext <1 x i1> %cmp to <1 x i128>109 ret <1 x i128> %ret110}111 112; Test ugt.113define <1 x i128> @f7(<1 x i128> %val1, <1 x i128> %val2) {114; CHECK-LABEL: f7:115; CHECK: # %bb.0:116; CHECK-NEXT: veclg %v26, %v24117; CHECK-NEXT: jlh .LBB6_2118; CHECK-NEXT: # %bb.1:119; CHECK-NEXT: vchlgs %v0, %v24, %v26120; CHECK-NEXT: .LBB6_2:121; CHECK-NEXT: vgbm %v24, 65535122; CHECK-NEXT: blr %r14123; CHECK-NEXT: .LBB6_3:124; CHECK-NEXT: vgbm %v24, 0125; CHECK-NEXT: br %r14126 %cmp = icmp ugt <1 x i128> %val1, %val2127 %ret = sext <1 x i1> %cmp to <1 x i128>128 ret <1 x i128> %ret129}130 131; Test uge.132define <1 x i128> @f8(<1 x i128> %val1, <1 x i128> %val2) {133; CHECK-LABEL: f8:134; CHECK: # %bb.0:135; CHECK-NEXT: veclg %v24, %v26136; CHECK-NEXT: jlh .LBB7_2137; CHECK-NEXT: # %bb.1:138; CHECK-NEXT: vchlgs %v0, %v26, %v24139; CHECK-NEXT: .LBB7_2:140; CHECK-NEXT: vgbm %v24, 65535141; CHECK-NEXT: bnlr %r14142; CHECK-NEXT: .LBB7_3:143; CHECK-NEXT: vgbm %v24, 0144; CHECK-NEXT: br %r14145 %cmp = icmp uge <1 x i128> %val1, %val2146 %ret = sext <1 x i1> %cmp to <1 x i128>147 ret <1 x i128> %ret148}149 150; Test ule.151define <1 x i128> @f9(<1 x i128> %val1, <1 x i128> %val2) {152; CHECK-LABEL: f9:153; CHECK: # %bb.0:154; CHECK-NEXT: veclg %v26, %v24155; CHECK-NEXT: jlh .LBB8_2156; CHECK-NEXT: # %bb.1:157; CHECK-NEXT: vchlgs %v0, %v24, %v26158; CHECK-NEXT: .LBB8_2:159; CHECK-NEXT: vgbm %v24, 65535160; CHECK-NEXT: bnlr %r14161; CHECK-NEXT: .LBB8_3:162; CHECK-NEXT: vgbm %v24, 0163; CHECK-NEXT: br %r14164 %cmp = icmp ule <1 x i128> %val1, %val2165 %ret = sext <1 x i1> %cmp to <1 x i128>166 ret <1 x i128> %ret167}168 169; Test ult.170define <1 x i128> @f10(<1 x i128> %val1, <1 x i128> %val2) {171; CHECK-LABEL: f10:172; CHECK: # %bb.0:173; CHECK-NEXT: veclg %v24, %v26174; CHECK-NEXT: jlh .LBB9_2175; CHECK-NEXT: # %bb.1:176; CHECK-NEXT: vchlgs %v0, %v26, %v24177; CHECK-NEXT: .LBB9_2:178; CHECK-NEXT: vgbm %v24, 65535179; CHECK-NEXT: blr %r14180; CHECK-NEXT: .LBB9_3:181; CHECK-NEXT: vgbm %v24, 0182; CHECK-NEXT: br %r14183 %cmp = icmp ult <1 x i128> %val1, %val2184 %ret = sext <1 x i1> %cmp to <1 x i128>185 ret <1 x i128> %ret186}187 188; Test eq selects.189define <1 x i128> @f11(<1 x i128> %val1, <1 x i128> %val2,190; CHECK-LABEL: f11:191; CHECK: # %bb.0:192; CHECK-NEXT: vceqgs %v0, %v24, %v26193; CHECK-NEXT: je .LBB10_2194; CHECK-NEXT: # %bb.1:195; CHECK-NEXT: vlr %v28, %v30196; CHECK-NEXT: .LBB10_2:197; CHECK-NEXT: vlr %v24, %v28198; CHECK-NEXT: br %r14199 <1 x i128> %val3, <1 x i128> %val4) {200 %cmp = icmp eq <1 x i128> %val1, %val2201 %ret = select <1 x i1> %cmp, <1 x i128> %val3, <1 x i128> %val4202 ret <1 x i128> %ret203}204 205; Test ne selects.206define <1 x i128> @f12(<1 x i128> %val1, <1 x i128> %val2,207; CHECK-LABEL: f12:208; CHECK: # %bb.0:209; CHECK-NEXT: vceqgs %v0, %v24, %v26210; CHECK-NEXT: jnhe .LBB11_2211; CHECK-NEXT: # %bb.1:212; CHECK-NEXT: vlr %v28, %v30213; CHECK-NEXT: .LBB11_2:214; CHECK-NEXT: vlr %v24, %v28215; CHECK-NEXT: br %r14216 <1 x i128> %val3, <1 x i128> %val4) {217 %cmp = icmp ne <1 x i128> %val1, %val2218 %ret = select <1 x i1> %cmp, <1 x i128> %val3, <1 x i128> %val4219 ret <1 x i128> %ret220}221 222; Test sgt selects.223define <1 x i128> @f13(<1 x i128> %val1, <1 x i128> %val2,224; CHECK-LABEL: f13:225; CHECK: # %bb.0:226; CHECK-NEXT: vecg %v26, %v24227; CHECK-NEXT: je .LBB12_3228; CHECK-NEXT: # %bb.1:229; CHECK-NEXT: jnl .LBB12_4230; CHECK-NEXT: .LBB12_2:231; CHECK-NEXT: vlr %v24, %v28232; CHECK-NEXT: br %r14233; CHECK-NEXT: .LBB12_3:234; CHECK-NEXT: vchlgs %v0, %v24, %v26235; CHECK-NEXT: jl .LBB12_2236; CHECK-NEXT: .LBB12_4:237; CHECK-NEXT: vlr %v28, %v30238; CHECK-NEXT: vlr %v24, %v28239; CHECK-NEXT: br %r14240 <1 x i128> %val3, <1 x i128> %val4) {241 %cmp = icmp sgt <1 x i128> %val1, %val2242 %ret = select <1 x i1> %cmp, <1 x i128> %val3, <1 x i128> %val4243 ret <1 x i128> %ret244}245 246; Test sge selects.247define <1 x i128> @f14(<1 x i128> %val1, <1 x i128> %val2,248; CHECK-LABEL: f14:249; CHECK: # %bb.0:250; CHECK-NEXT: vecg %v24, %v26251; CHECK-NEXT: je .LBB13_3252; CHECK-NEXT: # %bb.1:253; CHECK-NEXT: jl .LBB13_4254; CHECK-NEXT: .LBB13_2:255; CHECK-NEXT: vlr %v24, %v28256; CHECK-NEXT: br %r14257; CHECK-NEXT: .LBB13_3:258; CHECK-NEXT: vchlgs %v0, %v26, %v24259; CHECK-NEXT: jnl .LBB13_2260; CHECK-NEXT: .LBB13_4:261; CHECK-NEXT: vlr %v28, %v30262; CHECK-NEXT: vlr %v24, %v28263; CHECK-NEXT: br %r14264 <1 x i128> %val3, <1 x i128> %val4) {265 %cmp = icmp sge <1 x i128> %val1, %val2266 %ret = select <1 x i1> %cmp, <1 x i128> %val3, <1 x i128> %val4267 ret <1 x i128> %ret268}269 270; Test sle selects.271define <1 x i128> @f15(<1 x i128> %val1, <1 x i128> %val2,272; CHECK-LABEL: f15:273; CHECK: # %bb.0:274; CHECK-NEXT: vecg %v26, %v24275; CHECK-NEXT: je .LBB14_3276; CHECK-NEXT: # %bb.1:277; CHECK-NEXT: jl .LBB14_4278; CHECK-NEXT: .LBB14_2:279; CHECK-NEXT: vlr %v24, %v28280; CHECK-NEXT: br %r14281; CHECK-NEXT: .LBB14_3:282; CHECK-NEXT: vchlgs %v0, %v24, %v26283; CHECK-NEXT: jnl .LBB14_2284; CHECK-NEXT: .LBB14_4:285; CHECK-NEXT: vlr %v28, %v30286; CHECK-NEXT: vlr %v24, %v28287; CHECK-NEXT: br %r14288 <1 x i128> %val3, <1 x i128> %val4) {289 %cmp = icmp sle <1 x i128> %val1, %val2290 %ret = select <1 x i1> %cmp, <1 x i128> %val3, <1 x i128> %val4291 ret <1 x i128> %ret292}293 294; Test slt selects.295define <1 x i128> @f16(<1 x i128> %val1, <1 x i128> %val2,296; CHECK-LABEL: f16:297; CHECK: # %bb.0:298; CHECK-NEXT: vecg %v24, %v26299; CHECK-NEXT: je .LBB15_3300; CHECK-NEXT: # %bb.1:301; CHECK-NEXT: jnl .LBB15_4302; CHECK-NEXT: .LBB15_2:303; CHECK-NEXT: vlr %v24, %v28304; CHECK-NEXT: br %r14305; CHECK-NEXT: .LBB15_3:306; CHECK-NEXT: vchlgs %v0, %v26, %v24307; CHECK-NEXT: jl .LBB15_2308; CHECK-NEXT: .LBB15_4:309; CHECK-NEXT: vlr %v28, %v30310; CHECK-NEXT: vlr %v24, %v28311; CHECK-NEXT: br %r14312 <1 x i128> %val3, <1 x i128> %val4) {313 %cmp = icmp slt <1 x i128> %val1, %val2314 %ret = select <1 x i1> %cmp, <1 x i128> %val3, <1 x i128> %val4315 ret <1 x i128> %ret316}317 318; Test ugt selects.319define <1 x i128> @f17(<1 x i128> %val1, <1 x i128> %val2,320; CHECK-LABEL: f17:321; CHECK: # %bb.0:322; CHECK-NEXT: veclg %v26, %v24323; CHECK-NEXT: je .LBB16_3324; CHECK-NEXT: # %bb.1:325; CHECK-NEXT: jnl .LBB16_4326; CHECK-NEXT: .LBB16_2:327; CHECK-NEXT: vlr %v24, %v28328; CHECK-NEXT: br %r14329; CHECK-NEXT: .LBB16_3:330; CHECK-NEXT: vchlgs %v0, %v24, %v26331; CHECK-NEXT: jl .LBB16_2332; CHECK-NEXT: .LBB16_4:333; CHECK-NEXT: vlr %v28, %v30334; CHECK-NEXT: vlr %v24, %v28335; CHECK-NEXT: br %r14336 <1 x i128> %val3, <1 x i128> %val4) {337 %cmp = icmp ugt <1 x i128> %val1, %val2338 %ret = select <1 x i1> %cmp, <1 x i128> %val3, <1 x i128> %val4339 ret <1 x i128> %ret340}341 342; Test uge selects.343define <1 x i128> @f18(<1 x i128> %val1, <1 x i128> %val2,344; CHECK-LABEL: f18:345; CHECK: # %bb.0:346; CHECK-NEXT: veclg %v24, %v26347; CHECK-NEXT: je .LBB17_3348; CHECK-NEXT: # %bb.1:349; CHECK-NEXT: jl .LBB17_4350; CHECK-NEXT: .LBB17_2:351; CHECK-NEXT: vlr %v24, %v28352; CHECK-NEXT: br %r14353; CHECK-NEXT: .LBB17_3:354; CHECK-NEXT: vchlgs %v0, %v26, %v24355; CHECK-NEXT: jnl .LBB17_2356; CHECK-NEXT: .LBB17_4:357; CHECK-NEXT: vlr %v28, %v30358; CHECK-NEXT: vlr %v24, %v28359; CHECK-NEXT: br %r14360 <1 x i128> %val3, <1 x i128> %val4) {361 %cmp = icmp uge <1 x i128> %val1, %val2362 %ret = select <1 x i1> %cmp, <1 x i128> %val3, <1 x i128> %val4363 ret <1 x i128> %ret364}365 366; Test ule selects.367define <1 x i128> @f19(<1 x i128> %val1, <1 x i128> %val2,368; CHECK-LABEL: f19:369; CHECK: # %bb.0:370; CHECK-NEXT: veclg %v26, %v24371; CHECK-NEXT: je .LBB18_3372; CHECK-NEXT: # %bb.1:373; CHECK-NEXT: jl .LBB18_4374; CHECK-NEXT: .LBB18_2:375; CHECK-NEXT: vlr %v24, %v28376; CHECK-NEXT: br %r14377; CHECK-NEXT: .LBB18_3:378; CHECK-NEXT: vchlgs %v0, %v24, %v26379; CHECK-NEXT: jnl .LBB18_2380; CHECK-NEXT: .LBB18_4:381; CHECK-NEXT: vlr %v28, %v30382; CHECK-NEXT: vlr %v24, %v28383; CHECK-NEXT: br %r14384 <1 x i128> %val3, <1 x i128> %val4) {385 %cmp = icmp ule <1 x i128> %val1, %val2386 %ret = select <1 x i1> %cmp, <1 x i128> %val3, <1 x i128> %val4387 ret <1 x i128> %ret388}389 390; Test ult selects.391define <1 x i128> @f20(<1 x i128> %val1, <1 x i128> %val2,392; CHECK-LABEL: f20:393; CHECK: # %bb.0:394; CHECK-NEXT: veclg %v24, %v26395; CHECK-NEXT: je .LBB19_3396; CHECK-NEXT: # %bb.1:397; CHECK-NEXT: jnl .LBB19_4398; CHECK-NEXT: .LBB19_2:399; CHECK-NEXT: vlr %v24, %v28400; CHECK-NEXT: br %r14401; CHECK-NEXT: .LBB19_3:402; CHECK-NEXT: vchlgs %v0, %v26, %v24403; CHECK-NEXT: jl .LBB19_2404; CHECK-NEXT: .LBB19_4:405; CHECK-NEXT: vlr %v28, %v30406; CHECK-NEXT: vlr %v24, %v28407; CHECK-NEXT: br %r14408 <1 x i128> %val3, <1 x i128> %val4) {409 %cmp = icmp ult <1 x i128> %val1, %val2410 %ret = select <1 x i1> %cmp, <1 x i128> %val3, <1 x i128> %val4411 ret <1 x i128> %ret412}413