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1; Test that vector compare / select combinations do not produce any2; unnecessary pack /unpack / shift instructions.3;4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s5; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s -check-prefix=CHECK-Z146 7define <2 x i8> @fun0(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4) {8; CHECK-LABEL: fun0:9; CHECK: # %bb.0:10; CHECK-NEXT: vceqb %v0, %v24, %v2611; CHECK-NEXT: vsel %v24, %v28, %v30, %v012; CHECK-NEXT: br %r1413 %cmp = icmp eq <2 x i8> %val1, %val214 %sel = select <2 x i1> %cmp, <2 x i8> %val3, <2 x i8> %val415 ret <2 x i8> %sel16}17 18define <2 x i16> @fun1(<2 x i8> %val1, <2 x i8> %val2, <2 x i16> %val3, <2 x i16> %val4) {19; CHECK-LABEL: fun1:20; CHECK: # %bb.0:21; CHECK-NEXT: vceqb %v0, %v24, %v2622; CHECK-NEXT: vuphb %v0, %v023; CHECK-NEXT: vsel %v24, %v28, %v30, %v024; CHECK-NEXT: br %r1425 %cmp = icmp eq <2 x i8> %val1, %val226 %sel = select <2 x i1> %cmp, <2 x i16> %val3, <2 x i16> %val427 ret <2 x i16> %sel28}29 30define <16 x i8> @fun2(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4) {31; CHECK-LABEL: fun2:32; CHECK: # %bb.0:33; CHECK-NEXT: vceqb %v0, %v24, %v2634; CHECK-NEXT: vsel %v24, %v28, %v30, %v035; CHECK-NEXT: br %r1436 %cmp = icmp eq <16 x i8> %val1, %val237 %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val438 ret <16 x i8> %sel39}40 41define <16 x i16> @fun3(<16 x i8> %val1, <16 x i8> %val2, <16 x i16> %val3, <16 x i16> %val4) {42; CHECK-LABEL: fun3:43; CHECK: # %bb.0:44; CHECK-NEXT: vceqb %v0, %v24, %v2645; CHECK-DAG: vuphb [[REG0:%v[0-9]+]], %v046; CHECK-DAG: vuplb [[REG1:%v[0-9]+]], %v047; CHECK-NEXT: vsel %v24, %v28, %v25, [[REG0]]48; CHECK-NEXT: vsel %v26, %v30, %v27, [[REG1]]49; CHECK-NEXT: br %r1450 %cmp = icmp eq <16 x i8> %val1, %val251 %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val452 ret <16 x i16> %sel53}54 55define <32 x i8> @fun4(<32 x i8> %val1, <32 x i8> %val2, <32 x i8> %val3, <32 x i8> %val4) {56; CHECK-LABEL: fun4:57; CHECK: # %bb.0:58; CHECK-DAG: vceqb [[REG0:%v[0-9]+]], %v26, %v3059; CHECK-DAG: vceqb [[REG1:%v[0-9]+]], %v24, %v2860; CHECK-DAG: vsel %v24, %v25, %v29, [[REG1]]61; CHECK-DAG: vsel %v26, %v27, %v31, [[REG0]]62; CHECK-NEXT: br %r1463 %cmp = icmp eq <32 x i8> %val1, %val264 %sel = select <32 x i1> %cmp, <32 x i8> %val3, <32 x i8> %val465 ret <32 x i8> %sel66}67 68define <2 x i8> @fun5(<2 x i16> %val1, <2 x i16> %val2, <2 x i8> %val3, <2 x i8> %val4) {69; CHECK-LABEL: fun5:70; CHECK: # %bb.0:71; CHECK-NEXT: vceqh %v0, %v24, %v2672; CHECK-NEXT: vpkh %v0, %v0, %v073; CHECK-NEXT: vsel %v24, %v28, %v30, %v074; CHECK-NEXT: br %r1475 %cmp = icmp eq <2 x i16> %val1, %val276 %sel = select <2 x i1> %cmp, <2 x i8> %val3, <2 x i8> %val477 ret <2 x i8> %sel78}79 80define <2 x i16> @fun6(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4) {81; CHECK-LABEL: fun6:82; CHECK: # %bb.0:83; CHECK-NEXT: vceqh %v0, %v24, %v2684; CHECK-NEXT: vsel %v24, %v28, %v30, %v085; CHECK-NEXT: br %r1486 %cmp = icmp eq <2 x i16> %val1, %val287 %sel = select <2 x i1> %cmp, <2 x i16> %val3, <2 x i16> %val488 ret <2 x i16> %sel89}90 91define <2 x i32> @fun7(<2 x i16> %val1, <2 x i16> %val2, <2 x i32> %val3, <2 x i32> %val4) {92; CHECK-LABEL: fun7:93; CHECK: # %bb.0:94; CHECK-NEXT: vceqh %v0, %v24, %v2695; CHECK-NEXT: vuphh %v0, %v096; CHECK-NEXT: vsel %v24, %v28, %v30, %v097; CHECK-NEXT: br %r1498 %cmp = icmp eq <2 x i16> %val1, %val299 %sel = select <2 x i1> %cmp, <2 x i32> %val3, <2 x i32> %val4100 ret <2 x i32> %sel101}102 103define <8 x i8> @fun8(<8 x i16> %val1, <8 x i16> %val2, <8 x i8> %val3, <8 x i8> %val4) {104; CHECK-LABEL: fun8:105; CHECK: # %bb.0:106; CHECK-NEXT: vceqh %v0, %v24, %v26107; CHECK-NEXT: vpkh %v0, %v0, %v0108; CHECK-NEXT: vsel %v24, %v28, %v30, %v0109; CHECK-NEXT: br %r14110 %cmp = icmp eq <8 x i16> %val1, %val2111 %sel = select <8 x i1> %cmp, <8 x i8> %val3, <8 x i8> %val4112 ret <8 x i8> %sel113}114 115define <8 x i16> @fun9(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4) {116; CHECK-LABEL: fun9:117; CHECK: # %bb.0:118; CHECK-NEXT: vceqh %v0, %v24, %v26119; CHECK-NEXT: vsel %v24, %v28, %v30, %v0120; CHECK-NEXT: br %r14121 %cmp = icmp eq <8 x i16> %val1, %val2122 %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4123 ret <8 x i16> %sel124}125 126define <8 x i32> @fun10(<8 x i16> %val1, <8 x i16> %val2, <8 x i32> %val3, <8 x i32> %val4) {127; CHECK-LABEL: fun10:128; CHECK: # %bb.0:129; CHECK-NEXT: vceqh %v0, %v24, %v26130; CHECK-DAG: vuphh [[REG0:%v[0-9]+]], %v0131; CHECK-DAG: vuplhw [[REG1:%v[0-9]+]], %v0132; CHECK-NEXT: vsel %v24, %v28, %v25, [[REG0]]133; CHECK-NEXT: vsel %v26, %v30, %v27, [[REG1]]134; CHECK-NEXT: br %r14135 %cmp = icmp eq <8 x i16> %val1, %val2136 %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4137 ret <8 x i32> %sel138}139 140define <16 x i8> @fun11(<16 x i16> %val1, <16 x i16> %val2, <16 x i8> %val3, <16 x i8> %val4) {141; CHECK-LABEL: fun11:142; CHECK: # %bb.0:143; CHECK-NEXT: vceqh %v0, %v26, %v30144; CHECK-NEXT: vceqh %v1, %v24, %v28145; CHECK-NEXT: vpkh %v0, %v1, %v0146; CHECK-NEXT: vsel %v24, %v25, %v27, %v0147; CHECK-NEXT: br %r14148 %cmp = icmp eq <16 x i16> %val1, %val2149 %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4150 ret <16 x i8> %sel151}152 153define <16 x i16> @fun12(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4) {154; CHECK-LABEL: fun12:155; CHECK: # %bb.0:156; CHECK-DAG: vceqh [[REG0:%v[0-9]+]], %v26, %v30157; CHECK-DAG: vceqh [[REG1:%v[0-9]+]], %v24, %v28158; CHECK-DAG: vsel %v24, %v25, %v29, [[REG1]]159; CHECK-DAG: vsel %v26, %v27, %v31, [[REG0]]160; CHECK-NEXT: br %r14161 %cmp = icmp eq <16 x i16> %val1, %val2162 %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4163 ret <16 x i16> %sel164}165 166define <2 x i16> @fun13(<2 x i32> %val1, <2 x i32> %val2, <2 x i16> %val3, <2 x i16> %val4) {167; CHECK-LABEL: fun13:168; CHECK: # %bb.0:169; CHECK-NEXT: vceqf %v0, %v24, %v26170; CHECK-NEXT: vpkf %v0, %v0, %v0171; CHECK-NEXT: vsel %v24, %v28, %v30, %v0172; CHECK-NEXT: br %r14173 %cmp = icmp eq <2 x i32> %val1, %val2174 %sel = select <2 x i1> %cmp, <2 x i16> %val3, <2 x i16> %val4175 ret <2 x i16> %sel176}177 178define <2 x i32> @fun14(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4) {179; CHECK-LABEL: fun14:180; CHECK: # %bb.0:181; CHECK-NEXT: vceqf %v0, %v24, %v26182; CHECK-NEXT: vsel %v24, %v28, %v30, %v0183; CHECK-NEXT: br %r14184 %cmp = icmp eq <2 x i32> %val1, %val2185 %sel = select <2 x i1> %cmp, <2 x i32> %val3, <2 x i32> %val4186 ret <2 x i32> %sel187}188 189define <2 x i64> @fun15(<2 x i32> %val1, <2 x i32> %val2, <2 x i64> %val3, <2 x i64> %val4) {190; CHECK-LABEL: fun15:191; CHECK: # %bb.0:192; CHECK-NEXT: vceqf %v0, %v24, %v26193; CHECK-NEXT: vuphf %v0, %v0194; CHECK-NEXT: vsel %v24, %v28, %v30, %v0195; CHECK-NEXT: br %r14196 %cmp = icmp eq <2 x i32> %val1, %val2197 %sel = select <2 x i1> %cmp, <2 x i64> %val3, <2 x i64> %val4198 ret <2 x i64> %sel199}200 201define <4 x i16> @fun16(<4 x i32> %val1, <4 x i32> %val2, <4 x i16> %val3, <4 x i16> %val4) {202; CHECK-LABEL: fun16:203; CHECK: # %bb.0:204; CHECK-NEXT: vceqf %v0, %v24, %v26205; CHECK-NEXT: vpkf %v0, %v0, %v0206; CHECK-NEXT: vsel %v24, %v28, %v30, %v0207; CHECK-NEXT: br %r14208 %cmp = icmp eq <4 x i32> %val1, %val2209 %sel = select <4 x i1> %cmp, <4 x i16> %val3, <4 x i16> %val4210 ret <4 x i16> %sel211}212 213define <4 x i32> @fun17(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4) {214; CHECK-LABEL: fun17:215; CHECK: # %bb.0:216; CHECK-NEXT: vceqf %v0, %v24, %v26217; CHECK-NEXT: vsel %v24, %v28, %v30, %v0218; CHECK-NEXT: br %r14219 %cmp = icmp eq <4 x i32> %val1, %val2220 %sel = select <4 x i1> %cmp, <4 x i32> %val3, <4 x i32> %val4221 ret <4 x i32> %sel222}223 224define <4 x i64> @fun18(<4 x i32> %val1, <4 x i32> %val2, <4 x i64> %val3, <4 x i64> %val4) {225; CHECK-LABEL: fun18:226; CHECK: # %bb.0:227; CHECK-NEXT: vceqf %v0, %v24, %v26228; CHECK-DAG: vuphf [[REG0:%v[0-9]+]], %v0229; CHECK-DAG: vuplf [[REG1]], %v0230; CHECK-NEXT: vsel %v24, %v28, %v25, [[REG0]]231; CHECK-NEXT: vsel %v26, %v30, %v27, [[REG1]]232; CHECK-NEXT: br %r14233 %cmp = icmp eq <4 x i32> %val1, %val2234 %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4235 ret <4 x i64> %sel236}237 238define <8 x i16> @fun19(<8 x i32> %val1, <8 x i32> %val2, <8 x i16> %val3, <8 x i16> %val4) {239; CHECK-LABEL: fun19:240; CHECK: # %bb.0:241; CHECK-NEXT: vceqf %v0, %v26, %v30242; CHECK-NEXT: vceqf %v1, %v24, %v28243; CHECK-NEXT: vpkf %v0, %v1, %v0244; CHECK-NEXT: vsel %v24, %v25, %v27, %v0245; CHECK-NEXT: br %r14246 %cmp = icmp eq <8 x i32> %val1, %val2247 %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4248 ret <8 x i16> %sel249}250 251define <8 x i32> @fun20(<8 x i32> %val1, <8 x i32> %val2, <8 x i32> %val3, <8 x i32> %val4) {252; CHECK-LABEL: fun20:253; CHECK: # %bb.0:254; CHECK-DAG: vceqf [[REG0:%v[0-9]+]], %v26, %v30255; CHECK-DAG: vceqf [[REG1:%v[0-9]+]], %v24, %v28256; CHECK-DAG: vsel %v24, %v25, %v29, [[REG1]]257; CHECK-DAG: vsel %v26, %v27, %v31, [[REG0]]258; CHECK-NEXT: br %r14259 %cmp = icmp eq <8 x i32> %val1, %val2260 %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4261 ret <8 x i32> %sel262}263 264define <2 x i32> @fun21(<2 x i64> %val1, <2 x i64> %val2, <2 x i32> %val3, <2 x i32> %val4) {265; CHECK-LABEL: fun21:266; CHECK: # %bb.0:267; CHECK-NEXT: vceqg %v0, %v24, %v26268; CHECK-NEXT: vpkg %v0, %v0, %v0269; CHECK-NEXT: vsel %v24, %v28, %v30, %v0270; CHECK-NEXT: br %r14271 %cmp = icmp eq <2 x i64> %val1, %val2272 %sel = select <2 x i1> %cmp, <2 x i32> %val3, <2 x i32> %val4273 ret <2 x i32> %sel274}275 276define <2 x i64> @fun22(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4) {277; CHECK-LABEL: fun22:278; CHECK: # %bb.0:279; CHECK-NEXT: vceqg %v0, %v24, %v26280; CHECK-NEXT: vsel %v24, %v28, %v30, %v0281; CHECK-NEXT: br %r14282 %cmp = icmp eq <2 x i64> %val1, %val2283 %sel = select <2 x i1> %cmp, <2 x i64> %val3, <2 x i64> %val4284 ret <2 x i64> %sel285}286 287define <4 x i32> @fun23(<4 x i64> %val1, <4 x i64> %val2, <4 x i32> %val3, <4 x i32> %val4) {288; CHECK-LABEL: fun23:289; CHECK: # %bb.0:290; CHECK-NEXT: vceqg %v0, %v26, %v30291; CHECK-NEXT: vceqg %v1, %v24, %v28292; CHECK-NEXT: vpkg %v0, %v1, %v0293; CHECK-NEXT: vsel %v24, %v25, %v27, %v0294; CHECK-NEXT: br %r14295 %cmp = icmp eq <4 x i64> %val1, %val2296 %sel = select <4 x i1> %cmp, <4 x i32> %val3, <4 x i32> %val4297 ret <4 x i32> %sel298}299 300define <4 x i64> @fun24(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4) {301; CHECK-LABEL: fun24:302; CHECK: # %bb.0:303; CHECK-DAG: vceqg [[REG0:%v[0-9]+]], %v26, %v30304; CHECK-DAG: vceqg [[REG1:%v[0-9]+]], %v24, %v28305; CHECK-DAG: vsel %v24, %v25, %v29, [[REG1]]306; CHECK-DAG: vsel %v26, %v27, %v31, [[REG0]]307; CHECK-NEXT: br %r14308 %cmp = icmp eq <4 x i64> %val1, %val2309 %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4310 ret <4 x i64> %sel311}312 313define <2 x float> @fun25(<2 x float> %val1, <2 x float> %val2, <2 x float> %val3, <2 x float> %val4) {314; CHECK-LABEL: fun25:315; CHECK: # %bb.0:316; CHECK-NEXT: vmrlf %v0, %v26, %v26317; CHECK-NEXT: vmrlf %v1, %v24, %v24318; CHECK-NEXT: vldeb %v0, %v0319; CHECK-NEXT: vldeb %v1, %v1320; CHECK-NEXT: vfchdb %v0, %v1, %v0321; CHECK-NEXT: vmrhf %v1, %v26, %v26322; CHECK-NEXT: vmrhf %v2, %v24, %v24323; CHECK-NEXT: vldeb %v1, %v1324; CHECK-NEXT: vldeb %v2, %v2325; CHECK-NEXT: vfchdb %v1, %v2, %v1326; CHECK-NEXT: vpkg %v0, %v1, %v0327; CHECK-NEXT: vsel %v24, %v28, %v30, %v0328; CHECK-NEXT: br %r14329 330; CHECK-Z14-LABEL: fun25:331; CHECK-Z14: # %bb.0:332; CHECK-Z14-NEXT: vfchsb %v0, %v24, %v26333; CHECK-Z14-NEXT: vsel %v24, %v28, %v30, %v0334; CHECK-Z14-NEXT: br %r14335 336 %cmp = fcmp ogt <2 x float> %val1, %val2337 %sel = select <2 x i1> %cmp, <2 x float> %val3, <2 x float> %val4338 ret <2 x float> %sel339}340 341define <2 x double> @fun26(<2 x float> %val1, <2 x float> %val2, <2 x double> %val3, <2 x double> %val4) {342; CHECK-LABEL: fun26:343; CHECK: # %bb.0:344; CHECK-NEXT: vmrlf %v0, %v26, %v26345; CHECK-NEXT: vmrlf %v1, %v24, %v24346; CHECK-NEXT: vldeb %v0, %v0347; CHECK-NEXT: vldeb %v1, %v1348; CHECK-NEXT: vfchdb %v0, %v1, %v0349; CHECK-NEXT: vmrhf %v1, %v26, %v26350; CHECK-NEXT: vmrhf %v2, %v24, %v24351; CHECK-NEXT: vldeb %v1, %v1352; CHECK-NEXT: vldeb %v2, %v2353; CHECK-NEXT: vfchdb %v1, %v2, %v1354; CHECK-NEXT: vpkg %v0, %v1, %v0355; CHECK-NEXT: vuphf %v0, %v0356; CHECK-NEXT: vsel %v24, %v28, %v30, %v0357; CHECK-NEXT: br %r14358 359; CHECK-Z14-LABEL: fun26:360; CHECK-Z14: # %bb.0:361; CHECK-Z14-NEXT: vfchsb %v0, %v24, %v26362; CHECK-Z14-NEXT: vuphf %v0, %v0363; CHECK-Z14-NEXT: vsel %v24, %v28, %v30, %v0364; CHECK-Z14-NEXT: br %r14365 366 %cmp = fcmp ogt <2 x float> %val1, %val2367 %sel = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4368 ret <2 x double> %sel369}370 371; Test a widening select of floats.372define <2 x float> @fun27(<2 x i8> %val1, <2 x i8> %val2, <2 x float> %val3, <2 x float> %val4) {373; CHECK-LABEL: fun27:374; CHECK: # %bb.0:375; CHECK-NEXT: vceqb %v0, %v24, %v26376; CHECK-NEXT: vuphb %v0, %v0377; CHECK-NEXT: vuphh %v0, %v0378; CHECK-NEXT: vsel %v24, %v28, %v30, %v0379; CHECK-NEXT: br %r14380 381 %cmp = icmp eq <2 x i8> %val1, %val2382 %sel = select <2 x i1> %cmp, <2 x float> %val3, <2 x float> %val4383 ret <2 x float> %sel384}385 386define <4 x float> @fun28(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4) {387; CHECK-LABEL: fun28:388; CHECK: # %bb.0:389; CHECK-NEXT: vmrlf %v0, %v26, %v26390; CHECK-NEXT: vmrlf %v1, %v24, %v24391; CHECK-NEXT: vldeb %v0, %v0392; CHECK-NEXT: vldeb %v1, %v1393; CHECK-NEXT: vfchdb %v0, %v1, %v0394; CHECK-NEXT: vmrhf %v1, %v26, %v26395; CHECK-NEXT: vmrhf %v2, %v24, %v24396; CHECK-NEXT: vldeb %v1, %v1397; CHECK-NEXT: vldeb %v2, %v2398; CHECK-NEXT: vfchdb %v1, %v2, %v1399; CHECK-NEXT: vpkg %v0, %v1, %v0400; CHECK-NEXT: vsel %v24, %v28, %v30, %v0401; CHECK-NEXT: br %r14402 403; CHECK-Z14-LABEL: fun28:404; CHECK-Z14: # %bb.0:405; CHECK-Z14-NEXT: vfchsb %v0, %v24, %v26406; CHECK-Z14-NEXT: vsel %v24, %v28, %v30, %v0407; CHECK-Z14-NEXT: br %r14408 409 %cmp = fcmp ogt <4 x float> %val1, %val2410 %sel = select <4 x i1> %cmp, <4 x float> %val3, <4 x float> %val4411 ret <4 x float> %sel412}413 414define <4 x double> @fun29(<4 x float> %val1, <4 x float> %val2, <4 x double> %val3, <4 x double> %val4) {415; CHECK-LABEL: fun29:416; CHECK: # %bb.0:417; CHECK-NEXT: vmrlf %v0, %v26, %v26418; CHECK-NEXT: vmrlf %v1, %v24, %v24419; CHECK-NEXT: vldeb %v0, %v0420; CHECK-NEXT: vldeb %v1, %v1421; CHECK-NEXT: vfchdb %v0, %v1, %v0422; CHECK-NEXT: vmrhf %v1, %v26, %v26423; CHECK-NEXT: vmrhf %v2, %v24, %v24424; CHECK-NEXT: vldeb %v1, %v1425; CHECK-NEXT: vldeb %v2, %v2426; CHECK-NEXT: vfchdb %v1, %v2, %v1427; CHECK-NEXT: vpkg [[REG0:%v[0-9]+]], %v1, %v0428; CHECK-DAG: vuplf [[REG1:%v[0-9]+]], [[REG0]]429; CHECK-DAG: vuphf [[REG2:%v[0-9]+]], [[REG0]]430; CHECK-NEXT: vsel %v24, %v28, %v25, [[REG2]]431; CHECK-NEXT: vsel %v26, %v30, %v27, [[REG1]]432; CHECK-NEXT: br %r14433 434; CHECK-Z14-LABEL: fun29:435; CHECK-Z14: # %bb.0:436; CHECK-Z14-NEXT: vfchsb %v0, %v24, %v26437; CHECK-Z14-DAG: vuphf [[REG0:%v[0-9]+]], %v0438; CHECK-Z14-DAG: vuplf [[REG1:%v[0-9]+]], %v0439; CHECK-Z14-NEXT: vsel %v24, %v28, %v25, [[REG0]]440; CHECK-Z14-NEXT: vsel %v26, %v30, %v27, [[REG1]]441; CHECK-Z14-NEXT: br %r14442 443 %cmp = fcmp ogt <4 x float> %val1, %val2444 %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4445 ret <4 x double> %sel446}447 448define <8 x float> @fun30(<8 x float> %val1, <8 x float> %val2, <8 x float> %val3, <8 x float> %val4) {449; CHECK-Z14-LABEL: fun30:450; CHECK-Z14: # %bb.0:451; CHECK-Z14-DAG: vfchsb [[REG0:%v[0-9]+]], %v26, %v30452; CHECK-Z14-DAG: vfchsb [[REG1:%v[0-9]+]], %v24, %v28453; CHECK-Z14-DAG: vsel %v24, %v25, %v29, [[REG1]]454; CHECK-Z14-DAG: vsel %v26, %v27, %v31, [[REG0]]455; CHECK-Z14-NEXT: br %r14456 %cmp = fcmp ogt <8 x float> %val1, %val2457 %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4458 ret <8 x float> %sel459}460 461define <2 x float> @fun31(<2 x double> %val1, <2 x double> %val2, <2 x float> %val3, <2 x float> %val4) {462; CHECK-LABEL: fun31:463; CHECK: # %bb.0:464; CHECK-NEXT: vfchdb %v0, %v24, %v26465; CHECK-NEXT: vpkg %v0, %v0, %v0466; CHECK-NEXT: vsel %v24, %v28, %v30, %v0467; CHECK-NEXT: br %r14468 469 %cmp = fcmp ogt <2 x double> %val1, %val2470 %sel = select <2 x i1> %cmp, <2 x float> %val3, <2 x float> %val4471 ret <2 x float> %sel472}473 474define <2 x double> @fun32(<2 x double> %val1, <2 x double> %val2, <2 x double> %val3, <2 x double> %val4) {475; CHECK-LABEL: fun32:476; CHECK: # %bb.0:477; CHECK-NEXT: vfchdb %v0, %v24, %v26478; CHECK-NEXT: vsel %v24, %v28, %v30, %v0479; CHECK-NEXT: br %r14480 %cmp = fcmp ogt <2 x double> %val1, %val2481 %sel = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4482 ret <2 x double> %sel483}484 485define <4 x float> @fun33(<4 x double> %val1, <4 x double> %val2, <4 x float> %val3, <4 x float> %val4) {486; CHECK-LABEL: fun33:487; CHECK: # %bb.0:488; CHECK-NEXT: vfchdb %v0, %v26, %v30489; CHECK-NEXT: vfchdb %v1, %v24, %v28490; CHECK-NEXT: vpkg %v0, %v1, %v0491; CHECK-NEXT: vsel %v24, %v25, %v27, %v0492; CHECK-NEXT: br %r14493 %cmp = fcmp ogt <4 x double> %val1, %val2494 %sel = select <4 x i1> %cmp, <4 x float> %val3, <4 x float> %val4495 ret <4 x float> %sel496}497 498define <4 x double> @fun34(<4 x double> %val1, <4 x double> %val2, <4 x double> %val3, <4 x double> %val4) {499; CHECK-LABEL: fun34:500; CHECK: # %bb.0:501; CHECK-DAG: vfchdb [[REG0:%v[0-9]+]], %v26, %v30502; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v24, %v28503; CHECK-DAG: vsel %v24, %v25, %v29, [[REG1]]504; CHECK-DAG: vsel %v26, %v27, %v31, [[REG0]]505; CHECK-NEXT: br %r14506 %cmp = fcmp ogt <4 x double> %val1, %val2507 %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4508 ret <4 x double> %sel509}510