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1; Test vector replicates that use VECTOR GENERATE MASK, v16i8 version.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s4 5; Test a word-granularity replicate with the lowest value that cannot use6; VREPIF.7define <16 x i8> @f1() {8; CHECK-LABEL: f1:9; CHECK: vgmf %v24, 16, 1610; CHECK: br %r1411  ret <16 x i8> <i8 0, i8 0, i8 128, i8 0,12                 i8 0, i8 0, i8 128, i8 0,13                 i8 0, i8 0, i8 128, i8 0,14                 i8 0, i8 0, i8 128, i8 0>15}16 17; Test a word-granularity replicate that has the lower 17 bits set.18define <16 x i8> @f2() {19; CHECK-LABEL: f2:20; CHECK: vgmf %v24, 15, 3121; CHECK: br %r1422  ret <16 x i8> <i8 0, i8 1, i8 255, i8 255,23                 i8 0, i8 1, i8 255, i8 255,24                 i8 0, i8 1, i8 255, i8 255,25                 i8 0, i8 1, i8 255, i8 255>26}27 28; Test a word-granularity replicate that has the upper 15 bits set.29define <16 x i8> @f3() {30; CHECK-LABEL: f3:31; CHECK: vgmf %v24, 0, 1432; CHECK: br %r1433  ret <16 x i8> <i8 255, i8 254, i8 0, i8 0,34                 i8 255, i8 254, i8 0, i8 0,35                 i8 255, i8 254, i8 0, i8 0,36                 i8 255, i8 254, i8 0, i8 0>37}38 39; Test a word-granularity replicate that has middle bits set.40define <16 x i8> @f4() {41; CHECK-LABEL: f4:42; CHECK: vgmf %v24, 12, 1743; CHECK: br %r1444  ret <16 x i8> <i8 0, i8 15, i8 192, i8 0,45                 i8 0, i8 15, i8 192, i8 0,46                 i8 0, i8 15, i8 192, i8 0,47                 i8 0, i8 15, i8 192, i8 0>48}49 50; Test a word-granularity replicate with a wrap-around mask.51define <16 x i8> @f5() {52; CHECK-LABEL: f5:53; CHECK: vgmf %v24, 17, 1554; CHECK: br %r1455  ret <16 x i8> <i8 255, i8 255, i8 127, i8 255,56                 i8 255, i8 255, i8 127, i8 255,57                 i8 255, i8 255, i8 127, i8 255,58                 i8 255, i8 255, i8 127, i8 255>59}60 61; Test a doubleword-granularity replicate with the lowest value that cannot62; use VREPIG.63define <16 x i8> @f6() {64; CHECK-LABEL: f6:65; CHECK: vgmg %v24, 48, 4866; CHECK: br %r1467  ret <16 x i8> <i8 0, i8 0, i8 0, i8 0,68                 i8 0, i8 0, i8 128, i8 0,69                 i8 0, i8 0, i8 0, i8 0,70                 i8 0, i8 0, i8 128, i8 0>71}72 73; Test a doubleword-granularity replicate that has the lower 22 bits set.74define <16 x i8> @f7() {75; CHECK-LABEL: f7:76; CHECK: vgmg %v24, 42, 6377; CHECK: br %r1478  ret <16 x i8> <i8 0, i8 0, i8 0, i8 0,79                 i8 0, i8 63, i8 255, i8 255,80                 i8 0, i8 0, i8 0, i8 0,81                 i8 0, i8 63, i8 255, i8 255>82}83 84; Test a doubleword-granularity replicate that has the upper 45 bits set.85define <16 x i8> @f8() {86; CHECK-LABEL: f8:87; CHECK: vgmg %v24, 0, 4488; CHECK: br %r1489  ret <16 x i8> <i8 255, i8 255, i8 255, i8 255,90                 i8 255, i8 248, i8 0, i8 0,91                 i8 255, i8 255, i8 255, i8 255,92                 i8 255, i8 248, i8 0, i8 0>93}94 95; Test a doubleword-granularity replicate that has middle bits set.96define <16 x i8> @f9() {97; CHECK-LABEL: f9:98; CHECK: vgmg %v24, 31, 4299; CHECK: br %r14100  ret <16 x i8> <i8 0, i8 0, i8 0, i8 1,101                 i8 255, i8 224, i8 0, i8 0,102                 i8 0, i8 0, i8 0, i8 1,103                 i8 255, i8 224, i8 0, i8 0>104}105 106; Test a doubleword-granularity replicate with a wrap-around mask.107define <16 x i8> @f10() {108; CHECK-LABEL: f10:109; CHECK: vgmg %v24, 18, 0110; CHECK: br %r14111  ret <16 x i8> <i8 128, i8 0, i8 63, i8 255,112                 i8 255, i8 255, i8 255, i8 255,113                 i8 128, i8 0, i8 63, i8 255,114                 i8 255, i8 255, i8 255, i8 255>115}116 117; Retest f1 with arbitrary undefs instead of 0s.118define <16 x i8> @f11() {119; CHECK-LABEL: f11:120; CHECK: vgmf %v24, 16, 16121; CHECK: br %r14122  ret <16 x i8> <i8 0, i8 undef, i8 128, i8 0,123                 i8 0, i8 0, i8 128, i8 undef,124                 i8 undef, i8 0, i8 128, i8 0,125                 i8 undef, i8 undef, i8 128, i8 0>126}127 128; Try a case where we want consistent undefs to be treated as 0.129define <16 x i8> @f12() {130; CHECK-LABEL: f12:131; CHECK: vgmf %v24, 15, 23132; CHECK: br %r14133  ret <16 x i8> <i8 undef, i8 1, i8 255, i8 0,134                 i8 undef, i8 1, i8 255, i8 0,135                 i8 undef, i8 1, i8 255, i8 0,136                 i8 undef, i8 1, i8 255, i8 0>137}138 139; ...and again with the lower bits of the replicated constant.140define <16 x i8> @f13() {141; CHECK-LABEL: f13:142; CHECK: vgmf %v24, 15, 22143; CHECK: br %r14144  ret <16 x i8> <i8 0, i8 1, i8 254, i8 undef,145                 i8 0, i8 1, i8 254, i8 undef,146                 i8 0, i8 1, i8 254, i8 undef,147                 i8 0, i8 1, i8 254, i8 undef>148}149 150; Try a case where we want consistent undefs to be treated as -1.151define <16 x i8> @f14() {152; CHECK-LABEL: f14:153; CHECK: vgmf %v24, 28, 8154; CHECK: br %r14155  ret <16 x i8> <i8 undef, i8 128, i8 0, i8 15,156                 i8 undef, i8 128, i8 0, i8 15,157                 i8 undef, i8 128, i8 0, i8 15,158                 i8 undef, i8 128, i8 0, i8 15>159}160 161; ...and again with the lower bits of the replicated constant.162define <16 x i8> @f15() {163; CHECK-LABEL: f15:164; CHECK: vgmf %v24, 18, 3165; CHECK: br %r14166  ret <16 x i8> <i8 240, i8 0, i8 63, i8 undef,167                 i8 240, i8 0, i8 63, i8 undef,168                 i8 240, i8 0, i8 63, i8 undef,169                 i8 240, i8 0, i8 63, i8 undef>170}171 172; Repeat f9 with arbitrary undefs.173define <16 x i8> @f16() {174; CHECK-LABEL: f16:175; CHECK: vgmg %v24, 31, 42176; CHECK: br %r14177  ret <16 x i8> <i8 undef, i8 0, i8 undef, i8 1,178                 i8 255, i8 undef, i8 0, i8 0,179                 i8 0, i8 0, i8 0, i8 1,180                 i8 undef, i8 224, i8 undef, i8 undef>181}182 183; Try a case where we want some consistent undefs to be treated as 0184; and some to be treated as 255.185define <16 x i8> @f17() {186; CHECK-LABEL: f17:187; CHECK: vgmg %v24, 23, 35188; CHECK: br %r14189  ret <16 x i8> <i8 0, i8 undef, i8 1, i8 undef,190                 i8 240, i8 undef, i8 0, i8 0,191                 i8 0, i8 undef, i8 1, i8 undef,192                 i8 240, i8 undef, i8 0, i8 0>193}194