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1; Test vector replicates that use VECTOR GENERATE MASK, v4i32 version.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s4 5; Test a word-granularity replicate with the lowest value that cannot use6; VREPIF.7define <4 x i32> @f1() {8; CHECK-LABEL: f1:9; CHECK: vgmf %v24, 16, 1610; CHECK: br %r1411 ret <4 x i32> <i32 32768, i32 32768, i32 32768, i32 32768>12}13 14; Test a word-granularity replicate that has the lower 17 bits set.15define <4 x i32> @f2() {16; CHECK-LABEL: f2:17; CHECK: vgmf %v24, 15, 3118; CHECK: br %r1419 ret <4 x i32> <i32 131071, i32 131071, i32 131071, i32 131071>20}21 22; Test a word-granularity replicate that has the upper 15 bits set.23define <4 x i32> @f3() {24; CHECK-LABEL: f3:25; CHECK: vgmf %v24, 0, 1426; CHECK: br %r1427 ret <4 x i32> <i32 -131072, i32 -131072, i32 -131072, i32 -131072>28}29 30; Test a word-granularity replicate that has middle bits set.31define <4 x i32> @f4() {32; CHECK-LABEL: f4:33; CHECK: vgmf %v24, 12, 1734; CHECK: br %r1435 ret <4 x i32> <i32 1032192, i32 1032192, i32 1032192, i32 1032192>36}37 38; Test a word-granularity replicate with a wrap-around mask.39define <4 x i32> @f5() {40; CHECK-LABEL: f5:41; CHECK: vgmf %v24, 17, 1542; CHECK: br %r1443 ret <4 x i32> <i32 -32769, i32 -32769, i32 -32769, i32 -32769>44}45 46; Test a doubleword-granularity replicate with the lowest value that cannot47; use VREPIG.48define <4 x i32> @f6() {49; CHECK-LABEL: f6:50; CHECK: vgmg %v24, 48, 4851; CHECK: br %r1452 ret <4 x i32> <i32 0, i32 32768, i32 0, i32 32768>53}54 55; Test a doubleword-granularity replicate that has the lower 22 bits set.56define <4 x i32> @f7() {57; CHECK-LABEL: f7:58; CHECK: vgmg %v24, 42, 6359; CHECK: br %r1460 ret <4 x i32> <i32 0, i32 4194303, i32 0, i32 4194303>61}62 63; Test a doubleword-granularity replicate that has the upper 45 bits set.64define <4 x i32> @f8() {65; CHECK-LABEL: f8:66; CHECK: vgmg %v24, 0, 4467; CHECK: br %r1468 ret <4 x i32> <i32 -1, i32 -524288, i32 -1, i32 -524288>69}70 71; Test a doubleword-granularity replicate that has middle bits set.72define <4 x i32> @f9() {73; CHECK-LABEL: f9:74; CHECK: vgmg %v24, 31, 4275; CHECK: br %r1476 ret <4 x i32> <i32 1, i32 -2097152, i32 1, i32 -2097152>77}78 79; Test a doubleword-granularity replicate with a wrap-around mask.80define <4 x i32> @f10() {81; CHECK-LABEL: f10:82; CHECK: vgmg %v24, 18, 083; CHECK: br %r1484 ret <4 x i32> <i32 -2147467265, i32 -1, i32 -2147467265, i32 -1>85}86