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1; Test vector division on z17.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z17 | FileCheck %s4 5; Test a v4i32 signed division.6define <4 x i32> @f1(<4 x i32> %dummy, <4 x i32> %val1, <4 x i32> %val2) {7; CHECK-LABEL: f1:8; CHECK: vdf %v24, %v26, %v289; CHECK: br %r1410 %ret = sdiv <4 x i32> %val1, %val211 ret <4 x i32> %ret12}13 14; Test a v4i32 unsigned division.15define <4 x i32> @f2(<4 x i32> %dummy, <4 x i32> %val1, <4 x i32> %val2) {16; CHECK-LABEL: f2:17; CHECK: vdlf %v24, %v26, %v2818; CHECK: br %r1419 %ret = udiv <4 x i32> %val1, %val220 ret <4 x i32> %ret21}22 23; Test a v4i32 signed remainder.24define <4 x i32> @f3(<4 x i32> %dummy, <4 x i32> %val1, <4 x i32> %val2) {25; CHECK-LABEL: f3:26; CHECK: vrf %v24, %v26, %v2827; CHECK: br %r1428 %ret = srem <4 x i32> %val1, %val229 ret <4 x i32> %ret30}31 32; Test a v4i32 unsigned remainder.33define <4 x i32> @f4(<4 x i32> %dummy, <4 x i32> %val1, <4 x i32> %val2) {34; CHECK-LABEL: f4:35; CHECK: vrlf %v24, %v26, %v2836; CHECK: br %r1437 %ret = urem <4 x i32> %val1, %val238 ret <4 x i32> %ret39}40 41; Test a v2i64 signed division.42define <2 x i64> @f5(<2 x i64> %dummy, <2 x i64> %val1, <2 x i64> %val2) {43; CHECK-LABEL: f5:44; CHECK: vdg %v24, %v26, %v2845; CHECK: br %r1446 %ret = sdiv <2 x i64> %val1, %val247 ret <2 x i64> %ret48}49 50; Test a v2i64 unsigned division.51define <2 x i64> @f6(<2 x i64> %dummy, <2 x i64> %val1, <2 x i64> %val2) {52; CHECK-LABEL: f6:53; CHECK: vdlg %v24, %v26, %v2854; CHECK: br %r1455 %ret = udiv <2 x i64> %val1, %val256 ret <2 x i64> %ret57}58 59; Test a v2i64 signed remainder.60define <2 x i64> @f7(<2 x i64> %dummy, <2 x i64> %val1, <2 x i64> %val2) {61; CHECK-LABEL: f7:62; CHECK: vrg %v24, %v26, %v2863; CHECK: br %r1464 %ret = srem <2 x i64> %val1, %val265 ret <2 x i64> %ret66}67 68; Test a v2i64 unsigned remainder.69define <2 x i64> @f8(<2 x i64> %dummy, <2 x i64> %val1, <2 x i64> %val2) {70; CHECK-LABEL: f8:71; CHECK: vrlg %v24, %v26, %v2872; CHECK: br %r1473 %ret = urem <2 x i64> %val1, %val274 ret <2 x i64> %ret75}76 77