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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; Test vector intrinsics added with z15.3;4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s5 6declare <16 x i8> @llvm.s390.vsld(<16 x i8>, <16 x i8>, i32)7declare <16 x i8> @llvm.s390.vsrd(<16 x i8>, <16 x i8>, i32)8 9declare {<16 x i8>, i32} @llvm.s390.vstrsb(<16 x i8>, <16 x i8>, <16 x i8>)10declare {<16 x i8>, i32} @llvm.s390.vstrsh(<8 x i16>, <8 x i16>, <16 x i8>)11declare {<16 x i8>, i32} @llvm.s390.vstrsf(<4 x i32>, <4 x i32>, <16 x i8>)12declare {<16 x i8>, i32} @llvm.s390.vstrszb(<16 x i8>, <16 x i8>, <16 x i8>)13declare {<16 x i8>, i32} @llvm.s390.vstrszh(<8 x i16>, <8 x i16>, <16 x i8>)14declare {<16 x i8>, i32} @llvm.s390.vstrszf(<4 x i32>, <4 x i32>, <16 x i8>)15 16 17; VSLD with the minimum useful value.18define <16 x i8> @test_vsld_1(<16 x i8> %a, <16 x i8> %b) {19; CHECK-LABEL: test_vsld_1:20; CHECK: # %bb.0:21; CHECK-NEXT: vsld %v24, %v24, %v26, 122; CHECK-NEXT: br %r1423 %res = call <16 x i8> @llvm.s390.vsld(<16 x i8> %a, <16 x i8> %b, i32 1)24 ret <16 x i8> %res25}26 27; VSLD with the maximum value.28define <16 x i8> @test_vsld_7(<16 x i8> %a, <16 x i8> %b) {29; CHECK-LABEL: test_vsld_7:30; CHECK: # %bb.0:31; CHECK-NEXT: vsld %v24, %v24, %v26, 732; CHECK-NEXT: br %r1433 %res = call <16 x i8> @llvm.s390.vsld(<16 x i8> %a, <16 x i8> %b, i32 7)34 ret <16 x i8> %res35}36 37; VSRD with the minimum useful value.38define <16 x i8> @test_vsrd_1(<16 x i8> %a, <16 x i8> %b) {39; CHECK-LABEL: test_vsrd_1:40; CHECK: # %bb.0:41; CHECK-NEXT: vsrd %v24, %v24, %v26, 142; CHECK-NEXT: br %r1443 %res = call <16 x i8> @llvm.s390.vsrd(<16 x i8> %a, <16 x i8> %b, i32 1)44 ret <16 x i8> %res45}46 47; VSRD with the maximum value.48define <16 x i8> @test_vsrd_7(<16 x i8> %a, <16 x i8> %b) {49; CHECK-LABEL: test_vsrd_7:50; CHECK: # %bb.0:51; CHECK-NEXT: vsrd %v24, %v24, %v26, 752; CHECK-NEXT: br %r1453 %res = call <16 x i8> @llvm.s390.vsrd(<16 x i8> %a, <16 x i8> %b, i32 7)54 ret <16 x i8> %res55}56 57 58; VSTRSB.59define <16 x i8> @test_vstrsb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c,60; CHECK-LABEL: test_vstrsb:61; CHECK: # %bb.0:62; CHECK-NEXT: vstrsb %v24, %v24, %v26, %v28, 063; CHECK-NEXT: ipm %r064; CHECK-NEXT: srl %r0, 2865; CHECK-NEXT: st %r0, 0(%r2)66; CHECK-NEXT: br %r1467 ptr %ccptr) {68 %call = call {<16 x i8>, i32} @llvm.s390.vstrsb(<16 x i8> %a, <16 x i8> %b,69 <16 x i8> %c)70 %res = extractvalue {<16 x i8>, i32} %call, 071 %cc = extractvalue {<16 x i8>, i32} %call, 172 store i32 %cc, ptr %ccptr73 ret <16 x i8> %res74}75 76; VSTRSH.77define <16 x i8> @test_vstrsh(<8 x i16> %a, <8 x i16> %b, <16 x i8> %c,78; CHECK-LABEL: test_vstrsh:79; CHECK: # %bb.0:80; CHECK-NEXT: vstrsh %v24, %v24, %v26, %v28, 081; CHECK-NEXT: ipm %r082; CHECK-NEXT: srl %r0, 2883; CHECK-NEXT: st %r0, 0(%r2)84; CHECK-NEXT: br %r1485 ptr %ccptr) {86 %call = call {<16 x i8>, i32} @llvm.s390.vstrsh(<8 x i16> %a, <8 x i16> %b,87 <16 x i8> %c)88 %res = extractvalue {<16 x i8>, i32} %call, 089 %cc = extractvalue {<16 x i8>, i32} %call, 190 store i32 %cc, ptr %ccptr91 ret <16 x i8> %res92}93 94; VSTRSFS.95define <16 x i8> @test_vstrsf(<4 x i32> %a, <4 x i32> %b, <16 x i8> %c,96; CHECK-LABEL: test_vstrsf:97; CHECK: # %bb.0:98; CHECK-NEXT: vstrsf %v24, %v24, %v26, %v28, 099; CHECK-NEXT: ipm %r0100; CHECK-NEXT: srl %r0, 28101; CHECK-NEXT: st %r0, 0(%r2)102; CHECK-NEXT: br %r14103 ptr %ccptr) {104 %call = call {<16 x i8>, i32} @llvm.s390.vstrsf(<4 x i32> %a, <4 x i32> %b,105 <16 x i8> %c)106 %res = extractvalue {<16 x i8>, i32} %call, 0107 %cc = extractvalue {<16 x i8>, i32} %call, 1108 store i32 %cc, ptr %ccptr109 ret <16 x i8> %res110}111 112; VSTRSZB.113define <16 x i8> @test_vstrszb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c,114; CHECK-LABEL: test_vstrszb:115; CHECK: # %bb.0:116; CHECK-NEXT: vstrszb %v24, %v24, %v26, %v28117; CHECK-NEXT: ipm %r0118; CHECK-NEXT: srl %r0, 28119; CHECK-NEXT: st %r0, 0(%r2)120; CHECK-NEXT: br %r14121 ptr %ccptr) {122 %call = call {<16 x i8>, i32} @llvm.s390.vstrszb(<16 x i8> %a, <16 x i8> %b,123 <16 x i8> %c)124 %res = extractvalue {<16 x i8>, i32} %call, 0125 %cc = extractvalue {<16 x i8>, i32} %call, 1126 store i32 %cc, ptr %ccptr127 ret <16 x i8> %res128}129 130; VSTRSZH.131define <16 x i8> @test_vstrszh(<8 x i16> %a, <8 x i16> %b, <16 x i8> %c,132; CHECK-LABEL: test_vstrszh:133; CHECK: # %bb.0:134; CHECK-NEXT: vstrszh %v24, %v24, %v26, %v28135; CHECK-NEXT: ipm %r0136; CHECK-NEXT: srl %r0, 28137; CHECK-NEXT: st %r0, 0(%r2)138; CHECK-NEXT: br %r14139 ptr %ccptr) {140 %call = call {<16 x i8>, i32} @llvm.s390.vstrszh(<8 x i16> %a, <8 x i16> %b,141 <16 x i8> %c)142 %res = extractvalue {<16 x i8>, i32} %call, 0143 %cc = extractvalue {<16 x i8>, i32} %call, 1144 store i32 %cc, ptr %ccptr145 ret <16 x i8> %res146}147 148; VSTRSZF.149define <16 x i8> @test_vstrszf(<4 x i32> %a, <4 x i32> %b, <16 x i8> %c,150; CHECK-LABEL: test_vstrszf:151; CHECK: # %bb.0:152; CHECK-NEXT: vstrszf %v24, %v24, %v26, %v28153; CHECK-NEXT: ipm %r0154; CHECK-NEXT: srl %r0, 28155; CHECK-NEXT: st %r0, 0(%r2)156; CHECK-NEXT: br %r14157 ptr %ccptr) {158 %call = call {<16 x i8>, i32} @llvm.s390.vstrszf(<4 x i32> %a, <4 x i32> %b,159 <16 x i8> %c)160 %res = extractvalue {<16 x i8>, i32} %call, 0161 %cc = extractvalue {<16 x i8>, i32} %call, 1162 store i32 %cc, ptr %ccptr163 ret <16 x i8> %res164}165 166