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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; Test vector intrinsics added with z17.3;4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z17 | FileCheck %s5 6declare <16 x i8> @llvm.s390.vgemb(<8 x i16>)7declare <8 x i16> @llvm.s390.vgemh(<16 x i8>)8declare <4 x i32> @llvm.s390.vgemf(<16 x i8>)9declare <2 x i64> @llvm.s390.vgemg(<16 x i8>)10declare i128 @llvm.s390.vgemq(<16 x i8>)11 12declare i128 @llvm.s390.vuphg(<2 x i64>)13declare i128 @llvm.s390.vuplhg(<2 x i64>)14declare i128 @llvm.s390.vuplg(<2 x i64>)15declare i128 @llvm.s390.vupllg(<2 x i64>)16 17declare i128 @llvm.s390.vavgq(i128, i128)18declare i128 @llvm.s390.vavglq(i128, i128)19 20declare <16 x i8> @llvm.s390.veval(<16 x i8>, <16 x i8>, <16 x i8>, i32)21 22declare <2 x i64> @llvm.s390.vmahg(<2 x i64>, <2 x i64>, <2 x i64>)23declare i128 @llvm.s390.vmahq(i128, i128, i128)24declare <2 x i64> @llvm.s390.vmalhg(<2 x i64>, <2 x i64>, <2 x i64>)25declare i128 @llvm.s390.vmalhq(i128, i128, i128)26 27declare i128 @llvm.s390.vmaeg(<2 x i64>, <2 x i64>, i128)28declare i128 @llvm.s390.vmaleg(<2 x i64>, <2 x i64>, i128)29declare i128 @llvm.s390.vmaog(<2 x i64>, <2 x i64>, i128)30declare i128 @llvm.s390.vmalog(<2 x i64>, <2 x i64>, i128)31 32declare <2 x i64> @llvm.s390.vmhg(<2 x i64>, <2 x i64>)33declare i128 @llvm.s390.vmhq(i128, i128)34declare <2 x i64> @llvm.s390.vmlhg(<2 x i64>, <2 x i64>)35declare i128 @llvm.s390.vmlhq(i128, i128)36 37declare i128 @llvm.s390.vmeg(<2 x i64>, <2 x i64>)38declare i128 @llvm.s390.vmleg(<2 x i64>, <2 x i64>)39declare i128 @llvm.s390.vmog(<2 x i64>, <2 x i64>)40declare i128 @llvm.s390.vmlog(<2 x i64>, <2 x i64>)41 42declare {i128, i32} @llvm.s390.vceqqs(i128, i128)43declare {i128, i32} @llvm.s390.vchqs(i128, i128)44declare {i128, i32} @llvm.s390.vchlqs(i128, i128)45 46; VGEMB.47define <16 x i8> @test_vgemb(<8 x i16> %a) {48; CHECK-LABEL: test_vgemb:49; CHECK: # %bb.0:50; CHECK-NEXT: vgemb %v24, %v2451; CHECK-NEXT: br %r1452 %res = call <16 x i8> @llvm.s390.vgemb(<8 x i16> %a)53 ret <16 x i8> %res54}55 56; VGEMH.57define <8 x i16> @test_vgemh(<16 x i8> %a) {58; CHECK-LABEL: test_vgemh:59; CHECK: # %bb.0:60; CHECK-NEXT: vgemh %v24, %v2461; CHECK-NEXT: br %r1462 %res = call <8 x i16> @llvm.s390.vgemh(<16 x i8> %a)63 ret <8 x i16> %res64}65 66; VGEMF.67define <4 x i32> @test_vgemf(<16 x i8> %a) {68; CHECK-LABEL: test_vgemf:69; CHECK: # %bb.0:70; CHECK-NEXT: vgemf %v24, %v2471; CHECK-NEXT: br %r1472 %res = call <4 x i32> @llvm.s390.vgemf(<16 x i8> %a)73 ret <4 x i32> %res74}75 76; VGEMG.77define <2 x i64> @test_vgemg(<16 x i8> %a) {78; CHECK-LABEL: test_vgemg:79; CHECK: # %bb.0:80; CHECK-NEXT: vgemg %v24, %v2481; CHECK-NEXT: br %r1482 %res = call <2 x i64> @llvm.s390.vgemg(<16 x i8> %a)83 ret <2 x i64> %res84}85 86; VGEMQ.87define i128 @test_vgemq(<16 x i8> %a) {88; CHECK-LABEL: test_vgemq:89; CHECK: # %bb.0:90; CHECK-NEXT: vgemq %v0, %v2491; CHECK-NEXT: vst %v0, 0(%r2), 392; CHECK-NEXT: br %r1493 %res = call i128 @llvm.s390.vgemq(<16 x i8> %a)94 ret i128 %res95}96 97; VUPHG.98define i128 @test_vuphg(<2 x i64> %a) {99; CHECK-LABEL: test_vuphg:100; CHECK: # %bb.0:101; CHECK-NEXT: vuphg %v0, %v24102; CHECK-NEXT: vst %v0, 0(%r2), 3103; CHECK-NEXT: br %r14104 %res = call i128 @llvm.s390.vuphg(<2 x i64> %a)105 ret i128 %res106}107 108; VUPLHG.109define i128 @test_vuplhg(<2 x i64> %a) {110; CHECK-LABEL: test_vuplhg:111; CHECK: # %bb.0:112; CHECK-NEXT: vuplhg %v0, %v24113; CHECK-NEXT: vst %v0, 0(%r2), 3114; CHECK-NEXT: br %r14115 %res = call i128 @llvm.s390.vuplhg(<2 x i64> %a)116 ret i128 %res117}118 119; VUPLG.120define i128 @test_vuplg(<2 x i64> %a) {121; CHECK-LABEL: test_vuplg:122; CHECK: # %bb.0:123; CHECK-NEXT: vuplg %v0, %v24124; CHECK-NEXT: vst %v0, 0(%r2), 3125; CHECK-NEXT: br %r14126 %res = call i128 @llvm.s390.vuplg(<2 x i64> %a)127 ret i128 %res128}129 130; VUPLLG.131define i128 @test_vupllg(<2 x i64> %a) {132; CHECK-LABEL: test_vupllg:133; CHECK: # %bb.0:134; CHECK-NEXT: vupllg %v0, %v24135; CHECK-NEXT: vst %v0, 0(%r2), 3136; CHECK-NEXT: br %r14137 %res = call i128 @llvm.s390.vupllg(<2 x i64> %a)138 ret i128 %res139}140 141; VAVGQ.142define i128 @test_vavgq(i128 %a, i128 %b) {143; CHECK-LABEL: test_vavgq:144; CHECK: # %bb.0:145; CHECK-NEXT: vl %v0, 0(%r4), 3146; CHECK-NEXT: vl %v1, 0(%r3), 3147; CHECK-NEXT: vavgq %v0, %v1, %v0148; CHECK-NEXT: vst %v0, 0(%r2), 3149; CHECK-NEXT: br %r14150 %res = call i128 @llvm.s390.vavgq(i128 %a, i128 %b)151 ret i128 %res152}153 154; VAVGLQ.155define i128 @test_vavglq(i128 %a, i128 %b) {156; CHECK-LABEL: test_vavglq:157; CHECK: # %bb.0:158; CHECK-NEXT: vl %v0, 0(%r4), 3159; CHECK-NEXT: vl %v1, 0(%r3), 3160; CHECK-NEXT: vavglq %v0, %v1, %v0161; CHECK-NEXT: vst %v0, 0(%r2), 3162; CHECK-NEXT: br %r14163 %res = call i128 @llvm.s390.vavglq(i128 %a, i128 %b)164 ret i128 %res165}166 167; VEVAL.168define <16 x i8> @test_veval(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {169; CHECK-LABEL: test_veval:170; CHECK: # %bb.0:171; CHECK-NEXT: veval %v24, %v24, %v26, %v28, 123172; CHECK-NEXT: br %r14173 %res = call <16 x i8> @llvm.s390.veval(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, i32 123)174 ret <16 x i8> %res175}176 177; VMAHG.178define <2 x i64> @test_vmahg(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) {179; CHECK-LABEL: test_vmahg:180; CHECK: # %bb.0:181; CHECK-NEXT: vmahg %v24, %v24, %v26, %v28182; CHECK-NEXT: br %r14183 %res = call <2 x i64> @llvm.s390.vmahg(<2 x i64> %a, <2 x i64> %b,184 <2 x i64> %c)185 ret <2 x i64> %res186}187 188; VMAHQ.189define i128 @test_vmahq(i128 %a, i128 %b, i128 %c) {190; CHECK-LABEL: test_vmahq:191; CHECK: # %bb.0:192; CHECK-NEXT: vl %v0, 0(%r5), 3193; CHECK-NEXT: vl %v1, 0(%r4), 3194; CHECK-NEXT: vl %v2, 0(%r3), 3195; CHECK-NEXT: vmahq %v0, %v2, %v1, %v0196; CHECK-NEXT: vst %v0, 0(%r2), 3197; CHECK-NEXT: br %r14198 %res = call i128 @llvm.s390.vmahq(i128 %a, i128 %b, i128 %c)199 ret i128 %res200}201 202; VMALHG.203define <2 x i64> @test_vmalhg(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) {204; CHECK-LABEL: test_vmalhg:205; CHECK: # %bb.0:206; CHECK-NEXT: vmalhg %v24, %v24, %v26, %v28207; CHECK-NEXT: br %r14208 %res = call <2 x i64> @llvm.s390.vmalhg(<2 x i64> %a, <2 x i64> %b,209 <2 x i64> %c)210 ret <2 x i64> %res211}212 213; VMALHQ.214define i128 @test_vmalhq(i128 %a, i128 %b, i128 %c) {215; CHECK-LABEL: test_vmalhq:216; CHECK: # %bb.0:217; CHECK-NEXT: vl %v0, 0(%r5), 3218; CHECK-NEXT: vl %v1, 0(%r4), 3219; CHECK-NEXT: vl %v2, 0(%r3), 3220; CHECK-NEXT: vmalhq %v0, %v2, %v1, %v0221; CHECK-NEXT: vst %v0, 0(%r2), 3222; CHECK-NEXT: br %r14223 %res = call i128 @llvm.s390.vmalhq(i128 %a, i128 %b, i128 %c)224 ret i128 %res225}226 227; VMAEG.228define i128 @test_vmaeg(<2 x i64> %a, <2 x i64> %b, i128 %c) {229; CHECK-LABEL: test_vmaeg:230; CHECK: # %bb.0:231; CHECK-NEXT: vl %v0, 0(%r3), 3232; CHECK-NEXT: vmaeg %v0, %v24, %v26, %v0233; CHECK-NEXT: vst %v0, 0(%r2), 3234; CHECK-NEXT: br %r14235 %res = call i128 @llvm.s390.vmaeg(<2 x i64> %a, <2 x i64> %b, i128 %c)236 ret i128 %res237}238 239; VMALEG.240define i128 @test_vmaleg(<2 x i64> %a, <2 x i64> %b, i128 %c) {241; CHECK-LABEL: test_vmaleg:242; CHECK: # %bb.0:243; CHECK-NEXT: vl %v0, 0(%r3), 3244; CHECK-NEXT: vmaleg %v0, %v24, %v26, %v0245; CHECK-NEXT: vst %v0, 0(%r2), 3246; CHECK-NEXT: br %r14247 %res = call i128 @llvm.s390.vmaleg(<2 x i64> %a, <2 x i64> %b, i128 %c)248 ret i128 %res249}250 251; VMAOG.252define i128 @test_vmaog(<2 x i64> %a, <2 x i64> %b, i128 %c) {253; CHECK-LABEL: test_vmaog:254; CHECK: # %bb.0:255; CHECK-NEXT: vl %v0, 0(%r3), 3256; CHECK-NEXT: vmaog %v0, %v24, %v26, %v0257; CHECK-NEXT: vst %v0, 0(%r2), 3258; CHECK-NEXT: br %r14259 %res = call i128 @llvm.s390.vmaog(<2 x i64> %a, <2 x i64> %b, i128 %c)260 ret i128 %res261}262 263; VMALOG.264define i128 @test_vmalog(<2 x i64> %a, <2 x i64> %b, i128 %c) {265; CHECK-LABEL: test_vmalog:266; CHECK: # %bb.0:267; CHECK-NEXT: vl %v0, 0(%r3), 3268; CHECK-NEXT: vmalog %v0, %v24, %v26, %v0269; CHECK-NEXT: vst %v0, 0(%r2), 3270; CHECK-NEXT: br %r14271 %res = call i128 @llvm.s390.vmalog(<2 x i64> %a, <2 x i64> %b, i128 %c)272 ret i128 %res273}274 275; VMHG.276define <2 x i64> @test_vmhg(<2 x i64> %a, <2 x i64> %b) {277; CHECK-LABEL: test_vmhg:278; CHECK: # %bb.0:279; CHECK-NEXT: vmhg %v24, %v24, %v26280; CHECK-NEXT: br %r14281 %res = call <2 x i64> @llvm.s390.vmhg(<2 x i64> %a, <2 x i64> %b)282 ret <2 x i64> %res283}284 285; VMHQ.286define i128 @test_vmhq(i128 %a, i128 %b) {287; CHECK-LABEL: test_vmhq:288; CHECK: # %bb.0:289; CHECK-NEXT: vl %v0, 0(%r4), 3290; CHECK-NEXT: vl %v1, 0(%r3), 3291; CHECK-NEXT: vmhq %v0, %v1, %v0292; CHECK-NEXT: vst %v0, 0(%r2), 3293; CHECK-NEXT: br %r14294 %res = call i128 @llvm.s390.vmhq(i128 %a, i128 %b)295 ret i128 %res296}297 298; VMLHG.299define <2 x i64> @test_vmlhg(<2 x i64> %a, <2 x i64> %b) {300; CHECK-LABEL: test_vmlhg:301; CHECK: # %bb.0:302; CHECK-NEXT: vmlhg %v24, %v24, %v26303; CHECK-NEXT: br %r14304 %res = call <2 x i64> @llvm.s390.vmlhg(<2 x i64> %a, <2 x i64> %b)305 ret <2 x i64> %res306}307 308; VMLHQ.309define i128 @test_vmlhq(i128 %a, i128 %b) {310; CHECK-LABEL: test_vmlhq:311; CHECK: # %bb.0:312; CHECK-NEXT: vl %v0, 0(%r4), 3313; CHECK-NEXT: vl %v1, 0(%r3), 3314; CHECK-NEXT: vmlhq %v0, %v1, %v0315; CHECK-NEXT: vst %v0, 0(%r2), 3316; CHECK-NEXT: br %r14317 %res = call i128 @llvm.s390.vmlhq(i128 %a, i128 %b)318 ret i128 %res319}320 321; VMEG.322define i128 @test_vmeg(<2 x i64> %a, <2 x i64> %b) {323; CHECK-LABEL: test_vmeg:324; CHECK: # %bb.0:325; CHECK-NEXT: vmeg %v0, %v24, %v26326; CHECK-NEXT: vst %v0, 0(%r2), 3327; CHECK-NEXT: br %r14328 %res = call i128 @llvm.s390.vmeg(<2 x i64> %a, <2 x i64> %b)329 ret i128 %res330}331 332; VMLEG.333define i128 @test_vmleg(<2 x i64> %a, <2 x i64> %b) {334; CHECK-LABEL: test_vmleg:335; CHECK: # %bb.0:336; CHECK-NEXT: vmleg %v0, %v24, %v26337; CHECK-NEXT: vst %v0, 0(%r2), 3338; CHECK-NEXT: br %r14339 %res = call i128 @llvm.s390.vmleg(<2 x i64> %a, <2 x i64> %b)340 ret i128 %res341}342 343; VMOG.344define i128 @test_vmog(<2 x i64> %a, <2 x i64> %b) {345; CHECK-LABEL: test_vmog:346; CHECK: # %bb.0:347; CHECK-NEXT: vmog %v0, %v24, %v26348; CHECK-NEXT: vst %v0, 0(%r2), 3349; CHECK-NEXT: br %r14350 %res = call i128 @llvm.s390.vmog(<2 x i64> %a, <2 x i64> %b)351 ret i128 %res352}353 354; VMLOG.355define i128 @test_vmlog(<2 x i64> %a, <2 x i64> %b) {356; CHECK-LABEL: test_vmlog:357; CHECK: # %bb.0:358; CHECK-NEXT: vmlog %v0, %v24, %v26359; CHECK-NEXT: vst %v0, 0(%r2), 3360; CHECK-NEXT: br %r14361 %res = call i128 @llvm.s390.vmlog(<2 x i64> %a, <2 x i64> %b)362 ret i128 %res363}364 365; VCEQGS with no processing of the result.366define i32 @test_vceqqs(i128 %a, i128 %b) {367; CHECK-LABEL: test_vceqqs:368; CHECK: # %bb.0:369; CHECK-NEXT: vl %v0, 0(%r3), 3370; CHECK-NEXT: vl %v1, 0(%r2), 3371; CHECK-NEXT: vceqqs %v0, %v1, %v0372; CHECK-NEXT: ipm %r2373; CHECK-NEXT: srl %r2, 28374; CHECK-NEXT: br %r14375 %call = call {i128, i32} @llvm.s390.vceqqs(i128 %a, i128 %b)376 %res = extractvalue {i128, i32} %call, 1377 ret i32 %res378}379 380; VCEQGS returning 1 if all elements are equal (CC == 0).381define i32 @test_vceqqs_all_bool(i128 %a, i128 %b) {382; CHECK-LABEL: test_vceqqs_all_bool:383; CHECK: # %bb.0:384; CHECK-NEXT: vl %v0, 0(%r3), 3385; CHECK-NEXT: vl %v1, 0(%r2), 3386; CHECK-NEXT: vceqqs %v0, %v1, %v0387; CHECK-NEXT: lhi %r2, 0388; CHECK-NEXT: lochie %r2, 1389; CHECK-NEXT: br %r14390 %call = call {i128, i32} @llvm.s390.vceqqs(i128 %a, i128 %b)391 %res = extractvalue {i128, i32} %call, 1392 %cmp = icmp ult i32 %res, 1393 %ext = zext i1 %cmp to i32394 ret i32 %ext395}396 397; VCEQGS, storing to %ptr if all elements are equal.398define i128 @test_vceqqs_all_store(i128 %a, i128 %b, ptr %ptr) {399; CHECK-LABEL: test_vceqqs_all_store:400; CHECK: # %bb.0:401; CHECK-NEXT: vl %v0, 0(%r4), 3402; CHECK-NEXT: vl %v1, 0(%r3), 3403; CHECK-NEXT: vceqqs %v0, %v1, %v0404; CHECK-NEXT: jnhe .LBB30_2405; CHECK-NEXT: # %bb.1: # %store406; CHECK-NEXT: mvhi 0(%r5), 0407; CHECK-NEXT: .LBB30_2: # %exit408; CHECK-NEXT: vst %v0, 0(%r2), 3409; CHECK-NEXT: br %r14410 %call = call {i128, i32} @llvm.s390.vceqqs(i128 %a, i128 %b)411 %res = extractvalue {i128, i32} %call, 0412 %cc = extractvalue {i128, i32} %call, 1413 %cmp = icmp sle i32 %cc, 0414 br i1 %cmp, label %store, label %exit415 416store:417 store i32 0, ptr %ptr418 br label %exit419 420exit:421 ret i128 %res422}423 424; VCHGS with no processing of the result.425define i32 @test_vchqs(i128 %a, i128 %b) {426; CHECK-LABEL: test_vchqs:427; CHECK: # %bb.0:428; CHECK-NEXT: vl %v0, 0(%r3), 3429; CHECK-NEXT: vl %v1, 0(%r2), 3430; CHECK-NEXT: vchqs %v0, %v1, %v0431; CHECK-NEXT: ipm %r2432; CHECK-NEXT: srl %r2, 28433; CHECK-NEXT: br %r14434 %call = call {i128, i32} @llvm.s390.vchqs(i128 %a, i128 %b)435 %res = extractvalue {i128, i32} %call, 1436 ret i32 %res437}438 439; VCHGS returning 1 if all elements are higher (CC == 0).440define i32 @test_vchqs_all_bool(i128 %a, i128 %b) {441; CHECK-LABEL: test_vchqs_all_bool:442; CHECK: # %bb.0:443; CHECK-NEXT: vl %v0, 0(%r3), 3444; CHECK-NEXT: vl %v1, 0(%r2), 3445; CHECK-NEXT: vchqs %v0, %v1, %v0446; CHECK-NEXT: lhi %r2, 0447; CHECK-NEXT: lochie %r2, 1448; CHECK-NEXT: br %r14449 %call = call {i128, i32} @llvm.s390.vchqs(i128 %a, i128 %b)450 %res = extractvalue {i128, i32} %call, 1451 %cmp = icmp ult i32 %res, 1452 %ext = zext i1 %cmp to i32453 ret i32 %ext454}455 456; VCHGS, storing to %ptr if all elements are higher.457define i128 @test_vchqs_all_store(i128 %a, i128 %b, ptr %ptr) {458; CHECK-LABEL: test_vchqs_all_store:459; CHECK: # %bb.0:460; CHECK-NEXT: vl %v0, 0(%r4), 3461; CHECK-NEXT: vl %v1, 0(%r3), 3462; CHECK-NEXT: vchqs %v0, %v1, %v0463; CHECK-NEXT: jnhe .LBB33_2464; CHECK-NEXT: # %bb.1: # %store465; CHECK-NEXT: mvhi 0(%r5), 0466; CHECK-NEXT: .LBB33_2: # %exit467; CHECK-NEXT: vst %v0, 0(%r2), 3468; CHECK-NEXT: br %r14469 %call = call {i128, i32} @llvm.s390.vchqs(i128 %a, i128 %b)470 %res = extractvalue {i128, i32} %call, 0471 %cc = extractvalue {i128, i32} %call, 1472 %cmp = icmp sle i32 %cc, 0473 br i1 %cmp, label %store, label %exit474 475store:476 store i32 0, ptr %ptr477 br label %exit478 479exit:480 ret i128 %res481}482 483; VCHLQS with no processing of the result.484define i32 @test_vchlqs(i128 %a, i128 %b) {485; CHECK-LABEL: test_vchlqs:486; CHECK: # %bb.0:487; CHECK-NEXT: vl %v0, 0(%r3), 3488; CHECK-NEXT: vl %v1, 0(%r2), 3489; CHECK-NEXT: vchlqs %v0, %v1, %v0490; CHECK-NEXT: ipm %r2491; CHECK-NEXT: srl %r2, 28492; CHECK-NEXT: br %r14493 %call = call {i128, i32} @llvm.s390.vchlqs(i128 %a, i128 %b)494 %res = extractvalue {i128, i32} %call, 1495 ret i32 %res496}497 498; VCHLQS returning 1 if all elements are higher (CC == 0).499define i32 @test_vchlqs_all_bool(i128 %a, i128 %b) {500; CHECK-LABEL: test_vchlqs_all_bool:501; CHECK: # %bb.0:502; CHECK-NEXT: vl %v0, 0(%r3), 3503; CHECK-NEXT: vl %v1, 0(%r2), 3504; CHECK-NEXT: vchlqs %v0, %v1, %v0505; CHECK-NEXT: lhi %r2, 0506; CHECK-NEXT: lochie %r2, 1507; CHECK-NEXT: br %r14508 %call = call {i128, i32} @llvm.s390.vchlqs(i128 %a, i128 %b)509 %res = extractvalue {i128, i32} %call, 1510 %cmp = icmp slt i32 %res, 1511 %ext = zext i1 %cmp to i32512 ret i32 %ext513}514 515; VCHLQS, storing to %ptr if all elements are higher.516define i128 @test_vchlqs_all_store(i128 %a, i128 %b, ptr %ptr) {517; CHECK-LABEL: test_vchlqs_all_store:518; CHECK: # %bb.0:519; CHECK-NEXT: vl %v0, 0(%r4), 3520; CHECK-NEXT: vl %v1, 0(%r3), 3521; CHECK-NEXT: vchlqs %v0, %v1, %v0522; CHECK-NEXT: jnhe .LBB36_2523; CHECK-NEXT: # %bb.1: # %store524; CHECK-NEXT: mvhi 0(%r5), 0525; CHECK-NEXT: .LBB36_2: # %exit526; CHECK-NEXT: vst %v0, 0(%r2), 3527; CHECK-NEXT: br %r14528 %call = call {i128, i32} @llvm.s390.vchlqs(i128 %a, i128 %b)529 %res = extractvalue {i128, i32} %call, 0530 %cc = extractvalue {i128, i32} %call, 1531 %cmp = icmp ule i32 %cc, 0532 br i1 %cmp, label %store, label %exit533 534store:535 store i32 0, ptr %ptr536 br label %exit537 538exit:539 ret i128 %res540}541 542