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1; Test vector register moves.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s4 5; Test v16i8 moves.6define <16 x i8> @f1(<16 x i8> %val1, <16 x i8> %val2) {7; CHECK-LABEL: f1:8; CHECK: vlr %v24, %v269; CHECK: br %r1410 ret <16 x i8> %val211}12 13; Test v8i16 moves.14define <8 x i16> @f2(<8 x i16> %val1, <8 x i16> %val2) {15; CHECK-LABEL: f2:16; CHECK: vlr %v24, %v2617; CHECK: br %r1418 ret <8 x i16> %val219}20 21; Test v4i32 moves.22define <4 x i32> @f3(<4 x i32> %val1, <4 x i32> %val2) {23; CHECK-LABEL: f3:24; CHECK: vlr %v24, %v2625; CHECK: br %r1426 ret <4 x i32> %val227}28 29; Test v2i64 moves.30define <2 x i64> @f4(<2 x i64> %val1, <2 x i64> %val2) {31; CHECK-LABEL: f4:32; CHECK: vlr %v24, %v2633; CHECK: br %r1434 ret <2 x i64> %val235}36 37; Test v4f32 moves.38define <4 x float> @f5(<4 x float> %val1, <4 x float> %val2) {39; CHECK-LABEL: f5:40; CHECK: vlr %v24, %v2641; CHECK: br %r1442 ret <4 x float> %val243}44 45; Test v2f64 moves.46define <2 x double> @f6(<2 x double> %val1, <2 x double> %val2) {47; CHECK-LABEL: f6:48; CHECK: vlr %v24, %v2649; CHECK: br %r1450 ret <2 x double> %val251}52 53; Test v2i8 moves.54define <2 x i8> @f7(<2 x i8> %val1, <2 x i8> %val2) {55; CHECK-LABEL: f7:56; CHECK: vlr %v24, %v2657; CHECK: br %r1458 ret <2 x i8> %val259}60 61; Test v4i8 moves.62define <4 x i8> @f8(<4 x i8> %val1, <4 x i8> %val2) {63; CHECK-LABEL: f8:64; CHECK: vlr %v24, %v2665; CHECK: br %r1466 ret <4 x i8> %val267}68 69; Test v8i8 moves.70define <8 x i8> @f9(<8 x i8> %val1, <8 x i8> %val2) {71; CHECK-LABEL: f9:72; CHECK: vlr %v24, %v2673; CHECK: br %r1474 ret <8 x i8> %val275}76 77; Test v2i16 moves.78define <2 x i16> @f10(<2 x i16> %val1, <2 x i16> %val2) {79; CHECK-LABEL: f10:80; CHECK: vlr %v24, %v2681; CHECK: br %r1482 ret <2 x i16> %val283}84 85; Test v4i16 moves.86define <4 x i16> @f11(<4 x i16> %val1, <4 x i16> %val2) {87; CHECK-LABEL: f11:88; CHECK: vlr %v24, %v2689; CHECK: br %r1490 ret <4 x i16> %val291}92 93; Test v2i32 moves.94define <2 x i32> @f12(<2 x i32> %val1, <2 x i32> %val2) {95; CHECK-LABEL: f12:96; CHECK: vlr %v24, %v2697; CHECK: br %r1498 ret <2 x i32> %val299}100 101; Test v2f32 moves.102define <2 x float> @f13(<2 x float> %val1, <2 x float> %val2) {103; CHECK-LABEL: f13:104; CHECK: vlr %v24, %v26105; CHECK: br %r14106 ret <2 x float> %val2107}108