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1; Test insertions of register values into a nonzero index of an undef.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s4 5; Test v16i8 insertion into an undef, with an arbitrary index.6define <16 x i8> @f1(i8 %val) {7; CHECK-LABEL: f1:8; CHECK: vlvgb %v24, %r2, 129; CHECK-NEXT: br %r1410 %ret = insertelement <16 x i8> undef, i8 %val, i32 1211 ret <16 x i8> %ret12}13 14; Test v16i8 insertion into an undef, with the first good index for VLVGP.15define <16 x i8> @f2(i8 %val) {16; CHECK-LABEL: f2:17; CHECK: vlvgp %v24, %r2, %r218; CHECK-NEXT: br %r1419 %ret = insertelement <16 x i8> undef, i8 %val, i32 720 ret <16 x i8> %ret21}22 23; Test v16i8 insertion into an undef, with the second good index for VLVGP.24define <16 x i8> @f3(i8 %val) {25; CHECK-LABEL: f3:26; CHECK: vlvgp %v24, %r2, %r227; CHECK-NEXT: br %r1428 %ret = insertelement <16 x i8> undef, i8 %val, i32 1529 ret <16 x i8> %ret30}31 32; Test v8i16 insertion into an undef, with an arbitrary index.33define <8 x i16> @f4(i16 %val) {34; CHECK-LABEL: f4:35; CHECK: vlvgh %v24, %r2, 536; CHECK-NEXT: br %r1437 %ret = insertelement <8 x i16> undef, i16 %val, i32 538 ret <8 x i16> %ret39}40 41; Test v8i16 insertion into an undef, with the first good index for VLVGP.42define <8 x i16> @f5(i16 %val) {43; CHECK-LABEL: f5:44; CHECK: vlvgp %v24, %r2, %r245; CHECK-NEXT: br %r1446 %ret = insertelement <8 x i16> undef, i16 %val, i32 347 ret <8 x i16> %ret48}49 50; Test v8i16 insertion into an undef, with the second good index for VLVGP.51define <8 x i16> @f6(i16 %val) {52; CHECK-LABEL: f6:53; CHECK: vlvgp %v24, %r2, %r254; CHECK-NEXT: br %r1455 %ret = insertelement <8 x i16> undef, i16 %val, i32 756 ret <8 x i16> %ret57}58 59; Test v4i32 insertion into an undef, with an arbitrary index.60define <4 x i32> @f7(i32 %val) {61; CHECK-LABEL: f7:62; CHECK: vlvgf %v24, %r2, 263; CHECK-NEXT: br %r1464 %ret = insertelement <4 x i32> undef, i32 %val, i32 265 ret <4 x i32> %ret66}67 68; Test v4i32 insertion into an undef, with the first good index for VLVGP.69define <4 x i32> @f8(i32 %val) {70; CHECK-LABEL: f8:71; CHECK: vlvgp %v24, %r2, %r272; CHECK-NEXT: br %r1473 %ret = insertelement <4 x i32> undef, i32 %val, i32 174 ret <4 x i32> %ret75}76 77; Test v4i32 insertion into an undef, with the second good index for VLVGP.78define <4 x i32> @f9(i32 %val) {79; CHECK-LABEL: f9:80; CHECK: vlvgp %v24, %r2, %r281; CHECK-NEXT: br %r1482 %ret = insertelement <4 x i32> undef, i32 %val, i32 383 ret <4 x i32> %ret84}85 86; Test v2i64 insertion into an undef.87define <2 x i64> @f10(i64 %val) {88; CHECK-LABEL: f10:89; CHECK: vlvgp %v24, %r2, %r290; CHECK-NEXT: br %r1491 %ret = insertelement <2 x i64> undef, i64 %val, i32 192 ret <2 x i64> %ret93}94 95; Test v4f32 insertion into an undef.96define <4 x float> @f11(float %val) {97; CHECK-LABEL: f11:98; CHECK: vrepf %v24, %v0, 099; CHECK: br %r14100 %ret = insertelement <4 x float> undef, float %val, i32 2101 ret <4 x float> %ret102}103 104; Test v2f64 insertion into an undef.105define <2 x double> @f12(double %val) {106; CHECK-LABEL: f12:107; CHECK: vrepg %v24, %v0, 0108; CHECK: br %r14109 %ret = insertelement <2 x double> undef, double %val, i32 1110 ret <2 x double> %ret111}112