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1; Test insertions of register values into 0.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s4 5; Test v16i8 insertion into 0.6define <16 x i8> @f1(i8 %val1, i8 %val2) {7; CHECK-LABEL: f1:8; CHECK: vgbm %v24, 09; CHECK-DAG: vlvgb %v24, %r2, 210; CHECK-DAG: vlvgb %v24, %r3, 1211; CHECK: br %r1412 %vec1 = insertelement <16 x i8> zeroinitializer, i8 %val1, i32 213 %vec2 = insertelement <16 x i8> %vec1, i8 %val2, i32 1214 ret <16 x i8> %vec215}16 17; Test v8i16 insertion into 0.18define <8 x i16> @f2(i16 %val1, i16 %val2) {19; CHECK-LABEL: f2:20; CHECK: vgbm %v24, 021; CHECK-DAG: vlvgh %v24, %r2, 322; CHECK-DAG: vlvgh %v24, %r3, 523; CHECK: br %r1424 %vec1 = insertelement <8 x i16> zeroinitializer, i16 %val1, i32 325 %vec2 = insertelement <8 x i16> %vec1, i16 %val2, i32 526 ret <8 x i16> %vec227}28 29; Test v4i32 insertion into 0.30define <4 x i32> @f3(i32 %val) {31; CHECK-LABEL: f3:32; CHECK: vgbm %v24, 033; CHECK: vlvgf %v24, %r2, 334; CHECK: br %r1435 %ret = insertelement <4 x i32> zeroinitializer, i32 %val, i32 336 ret <4 x i32> %ret37}38 39; Test v2i64 insertion into 0.40define <2 x i64> @f4(i64 %val) {41; CHECK-LABEL: f4:42; CHECK: lghi [[REG:%r[0-5]]], 043; CHECK: vlvgp %v24, [[REG]], %r244; CHECK: br %r1445 %ret = insertelement <2 x i64> zeroinitializer, i64 %val, i32 146 ret <2 x i64> %ret47}48 49; Test v4f32 insertion into 0.50define <4 x float> @f5(float %val) {51; CHECK-LABEL: f5:52; CHECK-DAG: vuplhf [[REG:%v[0-9]+]], %v053; CHECK-DAG: vgbm [[ZERO:%v[0-9]+]], 054; CHECK: vmrhg %v24, [[ZERO]], [[REG]]55; CHECK: br %r1456 %ret = insertelement <4 x float> zeroinitializer, float %val, i32 357 ret <4 x float> %ret58}59 60; Test v2f64 insertion into 0.61define <2 x double> @f6(double %val) {62; CHECK-LABEL: f6:63; CHECK: vgbm [[REG:%v[0-9]+]], 064; CHECK: vmrhg %v24, [[REG]], %v065; CHECK: br %r1466 %ret = insertelement <2 x double> zeroinitializer, double %val, i32 167 ret <2 x double> %ret68}69 70