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1; Test vector negation on z14.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s4 5; Test a v4f32 negation.6define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val) {7; CHECK-LABEL: f1:8; CHECK: vflcsb %v24, %v269; CHECK: br %r1410 %ret = fneg <4 x float> %val11 ret <4 x float> %ret12}13 14; Test an f32 negation that uses vector registers.15define float @f2(<4 x float> %val) {16; CHECK-LABEL: f2:17; CHECK: wflcsb %f0, %v2418; CHECK: br %r1419 %scalar = extractelement <4 x float> %val, i32 020 %ret = fneg float %scalar21 ret float %ret22}23