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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; Test reduction of vector comparisons3;4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z16 | FileCheck %s5 6define zeroext i1 @vec_all_eq_vsc(<16 x i8> %a, <16 x i8> %b) {7; CHECK-LABEL: vec_all_eq_vsc:8; CHECK: # %bb.0: # %entry9; CHECK-NEXT: vceqbs %v0, %v24, %v2610; CHECK-NEXT: lghi %r2, 011; CHECK-NEXT: locghie %r2, 112; CHECK-NEXT: br %r1413entry:14 %0 = icmp ne <16 x i8> %a, %b15 %1 = bitcast <16 x i1> %0 to i1616 %2 = icmp eq i16 %1, 017 ret i1 %218}19 20define zeroext i1 @vec_any_eq_vsc(<16 x i8> %a, <16 x i8> %b) {21; CHECK-LABEL: vec_any_eq_vsc:22; CHECK: # %bb.0: # %entry23; CHECK-NEXT: vceqbs %v0, %v24, %v2624; CHECK-NEXT: lghi %r2, 025; CHECK-NEXT: locghile %r2, 126; CHECK-NEXT: br %r1427entry:28 %cmp = icmp eq <16 x i8> %a, %b29 %0 = bitcast <16 x i1> %cmp to i1630 %1 = icmp ne i16 %0, 031 ret i1 %132}33 34define zeroext i1 @not_vec_all_eq_vsc(<16 x i8> %a, <16 x i8> %b) {35; CHECK-LABEL: not_vec_all_eq_vsc:36; CHECK: # %bb.0: # %entry37; CHECK-NEXT: vceqbs %v0, %v24, %v2638; CHECK-NEXT: lghi %r2, 039; CHECK-NEXT: locghinhe %r2, 140; CHECK-NEXT: br %r1441entry:42 %0 = icmp ne <16 x i8> %a, %b43 %1 = bitcast <16 x i1> %0 to i1644 %2 = icmp ne i16 %1, 045 ret i1 %246}47 48define zeroext i1 @not_vec_any_eq_vsc(<16 x i8> %a, <16 x i8> %b) {49; CHECK-LABEL: not_vec_any_eq_vsc:50; CHECK: # %bb.0: # %entry51; CHECK-NEXT: vceqbs %v0, %v24, %v2652; CHECK-NEXT: lghi %r2, 053; CHECK-NEXT: locghio %r2, 154; CHECK-NEXT: br %r1455entry:56 %cmp = icmp eq <16 x i8> %a, %b57 %0 = bitcast <16 x i1> %cmp to i1658 %.not = icmp eq i16 %0, 059 ret i1 %.not60}61 62define zeroext i1 @vec_all_eq_vuc(<16 x i8> %a, <16 x i8> %b) {63; CHECK-LABEL: vec_all_eq_vuc:64; CHECK: # %bb.0: # %entry65; CHECK-NEXT: vceqbs %v0, %v24, %v2666; CHECK-NEXT: lghi %r2, 067; CHECK-NEXT: locghie %r2, 168; CHECK-NEXT: br %r1469entry:70 %0 = icmp ne <16 x i8> %a, %b71 %1 = bitcast <16 x i1> %0 to i1672 %2 = icmp eq i16 %1, 073 ret i1 %274}75 76define zeroext i1 @vec_any_eq_vuc(<16 x i8> %a, <16 x i8> %b) {77; CHECK-LABEL: vec_any_eq_vuc:78; CHECK: # %bb.0: # %entry79; CHECK-NEXT: vceqbs %v0, %v24, %v2680; CHECK-NEXT: lghi %r2, 081; CHECK-NEXT: locghile %r2, 182; CHECK-NEXT: br %r1483entry:84 %cmp = icmp eq <16 x i8> %a, %b85 %0 = bitcast <16 x i1> %cmp to i1686 %1 = icmp ne i16 %0, 087 ret i1 %188}89 90define zeroext i1 @not_vec_all_eq_vuc(<16 x i8> %a, <16 x i8> %b) {91; CHECK-LABEL: not_vec_all_eq_vuc:92; CHECK: # %bb.0: # %entry93; CHECK-NEXT: vceqbs %v0, %v24, %v2694; CHECK-NEXT: lghi %r2, 095; CHECK-NEXT: locghinhe %r2, 196; CHECK-NEXT: br %r1497entry:98 %0 = icmp ne <16 x i8> %a, %b99 %1 = bitcast <16 x i1> %0 to i16100 %2 = icmp ne i16 %1, 0101 ret i1 %2102}103 104define zeroext i1 @not_vec_any_eq_vuc(<16 x i8> %a, <16 x i8> %b) {105; CHECK-LABEL: not_vec_any_eq_vuc:106; CHECK: # %bb.0: # %entry107; CHECK-NEXT: vceqbs %v0, %v24, %v26108; CHECK-NEXT: lghi %r2, 0109; CHECK-NEXT: locghio %r2, 1110; CHECK-NEXT: br %r14111entry:112 %cmp = icmp eq <16 x i8> %a, %b113 %0 = bitcast <16 x i1> %cmp to i16114 %.not = icmp eq i16 %0, 0115 ret i1 %.not116}117 118define zeroext i1 @vec_all_eq_vss(<8 x i16> %a, <8 x i16> %b) {119; CHECK-LABEL: vec_all_eq_vss:120; CHECK: # %bb.0: # %entry121; CHECK-NEXT: vceqhs %v0, %v24, %v26122; CHECK-NEXT: lghi %r2, 0123; CHECK-NEXT: locghie %r2, 1124; CHECK-NEXT: br %r14125entry:126 %0 = icmp ne <8 x i16> %a, %b127 %1 = bitcast <8 x i1> %0 to i8128 %2 = icmp eq i8 %1, 0129 ret i1 %2130}131 132define zeroext i1 @vec_any_eq_vss(<8 x i16> %a, <8 x i16> %b) {133; CHECK-LABEL: vec_any_eq_vss:134; CHECK: # %bb.0: # %entry135; CHECK-NEXT: vceqhs %v0, %v24, %v26136; CHECK-NEXT: lghi %r2, 0137; CHECK-NEXT: locghile %r2, 1138; CHECK-NEXT: br %r14139entry:140 %cmp = icmp eq <8 x i16> %a, %b141 %0 = bitcast <8 x i1> %cmp to i8142 %1 = icmp ne i8 %0, 0143 ret i1 %1144}145 146define zeroext i1 @not_vec_all_eq_vss(<8 x i16> %a, <8 x i16> %b) {147; CHECK-LABEL: not_vec_all_eq_vss:148; CHECK: # %bb.0: # %entry149; CHECK-NEXT: vceqhs %v0, %v24, %v26150; CHECK-NEXT: lghi %r2, 0151; CHECK-NEXT: locghinhe %r2, 1152; CHECK-NEXT: br %r14153entry:154 %0 = icmp ne <8 x i16> %a, %b155 %1 = bitcast <8 x i1> %0 to i8156 %2 = icmp ne i8 %1, 0157 ret i1 %2158}159 160define zeroext i1 @not_vec_any_eq_vss(<8 x i16> %a, <8 x i16> %b) {161; CHECK-LABEL: not_vec_any_eq_vss:162; CHECK: # %bb.0: # %entry163; CHECK-NEXT: vceqhs %v0, %v24, %v26164; CHECK-NEXT: lghi %r2, 0165; CHECK-NEXT: locghio %r2, 1166; CHECK-NEXT: br %r14167entry:168 %cmp = icmp eq <8 x i16> %a, %b169 %0 = bitcast <8 x i1> %cmp to i8170 %.not = icmp eq i8 %0, 0171 ret i1 %.not172}173 174define zeroext i1 @vec_all_eq_vus(<8 x i16> %a, <8 x i16> %b) {175; CHECK-LABEL: vec_all_eq_vus:176; CHECK: # %bb.0: # %entry177; CHECK-NEXT: vceqhs %v0, %v24, %v26178; CHECK-NEXT: lghi %r2, 0179; CHECK-NEXT: locghie %r2, 1180; CHECK-NEXT: br %r14181entry:182 %0 = icmp ne <8 x i16> %a, %b183 %1 = bitcast <8 x i1> %0 to i8184 %2 = icmp eq i8 %1, 0185 ret i1 %2186}187 188define zeroext i1 @vec_any_eq_vus(<8 x i16> %a, <8 x i16> %b) {189; CHECK-LABEL: vec_any_eq_vus:190; CHECK: # %bb.0: # %entry191; CHECK-NEXT: vceqhs %v0, %v24, %v26192; CHECK-NEXT: lghi %r2, 0193; CHECK-NEXT: locghile %r2, 1194; CHECK-NEXT: br %r14195entry:196 %cmp = icmp eq <8 x i16> %a, %b197 %0 = bitcast <8 x i1> %cmp to i8198 %1 = icmp ne i8 %0, 0199 ret i1 %1200}201 202define zeroext i1 @not_vec_all_eq_vus(<8 x i16> %a, <8 x i16> %b) {203; CHECK-LABEL: not_vec_all_eq_vus:204; CHECK: # %bb.0: # %entry205; CHECK-NEXT: vceqhs %v0, %v24, %v26206; CHECK-NEXT: lghi %r2, 0207; CHECK-NEXT: locghinhe %r2, 1208; CHECK-NEXT: br %r14209entry:210 %0 = icmp ne <8 x i16> %a, %b211 %1 = bitcast <8 x i1> %0 to i8212 %2 = icmp ne i8 %1, 0213 ret i1 %2214}215 216define zeroext i1 @not_vec_any_eq_vus(<8 x i16> %a, <8 x i16> %b) {217; CHECK-LABEL: not_vec_any_eq_vus:218; CHECK: # %bb.0: # %entry219; CHECK-NEXT: vceqhs %v0, %v24, %v26220; CHECK-NEXT: lghi %r2, 0221; CHECK-NEXT: locghio %r2, 1222; CHECK-NEXT: br %r14223entry:224 %cmp = icmp eq <8 x i16> %a, %b225 %0 = bitcast <8 x i1> %cmp to i8226 %.not = icmp eq i8 %0, 0227 ret i1 %.not228}229 230define zeroext i1 @vec_all_eq_vsi(<4 x i32> %a, <4 x i32> %b) {231; CHECK-LABEL: vec_all_eq_vsi:232; CHECK: # %bb.0: # %entry233; CHECK-NEXT: vceqfs %v0, %v24, %v26234; CHECK-NEXT: lghi %r2, 0235; CHECK-NEXT: locghie %r2, 1236; CHECK-NEXT: br %r14237entry:238 %0 = icmp ne <4 x i32> %a, %b239 %1 = bitcast <4 x i1> %0 to i4240 %2 = icmp eq i4 %1, 0241 ret i1 %2242}243 244define zeroext i1 @vec_any_eq_vsi(<4 x i32> %a, <4 x i32> %b) {245; CHECK-LABEL: vec_any_eq_vsi:246; CHECK: # %bb.0: # %entry247; CHECK-NEXT: vceqfs %v0, %v24, %v26248; CHECK-NEXT: lghi %r2, 0249; CHECK-NEXT: locghile %r2, 1250; CHECK-NEXT: br %r14251entry:252 %cmp = icmp eq <4 x i32> %a, %b253 %0 = bitcast <4 x i1> %cmp to i4254 %1 = icmp ne i4 %0, 0255 ret i1 %1256}257 258define zeroext i1 @not_vec_all_eq_vsi(<4 x i32> %a, <4 x i32> %b) {259; CHECK-LABEL: not_vec_all_eq_vsi:260; CHECK: # %bb.0: # %entry261; CHECK-NEXT: vceqfs %v0, %v24, %v26262; CHECK-NEXT: lghi %r2, 0263; CHECK-NEXT: locghinhe %r2, 1264; CHECK-NEXT: br %r14265entry:266 %0 = icmp ne <4 x i32> %a, %b267 %1 = bitcast <4 x i1> %0 to i4268 %2 = icmp ne i4 %1, 0269 ret i1 %2270}271 272define zeroext i1 @not_vec_any_eq_vsi(<4 x i32> %a, <4 x i32> %b) {273; CHECK-LABEL: not_vec_any_eq_vsi:274; CHECK: # %bb.0: # %entry275; CHECK-NEXT: vceqfs %v0, %v24, %v26276; CHECK-NEXT: lghi %r2, 0277; CHECK-NEXT: locghio %r2, 1278; CHECK-NEXT: br %r14279entry:280 %cmp = icmp eq <4 x i32> %a, %b281 %0 = bitcast <4 x i1> %cmp to i4282 %.not = icmp eq i4 %0, 0283 ret i1 %.not284}285 286define zeroext i1 @vec_all_eq_vui(<4 x i32> %a, <4 x i32> %b) {287; CHECK-LABEL: vec_all_eq_vui:288; CHECK: # %bb.0: # %entry289; CHECK-NEXT: vceqfs %v0, %v24, %v26290; CHECK-NEXT: lghi %r2, 0291; CHECK-NEXT: locghie %r2, 1292; CHECK-NEXT: br %r14293entry:294 %0 = icmp ne <4 x i32> %a, %b295 %1 = bitcast <4 x i1> %0 to i4296 %2 = icmp eq i4 %1, 0297 ret i1 %2298}299 300define zeroext i1 @vec_any_eq_vui(<4 x i32> %a, <4 x i32> %b) {301; CHECK-LABEL: vec_any_eq_vui:302; CHECK: # %bb.0: # %entry303; CHECK-NEXT: vceqfs %v0, %v24, %v26304; CHECK-NEXT: lghi %r2, 0305; CHECK-NEXT: locghile %r2, 1306; CHECK-NEXT: br %r14307entry:308 %cmp = icmp eq <4 x i32> %a, %b309 %0 = bitcast <4 x i1> %cmp to i4310 %1 = icmp ne i4 %0, 0311 ret i1 %1312}313 314define zeroext i1 @not_vec_all_eq_vui(<4 x i32> %a, <4 x i32> %b) {315; CHECK-LABEL: not_vec_all_eq_vui:316; CHECK: # %bb.0: # %entry317; CHECK-NEXT: vceqfs %v0, %v24, %v26318; CHECK-NEXT: lghi %r2, 0319; CHECK-NEXT: locghinhe %r2, 1320; CHECK-NEXT: br %r14321entry:322 %0 = icmp ne <4 x i32> %a, %b323 %1 = bitcast <4 x i1> %0 to i4324 %2 = icmp ne i4 %1, 0325 ret i1 %2326}327 328define zeroext i1 @not_vec_any_eq_vui(<4 x i32> %a, <4 x i32> %b) {329; CHECK-LABEL: not_vec_any_eq_vui:330; CHECK: # %bb.0: # %entry331; CHECK-NEXT: vceqfs %v0, %v24, %v26332; CHECK-NEXT: lghi %r2, 0333; CHECK-NEXT: locghio %r2, 1334; CHECK-NEXT: br %r14335entry:336 %cmp = icmp eq <4 x i32> %a, %b337 %0 = bitcast <4 x i1> %cmp to i4338 %.not = icmp eq i4 %0, 0339 ret i1 %.not340}341 342define zeroext i1 @vec_all_eq_vsl(<2 x i64> %a, <2 x i64> %b) {343; CHECK-LABEL: vec_all_eq_vsl:344; CHECK: # %bb.0: # %entry345; CHECK-NEXT: vceqgs %v0, %v24, %v26346; CHECK-NEXT: lghi %r2, 0347; CHECK-NEXT: locghie %r2, 1348; CHECK-NEXT: br %r14349entry:350 %0 = icmp ne <2 x i64> %a, %b351 %1 = bitcast <2 x i1> %0 to i2352 %2 = icmp eq i2 %1, 0353 ret i1 %2354}355 356define zeroext i1 @vec_any_eq_vsl(<2 x i64> %a, <2 x i64> %b) {357; CHECK-LABEL: vec_any_eq_vsl:358; CHECK: # %bb.0: # %entry359; CHECK-NEXT: vceqgs %v0, %v24, %v26360; CHECK-NEXT: lghi %r2, 0361; CHECK-NEXT: locghile %r2, 1362; CHECK-NEXT: br %r14363entry:364 %cmp = icmp eq <2 x i64> %a, %b365 %0 = bitcast <2 x i1> %cmp to i2366 %1 = icmp ne i2 %0, 0367 ret i1 %1368}369 370define zeroext i1 @not_vec_all_eq_vsl(<2 x i64> %a, <2 x i64> %b) {371; CHECK-LABEL: not_vec_all_eq_vsl:372; CHECK: # %bb.0: # %entry373; CHECK-NEXT: vceqgs %v0, %v24, %v26374; CHECK-NEXT: lghi %r2, 0375; CHECK-NEXT: locghinhe %r2, 1376; CHECK-NEXT: br %r14377entry:378 %0 = icmp ne <2 x i64> %a, %b379 %1 = bitcast <2 x i1> %0 to i2380 %2 = icmp ne i2 %1, 0381 ret i1 %2382}383 384define zeroext i1 @not_vec_any_eq_vsl(<2 x i64> %a, <2 x i64> %b) {385; CHECK-LABEL: not_vec_any_eq_vsl:386; CHECK: # %bb.0: # %entry387; CHECK-NEXT: vceqgs %v0, %v24, %v26388; CHECK-NEXT: lghi %r2, 0389; CHECK-NEXT: locghio %r2, 1390; CHECK-NEXT: br %r14391entry:392 %cmp = icmp eq <2 x i64> %a, %b393 %0 = bitcast <2 x i1> %cmp to i2394 %.not = icmp eq i2 %0, 0395 ret i1 %.not396}397 398define zeroext i1 @vec_all_eq_vul(<2 x i64> %a, <2 x i64> %b) {399; CHECK-LABEL: vec_all_eq_vul:400; CHECK: # %bb.0: # %entry401; CHECK-NEXT: vceqgs %v0, %v24, %v26402; CHECK-NEXT: lghi %r2, 0403; CHECK-NEXT: locghie %r2, 1404; CHECK-NEXT: br %r14405entry:406 %0 = icmp ne <2 x i64> %a, %b407 %1 = bitcast <2 x i1> %0 to i2408 %2 = icmp eq i2 %1, 0409 ret i1 %2410}411 412define zeroext i1 @vec_any_eq_vul(<2 x i64> %a, <2 x i64> %b) {413; CHECK-LABEL: vec_any_eq_vul:414; CHECK: # %bb.0: # %entry415; CHECK-NEXT: vceqgs %v0, %v24, %v26416; CHECK-NEXT: lghi %r2, 0417; CHECK-NEXT: locghile %r2, 1418; CHECK-NEXT: br %r14419entry:420 %cmp = icmp eq <2 x i64> %a, %b421 %0 = bitcast <2 x i1> %cmp to i2422 %1 = icmp ne i2 %0, 0423 ret i1 %1424}425 426define zeroext i1 @not_vec_all_eq_vul(<2 x i64> %a, <2 x i64> %b) {427; CHECK-LABEL: not_vec_all_eq_vul:428; CHECK: # %bb.0: # %entry429; CHECK-NEXT: vceqgs %v0, %v24, %v26430; CHECK-NEXT: lghi %r2, 0431; CHECK-NEXT: locghinhe %r2, 1432; CHECK-NEXT: br %r14433entry:434 %0 = icmp ne <2 x i64> %a, %b435 %1 = bitcast <2 x i1> %0 to i2436 %2 = icmp ne i2 %1, 0437 ret i1 %2438}439 440define zeroext i1 @not_vec_any_eq_vul(<2 x i64> %a, <2 x i64> %b) {441; CHECK-LABEL: not_vec_any_eq_vul:442; CHECK: # %bb.0: # %entry443; CHECK-NEXT: vceqgs %v0, %v24, %v26444; CHECK-NEXT: lghi %r2, 0445; CHECK-NEXT: locghio %r2, 1446; CHECK-NEXT: br %r14447entry:448 %cmp = icmp eq <2 x i64> %a, %b449 %0 = bitcast <2 x i1> %cmp to i2450 %.not = icmp eq i2 %0, 0451 ret i1 %.not452}453 454define zeroext i1 @vec_all_eq_vf(<4 x float> %a, <4 x float> %b) {455; CHECK-LABEL: vec_all_eq_vf:456; CHECK: # %bb.0: # %entry457; CHECK-NEXT: vfcesbs %v0, %v24, %v26458; CHECK-NEXT: lghi %r2, 0459; CHECK-NEXT: locghie %r2, 1460; CHECK-NEXT: br %r14461entry:462 %0 = fcmp une <4 x float> %a, %b463 %1 = bitcast <4 x i1> %0 to i4464 %2 = icmp eq i4 %1, 0465 ret i1 %2466}467 468define zeroext i1 @vec_any_eq_vf(<4 x float> %a, <4 x float> %b) {469; CHECK-LABEL: vec_any_eq_vf:470; CHECK: # %bb.0: # %entry471; CHECK-NEXT: vfcesbs %v0, %v24, %v26472; CHECK-NEXT: lghi %r2, 0473; CHECK-NEXT: locghile %r2, 1474; CHECK-NEXT: br %r14475entry:476 %cmp = fcmp oeq <4 x float> %a, %b477 %0 = bitcast <4 x i1> %cmp to i4478 %1 = icmp ne i4 %0, 0479 ret i1 %1480}481 482define zeroext i1 @not_vec_all_eq_vf(<4 x float> %a, <4 x float> %b) {483; CHECK-LABEL: not_vec_all_eq_vf:484; CHECK: # %bb.0: # %entry485; CHECK-NEXT: vfcesbs %v0, %v24, %v26486; CHECK-NEXT: lghi %r2, 0487; CHECK-NEXT: locghinhe %r2, 1488; CHECK-NEXT: br %r14489entry:490 %0 = fcmp une <4 x float> %a, %b491 %1 = bitcast <4 x i1> %0 to i4492 %2 = icmp ne i4 %1, 0493 ret i1 %2494}495 496define zeroext i1 @not_vec_any_eq_vf(<4 x float> %a, <4 x float> %b) {497; CHECK-LABEL: not_vec_any_eq_vf:498; CHECK: # %bb.0: # %entry499; CHECK-NEXT: vfcesbs %v0, %v24, %v26500; CHECK-NEXT: lghi %r2, 0501; CHECK-NEXT: locghio %r2, 1502; CHECK-NEXT: br %r14503entry:504 %cmp = fcmp oeq <4 x float> %a, %b505 %0 = bitcast <4 x i1> %cmp to i4506 %.not = icmp eq i4 %0, 0507 ret i1 %.not508}509 510define zeroext i1 @vec_all_eq_vd(<2 x double> %a, <2 x double> %b) {511; CHECK-LABEL: vec_all_eq_vd:512; CHECK: # %bb.0: # %entry513; CHECK-NEXT: vfcedbs %v0, %v24, %v26514; CHECK-NEXT: lghi %r2, 0515; CHECK-NEXT: locghie %r2, 1516; CHECK-NEXT: br %r14517entry:518 %0 = fcmp une <2 x double> %a, %b519 %1 = bitcast <2 x i1> %0 to i2520 %2 = icmp eq i2 %1, 0521 ret i1 %2522}523 524define zeroext i1 @vec_any_eq_vd(<2 x double> %a, <2 x double> %b) {525; CHECK-LABEL: vec_any_eq_vd:526; CHECK: # %bb.0: # %entry527; CHECK-NEXT: vfcedbs %v0, %v24, %v26528; CHECK-NEXT: lghi %r2, 0529; CHECK-NEXT: locghile %r2, 1530; CHECK-NEXT: br %r14531entry:532 %cmp = fcmp oeq <2 x double> %a, %b533 %0 = bitcast <2 x i1> %cmp to i2534 %1 = icmp ne i2 %0, 0535 ret i1 %1536}537 538define zeroext i1 @not_vec_all_eq_vd(<2 x double> %a, <2 x double> %b) {539; CHECK-LABEL: not_vec_all_eq_vd:540; CHECK: # %bb.0: # %entry541; CHECK-NEXT: vfcedbs %v0, %v24, %v26542; CHECK-NEXT: lghi %r2, 0543; CHECK-NEXT: locghinhe %r2, 1544; CHECK-NEXT: br %r14545entry:546 %0 = fcmp une <2 x double> %a, %b547 %1 = bitcast <2 x i1> %0 to i2548 %2 = icmp ne i2 %1, 0549 ret i1 %2550}551 552define zeroext i1 @not_vec_any_eq_vd(<2 x double> %a, <2 x double> %b) {553; CHECK-LABEL: not_vec_any_eq_vd:554; CHECK: # %bb.0: # %entry555; CHECK-NEXT: vfcedbs %v0, %v24, %v26556; CHECK-NEXT: lghi %r2, 0557; CHECK-NEXT: locghio %r2, 1558; CHECK-NEXT: br %r14559entry:560 %cmp = fcmp oeq <2 x double> %a, %b561 %0 = bitcast <2 x i1> %cmp to i2562 %.not = icmp eq i2 %0, 0563 ret i1 %.not564}565 566define zeroext i1 @vec_all_ne_vsc(<16 x i8> %a, <16 x i8> %b) {567; CHECK-LABEL: vec_all_ne_vsc:568; CHECK: # %bb.0: # %entry569; CHECK-NEXT: vceqbs %v0, %v24, %v26570; CHECK-NEXT: lghi %r2, 0571; CHECK-NEXT: locghio %r2, 1572; CHECK-NEXT: br %r14573entry:574 %0 = icmp eq <16 x i8> %a, %b575 %1 = bitcast <16 x i1> %0 to i16576 %2 = icmp eq i16 %1, 0577 ret i1 %2578}579 580define zeroext i1 @vec_any_ne_vsc(<16 x i8> %a, <16 x i8> %b) {581; CHECK-LABEL: vec_any_ne_vsc:582; CHECK: # %bb.0: # %entry583; CHECK-NEXT: vceqbs %v0, %v24, %v26584; CHECK-NEXT: lghi %r2, 0585; CHECK-NEXT: locghinhe %r2, 1586; CHECK-NEXT: br %r14587entry:588 %cmp = icmp ne <16 x i8> %a, %b589 %0 = bitcast <16 x i1> %cmp to i16590 %1 = icmp ne i16 %0, 0591 ret i1 %1592}593 594define zeroext i1 @not_vec_all_ne_vsc(<16 x i8> %a, <16 x i8> %b) {595; CHECK-LABEL: not_vec_all_ne_vsc:596; CHECK: # %bb.0: # %entry597; CHECK-NEXT: vceqbs %v0, %v24, %v26598; CHECK-NEXT: lghi %r2, 0599; CHECK-NEXT: locghile %r2, 1600; CHECK-NEXT: br %r14601entry:602 %0 = icmp eq <16 x i8> %a, %b603 %1 = bitcast <16 x i1> %0 to i16604 %2 = icmp ne i16 %1, 0605 ret i1 %2606}607 608define zeroext i1 @not_vec_any_ne_vsc(<16 x i8> %a, <16 x i8> %b) {609; CHECK-LABEL: not_vec_any_ne_vsc:610; CHECK: # %bb.0: # %entry611; CHECK-NEXT: vceqbs %v0, %v24, %v26612; CHECK-NEXT: lghi %r2, 0613; CHECK-NEXT: locghie %r2, 1614; CHECK-NEXT: br %r14615entry:616 %cmp = icmp ne <16 x i8> %a, %b617 %0 = bitcast <16 x i1> %cmp to i16618 %.not = icmp eq i16 %0, 0619 ret i1 %.not620}621 622define zeroext i1 @vec_all_ne_vuc(<16 x i8> %a, <16 x i8> %b) {623; CHECK-LABEL: vec_all_ne_vuc:624; CHECK: # %bb.0: # %entry625; CHECK-NEXT: vceqbs %v0, %v24, %v26626; CHECK-NEXT: lghi %r2, 0627; CHECK-NEXT: locghio %r2, 1628; CHECK-NEXT: br %r14629entry:630 %0 = icmp eq <16 x i8> %a, %b631 %1 = bitcast <16 x i1> %0 to i16632 %2 = icmp eq i16 %1, 0633 ret i1 %2634}635 636define zeroext i1 @vec_any_ne_vuc(<16 x i8> %a, <16 x i8> %b) {637; CHECK-LABEL: vec_any_ne_vuc:638; CHECK: # %bb.0: # %entry639; CHECK-NEXT: vceqbs %v0, %v24, %v26640; CHECK-NEXT: lghi %r2, 0641; CHECK-NEXT: locghinhe %r2, 1642; CHECK-NEXT: br %r14643entry:644 %cmp = icmp ne <16 x i8> %a, %b645 %0 = bitcast <16 x i1> %cmp to i16646 %1 = icmp ne i16 %0, 0647 ret i1 %1648}649 650define zeroext i1 @not_vec_all_ne_vuc(<16 x i8> %a, <16 x i8> %b) {651; CHECK-LABEL: not_vec_all_ne_vuc:652; CHECK: # %bb.0: # %entry653; CHECK-NEXT: vceqbs %v0, %v24, %v26654; CHECK-NEXT: lghi %r2, 0655; CHECK-NEXT: locghile %r2, 1656; CHECK-NEXT: br %r14657entry:658 %0 = icmp eq <16 x i8> %a, %b659 %1 = bitcast <16 x i1> %0 to i16660 %2 = icmp ne i16 %1, 0661 ret i1 %2662}663 664define zeroext i1 @not_vec_any_ne_vuc(<16 x i8> %a, <16 x i8> %b) {665; CHECK-LABEL: not_vec_any_ne_vuc:666; CHECK: # %bb.0: # %entry667; CHECK-NEXT: vceqbs %v0, %v24, %v26668; CHECK-NEXT: lghi %r2, 0669; CHECK-NEXT: locghie %r2, 1670; CHECK-NEXT: br %r14671entry:672 %cmp = icmp ne <16 x i8> %a, %b673 %0 = bitcast <16 x i1> %cmp to i16674 %.not = icmp eq i16 %0, 0675 ret i1 %.not676}677 678define zeroext i1 @vec_all_ne_vss(<8 x i16> %a, <8 x i16> %b) {679; CHECK-LABEL: vec_all_ne_vss:680; CHECK: # %bb.0: # %entry681; CHECK-NEXT: vceqhs %v0, %v24, %v26682; CHECK-NEXT: lghi %r2, 0683; CHECK-NEXT: locghio %r2, 1684; CHECK-NEXT: br %r14685entry:686 %0 = icmp eq <8 x i16> %a, %b687 %1 = bitcast <8 x i1> %0 to i8688 %2 = icmp eq i8 %1, 0689 ret i1 %2690}691 692define zeroext i1 @vec_any_ne_vss(<8 x i16> %a, <8 x i16> %b) {693; CHECK-LABEL: vec_any_ne_vss:694; CHECK: # %bb.0: # %entry695; CHECK-NEXT: vceqhs %v0, %v24, %v26696; CHECK-NEXT: lghi %r2, 0697; CHECK-NEXT: locghinhe %r2, 1698; CHECK-NEXT: br %r14699entry:700 %cmp = icmp ne <8 x i16> %a, %b701 %0 = bitcast <8 x i1> %cmp to i8702 %1 = icmp ne i8 %0, 0703 ret i1 %1704}705 706define zeroext i1 @not_vec_all_ne_vss(<8 x i16> %a, <8 x i16> %b) {707; CHECK-LABEL: not_vec_all_ne_vss:708; CHECK: # %bb.0: # %entry709; CHECK-NEXT: vceqhs %v0, %v24, %v26710; CHECK-NEXT: lghi %r2, 0711; CHECK-NEXT: locghile %r2, 1712; CHECK-NEXT: br %r14713entry:714 %0 = icmp eq <8 x i16> %a, %b715 %1 = bitcast <8 x i1> %0 to i8716 %2 = icmp ne i8 %1, 0717 ret i1 %2718}719 720define zeroext i1 @not_vec_any_ne_vss(<8 x i16> %a, <8 x i16> %b) {721; CHECK-LABEL: not_vec_any_ne_vss:722; CHECK: # %bb.0: # %entry723; CHECK-NEXT: vceqhs %v0, %v24, %v26724; CHECK-NEXT: lghi %r2, 0725; CHECK-NEXT: locghie %r2, 1726; CHECK-NEXT: br %r14727entry:728 %cmp = icmp ne <8 x i16> %a, %b729 %0 = bitcast <8 x i1> %cmp to i8730 %.not = icmp eq i8 %0, 0731 ret i1 %.not732}733 734define zeroext i1 @vec_all_ne_vus(<8 x i16> %a, <8 x i16> %b) {735; CHECK-LABEL: vec_all_ne_vus:736; CHECK: # %bb.0: # %entry737; CHECK-NEXT: vceqhs %v0, %v24, %v26738; CHECK-NEXT: lghi %r2, 0739; CHECK-NEXT: locghio %r2, 1740; CHECK-NEXT: br %r14741entry:742 %0 = icmp eq <8 x i16> %a, %b743 %1 = bitcast <8 x i1> %0 to i8744 %2 = icmp eq i8 %1, 0745 ret i1 %2746}747 748define zeroext i1 @vec_any_ne_vus(<8 x i16> %a, <8 x i16> %b) {749; CHECK-LABEL: vec_any_ne_vus:750; CHECK: # %bb.0: # %entry751; CHECK-NEXT: vceqhs %v0, %v24, %v26752; CHECK-NEXT: lghi %r2, 0753; CHECK-NEXT: locghinhe %r2, 1754; CHECK-NEXT: br %r14755entry:756 %cmp = icmp ne <8 x i16> %a, %b757 %0 = bitcast <8 x i1> %cmp to i8758 %1 = icmp ne i8 %0, 0759 ret i1 %1760}761 762define zeroext i1 @not_vec_all_ne_vus(<8 x i16> %a, <8 x i16> %b) {763; CHECK-LABEL: not_vec_all_ne_vus:764; CHECK: # %bb.0: # %entry765; CHECK-NEXT: vceqhs %v0, %v24, %v26766; CHECK-NEXT: lghi %r2, 0767; CHECK-NEXT: locghile %r2, 1768; CHECK-NEXT: br %r14769entry:770 %0 = icmp eq <8 x i16> %a, %b771 %1 = bitcast <8 x i1> %0 to i8772 %2 = icmp ne i8 %1, 0773 ret i1 %2774}775 776define zeroext i1 @not_vec_any_ne_vus(<8 x i16> %a, <8 x i16> %b) {777; CHECK-LABEL: not_vec_any_ne_vus:778; CHECK: # %bb.0: # %entry779; CHECK-NEXT: vceqhs %v0, %v24, %v26780; CHECK-NEXT: lghi %r2, 0781; CHECK-NEXT: locghie %r2, 1782; CHECK-NEXT: br %r14783entry:784 %cmp = icmp ne <8 x i16> %a, %b785 %0 = bitcast <8 x i1> %cmp to i8786 %.not = icmp eq i8 %0, 0787 ret i1 %.not788}789 790define zeroext i1 @vec_all_ne_vsi(<4 x i32> %a, <4 x i32> %b) {791; CHECK-LABEL: vec_all_ne_vsi:792; CHECK: # %bb.0: # %entry793; CHECK-NEXT: vceqfs %v0, %v24, %v26794; CHECK-NEXT: lghi %r2, 0795; CHECK-NEXT: locghio %r2, 1796; CHECK-NEXT: br %r14797entry:798 %0 = icmp eq <4 x i32> %a, %b799 %1 = bitcast <4 x i1> %0 to i4800 %2 = icmp eq i4 %1, 0801 ret i1 %2802}803 804define zeroext i1 @vec_any_ne_vsi(<4 x i32> %a, <4 x i32> %b) {805; CHECK-LABEL: vec_any_ne_vsi:806; CHECK: # %bb.0: # %entry807; CHECK-NEXT: vceqfs %v0, %v24, %v26808; CHECK-NEXT: lghi %r2, 0809; CHECK-NEXT: locghinhe %r2, 1810; CHECK-NEXT: br %r14811entry:812 %cmp = icmp ne <4 x i32> %a, %b813 %0 = bitcast <4 x i1> %cmp to i4814 %1 = icmp ne i4 %0, 0815 ret i1 %1816}817 818define zeroext i1 @not_vec_all_ne_vsi(<4 x i32> %a, <4 x i32> %b) {819; CHECK-LABEL: not_vec_all_ne_vsi:820; CHECK: # %bb.0: # %entry821; CHECK-NEXT: vceqfs %v0, %v24, %v26822; CHECK-NEXT: lghi %r2, 0823; CHECK-NEXT: locghile %r2, 1824; CHECK-NEXT: br %r14825entry:826 %0 = icmp eq <4 x i32> %a, %b827 %1 = bitcast <4 x i1> %0 to i4828 %2 = icmp ne i4 %1, 0829 ret i1 %2830}831 832define zeroext i1 @not_vec_any_ne_vsi(<4 x i32> %a, <4 x i32> %b) {833; CHECK-LABEL: not_vec_any_ne_vsi:834; CHECK: # %bb.0: # %entry835; CHECK-NEXT: vceqfs %v0, %v24, %v26836; CHECK-NEXT: lghi %r2, 0837; CHECK-NEXT: locghie %r2, 1838; CHECK-NEXT: br %r14839entry:840 %cmp = icmp ne <4 x i32> %a, %b841 %0 = bitcast <4 x i1> %cmp to i4842 %.not = icmp eq i4 %0, 0843 ret i1 %.not844}845 846define zeroext i1 @vec_all_ne_vui(<4 x i32> %a, <4 x i32> %b) {847; CHECK-LABEL: vec_all_ne_vui:848; CHECK: # %bb.0: # %entry849; CHECK-NEXT: vceqfs %v0, %v24, %v26850; CHECK-NEXT: lghi %r2, 0851; CHECK-NEXT: locghio %r2, 1852; CHECK-NEXT: br %r14853entry:854 %0 = icmp eq <4 x i32> %a, %b855 %1 = bitcast <4 x i1> %0 to i4856 %2 = icmp eq i4 %1, 0857 ret i1 %2858}859 860define zeroext i1 @vec_any_ne_vui(<4 x i32> %a, <4 x i32> %b) {861; CHECK-LABEL: vec_any_ne_vui:862; CHECK: # %bb.0: # %entry863; CHECK-NEXT: vceqfs %v0, %v24, %v26864; CHECK-NEXT: lghi %r2, 0865; CHECK-NEXT: locghinhe %r2, 1866; CHECK-NEXT: br %r14867entry:868 %cmp = icmp ne <4 x i32> %a, %b869 %0 = bitcast <4 x i1> %cmp to i4870 %1 = icmp ne i4 %0, 0871 ret i1 %1872}873 874define zeroext i1 @not_vec_all_ne_vui(<4 x i32> %a, <4 x i32> %b) {875; CHECK-LABEL: not_vec_all_ne_vui:876; CHECK: # %bb.0: # %entry877; CHECK-NEXT: vceqfs %v0, %v24, %v26878; CHECK-NEXT: lghi %r2, 0879; CHECK-NEXT: locghile %r2, 1880; CHECK-NEXT: br %r14881entry:882 %0 = icmp eq <4 x i32> %a, %b883 %1 = bitcast <4 x i1> %0 to i4884 %2 = icmp ne i4 %1, 0885 ret i1 %2886}887 888define zeroext i1 @not_vec_any_ne_vui(<4 x i32> %a, <4 x i32> %b) {889; CHECK-LABEL: not_vec_any_ne_vui:890; CHECK: # %bb.0: # %entry891; CHECK-NEXT: vceqfs %v0, %v24, %v26892; CHECK-NEXT: lghi %r2, 0893; CHECK-NEXT: locghie %r2, 1894; CHECK-NEXT: br %r14895entry:896 %cmp = icmp ne <4 x i32> %a, %b897 %0 = bitcast <4 x i1> %cmp to i4898 %.not = icmp eq i4 %0, 0899 ret i1 %.not900}901 902define zeroext i1 @vec_all_ne_vsl(<2 x i64> %a, <2 x i64> %b) {903; CHECK-LABEL: vec_all_ne_vsl:904; CHECK: # %bb.0: # %entry905; CHECK-NEXT: vceqgs %v0, %v24, %v26906; CHECK-NEXT: lghi %r2, 0907; CHECK-NEXT: locghio %r2, 1908; CHECK-NEXT: br %r14909entry:910 %0 = icmp eq <2 x i64> %a, %b911 %1 = bitcast <2 x i1> %0 to i2912 %2 = icmp eq i2 %1, 0913 ret i1 %2914}915 916define zeroext i1 @vec_any_ne_vsl(<2 x i64> %a, <2 x i64> %b) {917; CHECK-LABEL: vec_any_ne_vsl:918; CHECK: # %bb.0: # %entry919; CHECK-NEXT: vceqgs %v0, %v24, %v26920; CHECK-NEXT: lghi %r2, 0921; CHECK-NEXT: locghinhe %r2, 1922; CHECK-NEXT: br %r14923entry:924 %cmp = icmp ne <2 x i64> %a, %b925 %0 = bitcast <2 x i1> %cmp to i2926 %1 = icmp ne i2 %0, 0927 ret i1 %1928}929 930define zeroext i1 @not_vec_all_ne_vsl(<2 x i64> %a, <2 x i64> %b) {931; CHECK-LABEL: not_vec_all_ne_vsl:932; CHECK: # %bb.0: # %entry933; CHECK-NEXT: vceqgs %v0, %v24, %v26934; CHECK-NEXT: lghi %r2, 0935; CHECK-NEXT: locghile %r2, 1936; CHECK-NEXT: br %r14937entry:938 %0 = icmp eq <2 x i64> %a, %b939 %1 = bitcast <2 x i1> %0 to i2940 %2 = icmp ne i2 %1, 0941 ret i1 %2942}943 944define zeroext i1 @not_vec_any_ne_vsl(<2 x i64> %a, <2 x i64> %b) {945; CHECK-LABEL: not_vec_any_ne_vsl:946; CHECK: # %bb.0: # %entry947; CHECK-NEXT: vceqgs %v0, %v24, %v26948; CHECK-NEXT: lghi %r2, 0949; CHECK-NEXT: locghie %r2, 1950; CHECK-NEXT: br %r14951entry:952 %cmp = icmp ne <2 x i64> %a, %b953 %0 = bitcast <2 x i1> %cmp to i2954 %.not = icmp eq i2 %0, 0955 ret i1 %.not956}957 958define zeroext i1 @vec_all_ne_vul(<2 x i64> %a, <2 x i64> %b) {959; CHECK-LABEL: vec_all_ne_vul:960; CHECK: # %bb.0: # %entry961; CHECK-NEXT: vceqgs %v0, %v24, %v26962; CHECK-NEXT: lghi %r2, 0963; CHECK-NEXT: locghio %r2, 1964; CHECK-NEXT: br %r14965entry:966 %0 = icmp eq <2 x i64> %a, %b967 %1 = bitcast <2 x i1> %0 to i2968 %2 = icmp eq i2 %1, 0969 ret i1 %2970}971 972define zeroext i1 @vec_any_ne_vul(<2 x i64> %a, <2 x i64> %b) {973; CHECK-LABEL: vec_any_ne_vul:974; CHECK: # %bb.0: # %entry975; CHECK-NEXT: vceqgs %v0, %v24, %v26976; CHECK-NEXT: lghi %r2, 0977; CHECK-NEXT: locghinhe %r2, 1978; CHECK-NEXT: br %r14979entry:980 %cmp = icmp ne <2 x i64> %a, %b981 %0 = bitcast <2 x i1> %cmp to i2982 %1 = icmp ne i2 %0, 0983 ret i1 %1984}985 986define zeroext i1 @not_vec_all_ne_vul(<2 x i64> %a, <2 x i64> %b) {987; CHECK-LABEL: not_vec_all_ne_vul:988; CHECK: # %bb.0: # %entry989; CHECK-NEXT: vceqgs %v0, %v24, %v26990; CHECK-NEXT: lghi %r2, 0991; CHECK-NEXT: locghile %r2, 1992; CHECK-NEXT: br %r14993entry:994 %0 = icmp eq <2 x i64> %a, %b995 %1 = bitcast <2 x i1> %0 to i2996 %2 = icmp ne i2 %1, 0997 ret i1 %2998}999 1000define zeroext i1 @not_vec_any_ne_vul(<2 x i64> %a, <2 x i64> %b) {1001; CHECK-LABEL: not_vec_any_ne_vul:1002; CHECK: # %bb.0: # %entry1003; CHECK-NEXT: vceqgs %v0, %v24, %v261004; CHECK-NEXT: lghi %r2, 01005; CHECK-NEXT: locghie %r2, 11006; CHECK-NEXT: br %r141007entry:1008 %cmp = icmp ne <2 x i64> %a, %b1009 %0 = bitcast <2 x i1> %cmp to i21010 %.not = icmp eq i2 %0, 01011 ret i1 %.not1012}1013 1014define zeroext i1 @vec_all_ne_vf(<4 x float> %a, <4 x float> %b) {1015; CHECK-LABEL: vec_all_ne_vf:1016; CHECK: # %bb.0: # %entry1017; CHECK-NEXT: vfcesbs %v0, %v24, %v261018; CHECK-NEXT: lghi %r2, 01019; CHECK-NEXT: locghio %r2, 11020; CHECK-NEXT: br %r141021entry:1022 %0 = fcmp oeq <4 x float> %a, %b1023 %1 = bitcast <4 x i1> %0 to i41024 %2 = icmp eq i4 %1, 01025 ret i1 %21026}1027 1028define zeroext i1 @vec_any_ne_vf(<4 x float> %a, <4 x float> %b) {1029; CHECK-LABEL: vec_any_ne_vf:1030; CHECK: # %bb.0: # %entry1031; CHECK-NEXT: vfcesbs %v0, %v24, %v261032; CHECK-NEXT: lghi %r2, 01033; CHECK-NEXT: locghinhe %r2, 11034; CHECK-NEXT: br %r141035entry:1036 %cmp = fcmp une <4 x float> %a, %b1037 %0 = bitcast <4 x i1> %cmp to i41038 %1 = icmp ne i4 %0, 01039 ret i1 %11040}1041 1042define zeroext i1 @not_vec_all_ne_vf(<4 x float> %a, <4 x float> %b) {1043; CHECK-LABEL: not_vec_all_ne_vf:1044; CHECK: # %bb.0: # %entry1045; CHECK-NEXT: vfcesbs %v0, %v24, %v261046; CHECK-NEXT: lghi %r2, 01047; CHECK-NEXT: locghile %r2, 11048; CHECK-NEXT: br %r141049entry:1050 %0 = fcmp oeq <4 x float> %a, %b1051 %1 = bitcast <4 x i1> %0 to i41052 %2 = icmp ne i4 %1, 01053 ret i1 %21054}1055 1056define zeroext i1 @not_vec_any_ne_vf(<4 x float> %a, <4 x float> %b) {1057; CHECK-LABEL: not_vec_any_ne_vf:1058; CHECK: # %bb.0: # %entry1059; CHECK-NEXT: vfcesbs %v0, %v24, %v261060; CHECK-NEXT: lghi %r2, 01061; CHECK-NEXT: locghie %r2, 11062; CHECK-NEXT: br %r141063entry:1064 %cmp = fcmp une <4 x float> %a, %b1065 %0 = bitcast <4 x i1> %cmp to i41066 %.not = icmp eq i4 %0, 01067 ret i1 %.not1068}1069 1070define zeroext i1 @vec_all_ne_vd(<2 x double> %a, <2 x double> %b) {1071; CHECK-LABEL: vec_all_ne_vd:1072; CHECK: # %bb.0: # %entry1073; CHECK-NEXT: vfcedbs %v0, %v24, %v261074; CHECK-NEXT: lghi %r2, 01075; CHECK-NEXT: locghio %r2, 11076; CHECK-NEXT: br %r141077entry:1078 %0 = fcmp oeq <2 x double> %a, %b1079 %1 = bitcast <2 x i1> %0 to i21080 %2 = icmp eq i2 %1, 01081 ret i1 %21082}1083 1084define zeroext i1 @vec_any_ne_vd(<2 x double> %a, <2 x double> %b) {1085; CHECK-LABEL: vec_any_ne_vd:1086; CHECK: # %bb.0: # %entry1087; CHECK-NEXT: vfcedbs %v0, %v24, %v261088; CHECK-NEXT: lghi %r2, 01089; CHECK-NEXT: locghinhe %r2, 11090; CHECK-NEXT: br %r141091entry:1092 %cmp = fcmp une <2 x double> %a, %b1093 %0 = bitcast <2 x i1> %cmp to i21094 %1 = icmp ne i2 %0, 01095 ret i1 %11096}1097 1098define zeroext i1 @not_vec_all_ne_vd(<2 x double> %a, <2 x double> %b) {1099; CHECK-LABEL: not_vec_all_ne_vd:1100; CHECK: # %bb.0: # %entry1101; CHECK-NEXT: vfcedbs %v0, %v24, %v261102; CHECK-NEXT: lghi %r2, 01103; CHECK-NEXT: locghile %r2, 11104; CHECK-NEXT: br %r141105entry:1106 %0 = fcmp oeq <2 x double> %a, %b1107 %1 = bitcast <2 x i1> %0 to i21108 %2 = icmp ne i2 %1, 01109 ret i1 %21110}1111 1112define zeroext i1 @not_vec_any_ne_vd(<2 x double> %a, <2 x double> %b) {1113; CHECK-LABEL: not_vec_any_ne_vd:1114; CHECK: # %bb.0: # %entry1115; CHECK-NEXT: vfcedbs %v0, %v24, %v261116; CHECK-NEXT: lghi %r2, 01117; CHECK-NEXT: locghie %r2, 11118; CHECK-NEXT: br %r141119entry:1120 %cmp = fcmp une <2 x double> %a, %b1121 %0 = bitcast <2 x i1> %cmp to i21122 %.not = icmp eq i2 %0, 01123 ret i1 %.not1124}1125 1126define zeroext i1 @vec_all_lt_vsc(<16 x i8> %a, <16 x i8> %b) {1127; CHECK-LABEL: vec_all_lt_vsc:1128; CHECK: # %bb.0: # %entry1129; CHECK-NEXT: vchbs %v0, %v26, %v241130; CHECK-NEXT: lghi %r2, 01131; CHECK-NEXT: locghie %r2, 11132; CHECK-NEXT: br %r141133entry:1134 %0 = icmp sge <16 x i8> %a, %b1135 %1 = bitcast <16 x i1> %0 to i161136 %2 = icmp eq i16 %1, 01137 ret i1 %21138}1139 1140define zeroext i1 @vec_any_lt_vsc(<16 x i8> %a, <16 x i8> %b) {1141; CHECK-LABEL: vec_any_lt_vsc:1142; CHECK: # %bb.0: # %entry1143; CHECK-NEXT: vchbs %v0, %v26, %v241144; CHECK-NEXT: lghi %r2, 01145; CHECK-NEXT: locghile %r2, 11146; CHECK-NEXT: br %r141147entry:1148 %cmp = icmp slt <16 x i8> %a, %b1149 %0 = bitcast <16 x i1> %cmp to i161150 %1 = icmp ne i16 %0, 01151 ret i1 %11152}1153 1154define zeroext i1 @not_vec_all_lt_vsc(<16 x i8> %a, <16 x i8> %b) {1155; CHECK-LABEL: not_vec_all_lt_vsc:1156; CHECK: # %bb.0: # %entry1157; CHECK-NEXT: vchbs %v0, %v26, %v241158; CHECK-NEXT: lghi %r2, 01159; CHECK-NEXT: locghinhe %r2, 11160; CHECK-NEXT: br %r141161entry:1162 %0 = icmp sge <16 x i8> %a, %b1163 %1 = bitcast <16 x i1> %0 to i161164 %2 = icmp ne i16 %1, 01165 ret i1 %21166}1167 1168define zeroext i1 @not_vec_any_lt_vsc(<16 x i8> %a, <16 x i8> %b) {1169; CHECK-LABEL: not_vec_any_lt_vsc:1170; CHECK: # %bb.0: # %entry1171; CHECK-NEXT: vchbs %v0, %v26, %v241172; CHECK-NEXT: lghi %r2, 01173; CHECK-NEXT: locghio %r2, 11174; CHECK-NEXT: br %r141175entry:1176 %cmp = icmp slt <16 x i8> %a, %b1177 %0 = bitcast <16 x i1> %cmp to i161178 %.not = icmp eq i16 %0, 01179 ret i1 %.not1180}1181 1182define zeroext i1 @vec_all_lt_vuc(<16 x i8> %a, <16 x i8> %b) {1183; CHECK-LABEL: vec_all_lt_vuc:1184; CHECK: # %bb.0: # %entry1185; CHECK-NEXT: vchlbs %v0, %v26, %v241186; CHECK-NEXT: lghi %r2, 01187; CHECK-NEXT: locghie %r2, 11188; CHECK-NEXT: br %r141189entry:1190 %0 = icmp uge <16 x i8> %a, %b1191 %1 = bitcast <16 x i1> %0 to i161192 %2 = icmp eq i16 %1, 01193 ret i1 %21194}1195 1196define zeroext i1 @vec_any_lt_vuc(<16 x i8> %a, <16 x i8> %b) {1197; CHECK-LABEL: vec_any_lt_vuc:1198; CHECK: # %bb.0: # %entry1199; CHECK-NEXT: vchlbs %v0, %v26, %v241200; CHECK-NEXT: lghi %r2, 01201; CHECK-NEXT: locghile %r2, 11202; CHECK-NEXT: br %r141203entry:1204 %cmp = icmp ult <16 x i8> %a, %b1205 %0 = bitcast <16 x i1> %cmp to i161206 %1 = icmp ne i16 %0, 01207 ret i1 %11208}1209 1210define zeroext i1 @not_vec_all_lt_vuc(<16 x i8> %a, <16 x i8> %b) {1211; CHECK-LABEL: not_vec_all_lt_vuc:1212; CHECK: # %bb.0: # %entry1213; CHECK-NEXT: vchlbs %v0, %v26, %v241214; CHECK-NEXT: lghi %r2, 01215; CHECK-NEXT: locghinhe %r2, 11216; CHECK-NEXT: br %r141217entry:1218 %0 = icmp uge <16 x i8> %a, %b1219 %1 = bitcast <16 x i1> %0 to i161220 %2 = icmp ne i16 %1, 01221 ret i1 %21222}1223 1224define zeroext i1 @not_vec_any_lt_vuc(<16 x i8> %a, <16 x i8> %b) {1225; CHECK-LABEL: not_vec_any_lt_vuc:1226; CHECK: # %bb.0: # %entry1227; CHECK-NEXT: vchlbs %v0, %v26, %v241228; CHECK-NEXT: lghi %r2, 01229; CHECK-NEXT: locghio %r2, 11230; CHECK-NEXT: br %r141231entry:1232 %cmp = icmp ult <16 x i8> %a, %b1233 %0 = bitcast <16 x i1> %cmp to i161234 %.not = icmp eq i16 %0, 01235 ret i1 %.not1236}1237 1238define zeroext i1 @vec_all_lt_vss(<8 x i16> %a, <8 x i16> %b) {1239; CHECK-LABEL: vec_all_lt_vss:1240; CHECK: # %bb.0: # %entry1241; CHECK-NEXT: vchhs %v0, %v26, %v241242; CHECK-NEXT: lghi %r2, 01243; CHECK-NEXT: locghie %r2, 11244; CHECK-NEXT: br %r141245entry:1246 %0 = icmp sge <8 x i16> %a, %b1247 %1 = bitcast <8 x i1> %0 to i81248 %2 = icmp eq i8 %1, 01249 ret i1 %21250}1251 1252define zeroext i1 @vec_any_lt_vss(<8 x i16> %a, <8 x i16> %b) {1253; CHECK-LABEL: vec_any_lt_vss:1254; CHECK: # %bb.0: # %entry1255; CHECK-NEXT: vchhs %v0, %v26, %v241256; CHECK-NEXT: lghi %r2, 01257; CHECK-NEXT: locghile %r2, 11258; CHECK-NEXT: br %r141259entry:1260 %cmp = icmp slt <8 x i16> %a, %b1261 %0 = bitcast <8 x i1> %cmp to i81262 %1 = icmp ne i8 %0, 01263 ret i1 %11264}1265 1266define zeroext i1 @not_vec_all_lt_vss(<8 x i16> %a, <8 x i16> %b) {1267; CHECK-LABEL: not_vec_all_lt_vss:1268; CHECK: # %bb.0: # %entry1269; CHECK-NEXT: vchhs %v0, %v26, %v241270; CHECK-NEXT: lghi %r2, 01271; CHECK-NEXT: locghinhe %r2, 11272; CHECK-NEXT: br %r141273entry:1274 %0 = icmp sge <8 x i16> %a, %b1275 %1 = bitcast <8 x i1> %0 to i81276 %2 = icmp ne i8 %1, 01277 ret i1 %21278}1279 1280define zeroext i1 @not_vec_any_lt_vss(<8 x i16> %a, <8 x i16> %b) {1281; CHECK-LABEL: not_vec_any_lt_vss:1282; CHECK: # %bb.0: # %entry1283; CHECK-NEXT: vchhs %v0, %v26, %v241284; CHECK-NEXT: lghi %r2, 01285; CHECK-NEXT: locghio %r2, 11286; CHECK-NEXT: br %r141287entry:1288 %cmp = icmp slt <8 x i16> %a, %b1289 %0 = bitcast <8 x i1> %cmp to i81290 %.not = icmp eq i8 %0, 01291 ret i1 %.not1292}1293 1294define zeroext i1 @vec_all_lt_vus(<8 x i16> %a, <8 x i16> %b) {1295; CHECK-LABEL: vec_all_lt_vus:1296; CHECK: # %bb.0: # %entry1297; CHECK-NEXT: vchlhs %v0, %v26, %v241298; CHECK-NEXT: lghi %r2, 01299; CHECK-NEXT: locghie %r2, 11300; CHECK-NEXT: br %r141301entry:1302 %0 = icmp uge <8 x i16> %a, %b1303 %1 = bitcast <8 x i1> %0 to i81304 %2 = icmp eq i8 %1, 01305 ret i1 %21306}1307 1308define zeroext i1 @vec_any_lt_vus(<8 x i16> %a, <8 x i16> %b) {1309; CHECK-LABEL: vec_any_lt_vus:1310; CHECK: # %bb.0: # %entry1311; CHECK-NEXT: vchlhs %v0, %v26, %v241312; CHECK-NEXT: lghi %r2, 01313; CHECK-NEXT: locghile %r2, 11314; CHECK-NEXT: br %r141315entry:1316 %cmp = icmp ult <8 x i16> %a, %b1317 %0 = bitcast <8 x i1> %cmp to i81318 %1 = icmp ne i8 %0, 01319 ret i1 %11320}1321 1322define zeroext i1 @not_vec_all_lt_vus(<8 x i16> %a, <8 x i16> %b) {1323; CHECK-LABEL: not_vec_all_lt_vus:1324; CHECK: # %bb.0: # %entry1325; CHECK-NEXT: vchlhs %v0, %v26, %v241326; CHECK-NEXT: lghi %r2, 01327; CHECK-NEXT: locghinhe %r2, 11328; CHECK-NEXT: br %r141329entry:1330 %0 = icmp uge <8 x i16> %a, %b1331 %1 = bitcast <8 x i1> %0 to i81332 %2 = icmp ne i8 %1, 01333 ret i1 %21334}1335 1336define zeroext i1 @not_vec_any_lt_vus(<8 x i16> %a, <8 x i16> %b) {1337; CHECK-LABEL: not_vec_any_lt_vus:1338; CHECK: # %bb.0: # %entry1339; CHECK-NEXT: vchlhs %v0, %v26, %v241340; CHECK-NEXT: lghi %r2, 01341; CHECK-NEXT: locghio %r2, 11342; CHECK-NEXT: br %r141343entry:1344 %cmp = icmp ult <8 x i16> %a, %b1345 %0 = bitcast <8 x i1> %cmp to i81346 %.not = icmp eq i8 %0, 01347 ret i1 %.not1348}1349 1350define zeroext i1 @vec_all_lt_vsi(<4 x i32> %a, <4 x i32> %b) {1351; CHECK-LABEL: vec_all_lt_vsi:1352; CHECK: # %bb.0: # %entry1353; CHECK-NEXT: vchfs %v0, %v26, %v241354; CHECK-NEXT: lghi %r2, 01355; CHECK-NEXT: locghie %r2, 11356; CHECK-NEXT: br %r141357entry:1358 %0 = icmp sge <4 x i32> %a, %b1359 %1 = bitcast <4 x i1> %0 to i41360 %2 = icmp eq i4 %1, 01361 ret i1 %21362}1363 1364define zeroext i1 @vec_any_lt_vsi(<4 x i32> %a, <4 x i32> %b) {1365; CHECK-LABEL: vec_any_lt_vsi:1366; CHECK: # %bb.0: # %entry1367; CHECK-NEXT: vchfs %v0, %v26, %v241368; CHECK-NEXT: lghi %r2, 01369; CHECK-NEXT: locghile %r2, 11370; CHECK-NEXT: br %r141371entry:1372 %cmp = icmp slt <4 x i32> %a, %b1373 %0 = bitcast <4 x i1> %cmp to i41374 %1 = icmp ne i4 %0, 01375 ret i1 %11376}1377 1378define zeroext i1 @not_vec_all_lt_vsi(<4 x i32> %a, <4 x i32> %b) {1379; CHECK-LABEL: not_vec_all_lt_vsi:1380; CHECK: # %bb.0: # %entry1381; CHECK-NEXT: vchfs %v0, %v26, %v241382; CHECK-NEXT: lghi %r2, 01383; CHECK-NEXT: locghinhe %r2, 11384; CHECK-NEXT: br %r141385entry:1386 %0 = icmp sge <4 x i32> %a, %b1387 %1 = bitcast <4 x i1> %0 to i41388 %2 = icmp ne i4 %1, 01389 ret i1 %21390}1391 1392define zeroext i1 @not_vec_any_lt_vsi(<4 x i32> %a, <4 x i32> %b) {1393; CHECK-LABEL: not_vec_any_lt_vsi:1394; CHECK: # %bb.0: # %entry1395; CHECK-NEXT: vchfs %v0, %v26, %v241396; CHECK-NEXT: lghi %r2, 01397; CHECK-NEXT: locghio %r2, 11398; CHECK-NEXT: br %r141399entry:1400 %cmp = icmp slt <4 x i32> %a, %b1401 %0 = bitcast <4 x i1> %cmp to i41402 %.not = icmp eq i4 %0, 01403 ret i1 %.not1404}1405 1406define zeroext i1 @vec_all_lt_vui(<4 x i32> %a, <4 x i32> %b) {1407; CHECK-LABEL: vec_all_lt_vui:1408; CHECK: # %bb.0: # %entry1409; CHECK-NEXT: vchlfs %v0, %v26, %v241410; CHECK-NEXT: lghi %r2, 01411; CHECK-NEXT: locghie %r2, 11412; CHECK-NEXT: br %r141413entry:1414 %0 = icmp uge <4 x i32> %a, %b1415 %1 = bitcast <4 x i1> %0 to i41416 %2 = icmp eq i4 %1, 01417 ret i1 %21418}1419 1420define zeroext i1 @vec_any_lt_vui(<4 x i32> %a, <4 x i32> %b) {1421; CHECK-LABEL: vec_any_lt_vui:1422; CHECK: # %bb.0: # %entry1423; CHECK-NEXT: vchlfs %v0, %v26, %v241424; CHECK-NEXT: lghi %r2, 01425; CHECK-NEXT: locghile %r2, 11426; CHECK-NEXT: br %r141427entry:1428 %cmp = icmp ult <4 x i32> %a, %b1429 %0 = bitcast <4 x i1> %cmp to i41430 %1 = icmp ne i4 %0, 01431 ret i1 %11432}1433 1434define zeroext i1 @not_vec_all_lt_vui(<4 x i32> %a, <4 x i32> %b) {1435; CHECK-LABEL: not_vec_all_lt_vui:1436; CHECK: # %bb.0: # %entry1437; CHECK-NEXT: vchlfs %v0, %v26, %v241438; CHECK-NEXT: lghi %r2, 01439; CHECK-NEXT: locghinhe %r2, 11440; CHECK-NEXT: br %r141441entry:1442 %0 = icmp uge <4 x i32> %a, %b1443 %1 = bitcast <4 x i1> %0 to i41444 %2 = icmp ne i4 %1, 01445 ret i1 %21446}1447 1448define zeroext i1 @not_vec_any_lt_vui(<4 x i32> %a, <4 x i32> %b) {1449; CHECK-LABEL: not_vec_any_lt_vui:1450; CHECK: # %bb.0: # %entry1451; CHECK-NEXT: vchlfs %v0, %v26, %v241452; CHECK-NEXT: lghi %r2, 01453; CHECK-NEXT: locghio %r2, 11454; CHECK-NEXT: br %r141455entry:1456 %cmp = icmp ult <4 x i32> %a, %b1457 %0 = bitcast <4 x i1> %cmp to i41458 %.not = icmp eq i4 %0, 01459 ret i1 %.not1460}1461 1462define zeroext i1 @vec_all_lt_vsl(<2 x i64> %a, <2 x i64> %b) {1463; CHECK-LABEL: vec_all_lt_vsl:1464; CHECK: # %bb.0: # %entry1465; CHECK-NEXT: vchgs %v0, %v26, %v241466; CHECK-NEXT: lghi %r2, 01467; CHECK-NEXT: locghie %r2, 11468; CHECK-NEXT: br %r141469entry:1470 %0 = icmp sge <2 x i64> %a, %b1471 %1 = bitcast <2 x i1> %0 to i21472 %2 = icmp eq i2 %1, 01473 ret i1 %21474}1475 1476define zeroext i1 @vec_any_lt_vsl(<2 x i64> %a, <2 x i64> %b) {1477; CHECK-LABEL: vec_any_lt_vsl:1478; CHECK: # %bb.0: # %entry1479; CHECK-NEXT: vchgs %v0, %v26, %v241480; CHECK-NEXT: lghi %r2, 01481; CHECK-NEXT: locghile %r2, 11482; CHECK-NEXT: br %r141483entry:1484 %cmp = icmp slt <2 x i64> %a, %b1485 %0 = bitcast <2 x i1> %cmp to i21486 %1 = icmp ne i2 %0, 01487 ret i1 %11488}1489 1490define zeroext i1 @not_vec_all_lt_vsl(<2 x i64> %a, <2 x i64> %b) {1491; CHECK-LABEL: not_vec_all_lt_vsl:1492; CHECK: # %bb.0: # %entry1493; CHECK-NEXT: vchgs %v0, %v26, %v241494; CHECK-NEXT: lghi %r2, 01495; CHECK-NEXT: locghinhe %r2, 11496; CHECK-NEXT: br %r141497entry:1498 %0 = icmp sge <2 x i64> %a, %b1499 %1 = bitcast <2 x i1> %0 to i21500 %2 = icmp ne i2 %1, 01501 ret i1 %21502}1503 1504define zeroext i1 @not_vec_any_lt_vsl(<2 x i64> %a, <2 x i64> %b) {1505; CHECK-LABEL: not_vec_any_lt_vsl:1506; CHECK: # %bb.0: # %entry1507; CHECK-NEXT: vchgs %v0, %v26, %v241508; CHECK-NEXT: lghi %r2, 01509; CHECK-NEXT: locghio %r2, 11510; CHECK-NEXT: br %r141511entry:1512 %cmp = icmp slt <2 x i64> %a, %b1513 %0 = bitcast <2 x i1> %cmp to i21514 %.not = icmp eq i2 %0, 01515 ret i1 %.not1516}1517 1518define zeroext i1 @vec_all_lt_vul(<2 x i64> %a, <2 x i64> %b) {1519; CHECK-LABEL: vec_all_lt_vul:1520; CHECK: # %bb.0: # %entry1521; CHECK-NEXT: vchlgs %v0, %v26, %v241522; CHECK-NEXT: lghi %r2, 01523; CHECK-NEXT: locghie %r2, 11524; CHECK-NEXT: br %r141525entry:1526 %0 = icmp uge <2 x i64> %a, %b1527 %1 = bitcast <2 x i1> %0 to i21528 %2 = icmp eq i2 %1, 01529 ret i1 %21530}1531 1532define zeroext i1 @vec_any_lt_vul(<2 x i64> %a, <2 x i64> %b) {1533; CHECK-LABEL: vec_any_lt_vul:1534; CHECK: # %bb.0: # %entry1535; CHECK-NEXT: vchlgs %v0, %v26, %v241536; CHECK-NEXT: lghi %r2, 01537; CHECK-NEXT: locghile %r2, 11538; CHECK-NEXT: br %r141539entry:1540 %cmp = icmp ult <2 x i64> %a, %b1541 %0 = bitcast <2 x i1> %cmp to i21542 %1 = icmp ne i2 %0, 01543 ret i1 %11544}1545 1546define zeroext i1 @not_vec_all_lt_vul(<2 x i64> %a, <2 x i64> %b) {1547; CHECK-LABEL: not_vec_all_lt_vul:1548; CHECK: # %bb.0: # %entry1549; CHECK-NEXT: vchlgs %v0, %v26, %v241550; CHECK-NEXT: lghi %r2, 01551; CHECK-NEXT: locghinhe %r2, 11552; CHECK-NEXT: br %r141553entry:1554 %0 = icmp uge <2 x i64> %a, %b1555 %1 = bitcast <2 x i1> %0 to i21556 %2 = icmp ne i2 %1, 01557 ret i1 %21558}1559 1560define zeroext i1 @not_vec_any_lt_vul(<2 x i64> %a, <2 x i64> %b) {1561; CHECK-LABEL: not_vec_any_lt_vul:1562; CHECK: # %bb.0: # %entry1563; CHECK-NEXT: vchlgs %v0, %v26, %v241564; CHECK-NEXT: lghi %r2, 01565; CHECK-NEXT: locghio %r2, 11566; CHECK-NEXT: br %r141567entry:1568 %cmp = icmp ult <2 x i64> %a, %b1569 %0 = bitcast <2 x i1> %cmp to i21570 %.not = icmp eq i2 %0, 01571 ret i1 %.not1572}1573 1574define zeroext i1 @vec_all_lt_vf(<4 x float> %a, <4 x float> %b) {1575; CHECK-LABEL: vec_all_lt_vf:1576; CHECK: # %bb.0: # %entry1577; CHECK-NEXT: vfchsbs %v0, %v26, %v241578; CHECK-NEXT: lghi %r2, 01579; CHECK-NEXT: locghie %r2, 11580; CHECK-NEXT: br %r141581entry:1582 %0 = fcmp uge <4 x float> %a, %b1583 %1 = bitcast <4 x i1> %0 to i41584 %2 = icmp eq i4 %1, 01585 ret i1 %21586}1587 1588define zeroext i1 @vec_any_lt_vf(<4 x float> %a, <4 x float> %b) {1589; CHECK-LABEL: vec_any_lt_vf:1590; CHECK: # %bb.0: # %entry1591; CHECK-NEXT: vfchsbs %v0, %v26, %v241592; CHECK-NEXT: lghi %r2, 01593; CHECK-NEXT: locghile %r2, 11594; CHECK-NEXT: br %r141595entry:1596 %cmp = fcmp olt <4 x float> %a, %b1597 %0 = bitcast <4 x i1> %cmp to i41598 %1 = icmp ne i4 %0, 01599 ret i1 %11600}1601 1602define zeroext i1 @not_vec_all_lt_vf(<4 x float> %a, <4 x float> %b) {1603; CHECK-LABEL: not_vec_all_lt_vf:1604; CHECK: # %bb.0: # %entry1605; CHECK-NEXT: vfchsbs %v0, %v26, %v241606; CHECK-NEXT: lghi %r2, 01607; CHECK-NEXT: locghinhe %r2, 11608; CHECK-NEXT: br %r141609entry:1610 %0 = fcmp uge <4 x float> %a, %b1611 %1 = bitcast <4 x i1> %0 to i41612 %2 = icmp ne i4 %1, 01613 ret i1 %21614}1615 1616define zeroext i1 @not_vec_any_lt_vf(<4 x float> %a, <4 x float> %b) {1617; CHECK-LABEL: not_vec_any_lt_vf:1618; CHECK: # %bb.0: # %entry1619; CHECK-NEXT: vfchsbs %v0, %v26, %v241620; CHECK-NEXT: lghi %r2, 01621; CHECK-NEXT: locghio %r2, 11622; CHECK-NEXT: br %r141623entry:1624 %cmp = fcmp olt <4 x float> %a, %b1625 %0 = bitcast <4 x i1> %cmp to i41626 %.not = icmp eq i4 %0, 01627 ret i1 %.not1628}1629 1630define zeroext i1 @vec_all_lt_vd(<2 x double> %a, <2 x double> %b) {1631; CHECK-LABEL: vec_all_lt_vd:1632; CHECK: # %bb.0: # %entry1633; CHECK-NEXT: vfchdbs %v0, %v26, %v241634; CHECK-NEXT: lghi %r2, 01635; CHECK-NEXT: locghie %r2, 11636; CHECK-NEXT: br %r141637entry:1638 %0 = fcmp uge <2 x double> %a, %b1639 %1 = bitcast <2 x i1> %0 to i21640 %2 = icmp eq i2 %1, 01641 ret i1 %21642}1643 1644define zeroext i1 @vec_any_lt_vd(<2 x double> %a, <2 x double> %b) {1645; CHECK-LABEL: vec_any_lt_vd:1646; CHECK: # %bb.0: # %entry1647; CHECK-NEXT: vfchdbs %v0, %v26, %v241648; CHECK-NEXT: lghi %r2, 01649; CHECK-NEXT: locghile %r2, 11650; CHECK-NEXT: br %r141651entry:1652 %cmp = fcmp olt <2 x double> %a, %b1653 %0 = bitcast <2 x i1> %cmp to i21654 %1 = icmp ne i2 %0, 01655 ret i1 %11656}1657 1658define zeroext i1 @not_vec_all_lt_vd(<2 x double> %a, <2 x double> %b) {1659; CHECK-LABEL: not_vec_all_lt_vd:1660; CHECK: # %bb.0: # %entry1661; CHECK-NEXT: vfchdbs %v0, %v26, %v241662; CHECK-NEXT: lghi %r2, 01663; CHECK-NEXT: locghinhe %r2, 11664; CHECK-NEXT: br %r141665entry:1666 %0 = fcmp uge <2 x double> %a, %b1667 %1 = bitcast <2 x i1> %0 to i21668 %2 = icmp ne i2 %1, 01669 ret i1 %21670}1671 1672define zeroext i1 @not_vec_any_lt_vd(<2 x double> %a, <2 x double> %b) {1673; CHECK-LABEL: not_vec_any_lt_vd:1674; CHECK: # %bb.0: # %entry1675; CHECK-NEXT: vfchdbs %v0, %v26, %v241676; CHECK-NEXT: lghi %r2, 01677; CHECK-NEXT: locghio %r2, 11678; CHECK-NEXT: br %r141679entry:1680 %cmp = fcmp olt <2 x double> %a, %b1681 %0 = bitcast <2 x i1> %cmp to i21682 %.not = icmp eq i2 %0, 01683 ret i1 %.not1684}1685 1686define zeroext i1 @vec_all_le_vsc(<16 x i8> %a, <16 x i8> %b) {1687; CHECK-LABEL: vec_all_le_vsc:1688; CHECK: # %bb.0: # %entry1689; CHECK-NEXT: vchbs %v0, %v24, %v261690; CHECK-NEXT: lghi %r2, 01691; CHECK-NEXT: locghio %r2, 11692; CHECK-NEXT: br %r141693entry:1694 %0 = icmp sgt <16 x i8> %a, %b1695 %1 = bitcast <16 x i1> %0 to i161696 %2 = icmp eq i16 %1, 01697 ret i1 %21698}1699 1700define zeroext i1 @vec_any_le_vsc(<16 x i8> %a, <16 x i8> %b) {1701; CHECK-LABEL: vec_any_le_vsc:1702; CHECK: # %bb.0: # %entry1703; CHECK-NEXT: vchbs %v0, %v24, %v261704; CHECK-NEXT: lghi %r2, 01705; CHECK-NEXT: locghinhe %r2, 11706; CHECK-NEXT: br %r141707entry:1708 %cmp = icmp sle <16 x i8> %a, %b1709 %0 = bitcast <16 x i1> %cmp to i161710 %1 = icmp ne i16 %0, 01711 ret i1 %11712}1713 1714define zeroext i1 @not_vec_all_le_vsc(<16 x i8> %a, <16 x i8> %b) {1715; CHECK-LABEL: not_vec_all_le_vsc:1716; CHECK: # %bb.0: # %entry1717; CHECK-NEXT: vchbs %v0, %v24, %v261718; CHECK-NEXT: lghi %r2, 01719; CHECK-NEXT: locghile %r2, 11720; CHECK-NEXT: br %r141721entry:1722 %0 = icmp sgt <16 x i8> %a, %b1723 %1 = bitcast <16 x i1> %0 to i161724 %2 = icmp ne i16 %1, 01725 ret i1 %21726}1727 1728define zeroext i1 @not_vec_any_le_vsc(<16 x i8> %a, <16 x i8> %b) {1729; CHECK-LABEL: not_vec_any_le_vsc:1730; CHECK: # %bb.0: # %entry1731; CHECK-NEXT: vchbs %v0, %v24, %v261732; CHECK-NEXT: lghi %r2, 01733; CHECK-NEXT: locghie %r2, 11734; CHECK-NEXT: br %r141735entry:1736 %cmp = icmp sle <16 x i8> %a, %b1737 %0 = bitcast <16 x i1> %cmp to i161738 %.not = icmp eq i16 %0, 01739 ret i1 %.not1740}1741 1742define zeroext i1 @vec_all_le_vuc(<16 x i8> %a, <16 x i8> %b) {1743; CHECK-LABEL: vec_all_le_vuc:1744; CHECK: # %bb.0: # %entry1745; CHECK-NEXT: vchlbs %v0, %v24, %v261746; CHECK-NEXT: lghi %r2, 01747; CHECK-NEXT: locghio %r2, 11748; CHECK-NEXT: br %r141749entry:1750 %0 = icmp ugt <16 x i8> %a, %b1751 %1 = bitcast <16 x i1> %0 to i161752 %2 = icmp eq i16 %1, 01753 ret i1 %21754}1755 1756define zeroext i1 @vec_any_le_vuc(<16 x i8> %a, <16 x i8> %b) {1757; CHECK-LABEL: vec_any_le_vuc:1758; CHECK: # %bb.0: # %entry1759; CHECK-NEXT: vchlbs %v0, %v24, %v261760; CHECK-NEXT: lghi %r2, 01761; CHECK-NEXT: locghinhe %r2, 11762; CHECK-NEXT: br %r141763entry:1764 %cmp = icmp ule <16 x i8> %a, %b1765 %0 = bitcast <16 x i1> %cmp to i161766 %1 = icmp ne i16 %0, 01767 ret i1 %11768}1769 1770define zeroext i1 @not_vec_all_le_vuc(<16 x i8> %a, <16 x i8> %b) {1771; CHECK-LABEL: not_vec_all_le_vuc:1772; CHECK: # %bb.0: # %entry1773; CHECK-NEXT: vchlbs %v0, %v24, %v261774; CHECK-NEXT: lghi %r2, 01775; CHECK-NEXT: locghile %r2, 11776; CHECK-NEXT: br %r141777entry:1778 %0 = icmp ugt <16 x i8> %a, %b1779 %1 = bitcast <16 x i1> %0 to i161780 %2 = icmp ne i16 %1, 01781 ret i1 %21782}1783 1784define zeroext i1 @not_vec_any_le_vuc(<16 x i8> %a, <16 x i8> %b) {1785; CHECK-LABEL: not_vec_any_le_vuc:1786; CHECK: # %bb.0: # %entry1787; CHECK-NEXT: vchlbs %v0, %v24, %v261788; CHECK-NEXT: lghi %r2, 01789; CHECK-NEXT: locghie %r2, 11790; CHECK-NEXT: br %r141791entry:1792 %cmp = icmp ule <16 x i8> %a, %b1793 %0 = bitcast <16 x i1> %cmp to i161794 %.not = icmp eq i16 %0, 01795 ret i1 %.not1796}1797 1798define zeroext i1 @vec_all_le_vss(<8 x i16> %a, <8 x i16> %b) {1799; CHECK-LABEL: vec_all_le_vss:1800; CHECK: # %bb.0: # %entry1801; CHECK-NEXT: vchhs %v0, %v24, %v261802; CHECK-NEXT: lghi %r2, 01803; CHECK-NEXT: locghio %r2, 11804; CHECK-NEXT: br %r141805entry:1806 %0 = icmp sgt <8 x i16> %a, %b1807 %1 = bitcast <8 x i1> %0 to i81808 %2 = icmp eq i8 %1, 01809 ret i1 %21810}1811 1812define zeroext i1 @vec_any_le_vss(<8 x i16> %a, <8 x i16> %b) {1813; CHECK-LABEL: vec_any_le_vss:1814; CHECK: # %bb.0: # %entry1815; CHECK-NEXT: vchhs %v0, %v24, %v261816; CHECK-NEXT: lghi %r2, 01817; CHECK-NEXT: locghinhe %r2, 11818; CHECK-NEXT: br %r141819entry:1820 %cmp = icmp sle <8 x i16> %a, %b1821 %0 = bitcast <8 x i1> %cmp to i81822 %1 = icmp ne i8 %0, 01823 ret i1 %11824}1825 1826define zeroext i1 @not_vec_all_le_vss(<8 x i16> %a, <8 x i16> %b) {1827; CHECK-LABEL: not_vec_all_le_vss:1828; CHECK: # %bb.0: # %entry1829; CHECK-NEXT: vchhs %v0, %v24, %v261830; CHECK-NEXT: lghi %r2, 01831; CHECK-NEXT: locghile %r2, 11832; CHECK-NEXT: br %r141833entry:1834 %0 = icmp sgt <8 x i16> %a, %b1835 %1 = bitcast <8 x i1> %0 to i81836 %2 = icmp ne i8 %1, 01837 ret i1 %21838}1839 1840define zeroext i1 @not_vec_any_le_vss(<8 x i16> %a, <8 x i16> %b) {1841; CHECK-LABEL: not_vec_any_le_vss:1842; CHECK: # %bb.0: # %entry1843; CHECK-NEXT: vchhs %v0, %v24, %v261844; CHECK-NEXT: lghi %r2, 01845; CHECK-NEXT: locghie %r2, 11846; CHECK-NEXT: br %r141847entry:1848 %cmp = icmp sle <8 x i16> %a, %b1849 %0 = bitcast <8 x i1> %cmp to i81850 %.not = icmp eq i8 %0, 01851 ret i1 %.not1852}1853 1854define zeroext i1 @vec_all_le_vus(<8 x i16> %a, <8 x i16> %b) {1855; CHECK-LABEL: vec_all_le_vus:1856; CHECK: # %bb.0: # %entry1857; CHECK-NEXT: vchlhs %v0, %v24, %v261858; CHECK-NEXT: lghi %r2, 01859; CHECK-NEXT: locghio %r2, 11860; CHECK-NEXT: br %r141861entry:1862 %0 = icmp ugt <8 x i16> %a, %b1863 %1 = bitcast <8 x i1> %0 to i81864 %2 = icmp eq i8 %1, 01865 ret i1 %21866}1867 1868define zeroext i1 @vec_any_le_vus(<8 x i16> %a, <8 x i16> %b) {1869; CHECK-LABEL: vec_any_le_vus:1870; CHECK: # %bb.0: # %entry1871; CHECK-NEXT: vchlhs %v0, %v24, %v261872; CHECK-NEXT: lghi %r2, 01873; CHECK-NEXT: locghinhe %r2, 11874; CHECK-NEXT: br %r141875entry:1876 %cmp = icmp ule <8 x i16> %a, %b1877 %0 = bitcast <8 x i1> %cmp to i81878 %1 = icmp ne i8 %0, 01879 ret i1 %11880}1881 1882define zeroext i1 @not_vec_all_le_vus(<8 x i16> %a, <8 x i16> %b) {1883; CHECK-LABEL: not_vec_all_le_vus:1884; CHECK: # %bb.0: # %entry1885; CHECK-NEXT: vchlhs %v0, %v24, %v261886; CHECK-NEXT: lghi %r2, 01887; CHECK-NEXT: locghile %r2, 11888; CHECK-NEXT: br %r141889entry:1890 %0 = icmp ugt <8 x i16> %a, %b1891 %1 = bitcast <8 x i1> %0 to i81892 %2 = icmp ne i8 %1, 01893 ret i1 %21894}1895 1896define zeroext i1 @not_vec_any_le_vus(<8 x i16> %a, <8 x i16> %b) {1897; CHECK-LABEL: not_vec_any_le_vus:1898; CHECK: # %bb.0: # %entry1899; CHECK-NEXT: vchlhs %v0, %v24, %v261900; CHECK-NEXT: lghi %r2, 01901; CHECK-NEXT: locghie %r2, 11902; CHECK-NEXT: br %r141903entry:1904 %cmp = icmp ule <8 x i16> %a, %b1905 %0 = bitcast <8 x i1> %cmp to i81906 %.not = icmp eq i8 %0, 01907 ret i1 %.not1908}1909 1910define zeroext i1 @vec_all_le_vsi(<4 x i32> %a, <4 x i32> %b) {1911; CHECK-LABEL: vec_all_le_vsi:1912; CHECK: # %bb.0: # %entry1913; CHECK-NEXT: vchfs %v0, %v24, %v261914; CHECK-NEXT: lghi %r2, 01915; CHECK-NEXT: locghio %r2, 11916; CHECK-NEXT: br %r141917entry:1918 %0 = icmp sgt <4 x i32> %a, %b1919 %1 = bitcast <4 x i1> %0 to i41920 %2 = icmp eq i4 %1, 01921 ret i1 %21922}1923 1924define zeroext i1 @vec_any_le_vsi(<4 x i32> %a, <4 x i32> %b) {1925; CHECK-LABEL: vec_any_le_vsi:1926; CHECK: # %bb.0: # %entry1927; CHECK-NEXT: vchfs %v0, %v24, %v261928; CHECK-NEXT: lghi %r2, 01929; CHECK-NEXT: locghinhe %r2, 11930; CHECK-NEXT: br %r141931entry:1932 %cmp = icmp sle <4 x i32> %a, %b1933 %0 = bitcast <4 x i1> %cmp to i41934 %1 = icmp ne i4 %0, 01935 ret i1 %11936}1937 1938define zeroext i1 @not_vec_all_le_vsi(<4 x i32> %a, <4 x i32> %b) {1939; CHECK-LABEL: not_vec_all_le_vsi:1940; CHECK: # %bb.0: # %entry1941; CHECK-NEXT: vchfs %v0, %v24, %v261942; CHECK-NEXT: lghi %r2, 01943; CHECK-NEXT: locghile %r2, 11944; CHECK-NEXT: br %r141945entry:1946 %0 = icmp sgt <4 x i32> %a, %b1947 %1 = bitcast <4 x i1> %0 to i41948 %2 = icmp ne i4 %1, 01949 ret i1 %21950}1951 1952define zeroext i1 @not_vec_any_le_vsi(<4 x i32> %a, <4 x i32> %b) {1953; CHECK-LABEL: not_vec_any_le_vsi:1954; CHECK: # %bb.0: # %entry1955; CHECK-NEXT: vchfs %v0, %v24, %v261956; CHECK-NEXT: lghi %r2, 01957; CHECK-NEXT: locghie %r2, 11958; CHECK-NEXT: br %r141959entry:1960 %cmp = icmp sle <4 x i32> %a, %b1961 %0 = bitcast <4 x i1> %cmp to i41962 %.not = icmp eq i4 %0, 01963 ret i1 %.not1964}1965 1966define zeroext i1 @vec_all_le_vui(<4 x i32> %a, <4 x i32> %b) {1967; CHECK-LABEL: vec_all_le_vui:1968; CHECK: # %bb.0: # %entry1969; CHECK-NEXT: vchlfs %v0, %v24, %v261970; CHECK-NEXT: lghi %r2, 01971; CHECK-NEXT: locghio %r2, 11972; CHECK-NEXT: br %r141973entry:1974 %0 = icmp ugt <4 x i32> %a, %b1975 %1 = bitcast <4 x i1> %0 to i41976 %2 = icmp eq i4 %1, 01977 ret i1 %21978}1979 1980define zeroext i1 @vec_any_le_vui(<4 x i32> %a, <4 x i32> %b) {1981; CHECK-LABEL: vec_any_le_vui:1982; CHECK: # %bb.0: # %entry1983; CHECK-NEXT: vchlfs %v0, %v24, %v261984; CHECK-NEXT: lghi %r2, 01985; CHECK-NEXT: locghinhe %r2, 11986; CHECK-NEXT: br %r141987entry:1988 %cmp = icmp ule <4 x i32> %a, %b1989 %0 = bitcast <4 x i1> %cmp to i41990 %1 = icmp ne i4 %0, 01991 ret i1 %11992}1993 1994define zeroext i1 @not_vec_all_le_vui(<4 x i32> %a, <4 x i32> %b) {1995; CHECK-LABEL: not_vec_all_le_vui:1996; CHECK: # %bb.0: # %entry1997; CHECK-NEXT: vchlfs %v0, %v24, %v261998; CHECK-NEXT: lghi %r2, 01999; CHECK-NEXT: locghile %r2, 12000; CHECK-NEXT: br %r142001entry:2002 %0 = icmp ugt <4 x i32> %a, %b2003 %1 = bitcast <4 x i1> %0 to i42004 %2 = icmp ne i4 %1, 02005 ret i1 %22006}2007 2008define zeroext i1 @not_vec_any_le_vui(<4 x i32> %a, <4 x i32> %b) {2009; CHECK-LABEL: not_vec_any_le_vui:2010; CHECK: # %bb.0: # %entry2011; CHECK-NEXT: vchlfs %v0, %v24, %v262012; CHECK-NEXT: lghi %r2, 02013; CHECK-NEXT: locghie %r2, 12014; CHECK-NEXT: br %r142015entry:2016 %cmp = icmp ule <4 x i32> %a, %b2017 %0 = bitcast <4 x i1> %cmp to i42018 %.not = icmp eq i4 %0, 02019 ret i1 %.not2020}2021 2022define zeroext i1 @vec_all_le_vsl(<2 x i64> %a, <2 x i64> %b) {2023; CHECK-LABEL: vec_all_le_vsl:2024; CHECK: # %bb.0: # %entry2025; CHECK-NEXT: vchgs %v0, %v24, %v262026; CHECK-NEXT: lghi %r2, 02027; CHECK-NEXT: locghio %r2, 12028; CHECK-NEXT: br %r142029entry:2030 %0 = icmp sgt <2 x i64> %a, %b2031 %1 = bitcast <2 x i1> %0 to i22032 %2 = icmp eq i2 %1, 02033 ret i1 %22034}2035 2036define zeroext i1 @vec_any_le_vsl(<2 x i64> %a, <2 x i64> %b) {2037; CHECK-LABEL: vec_any_le_vsl:2038; CHECK: # %bb.0: # %entry2039; CHECK-NEXT: vchgs %v0, %v24, %v262040; CHECK-NEXT: lghi %r2, 02041; CHECK-NEXT: locghinhe %r2, 12042; CHECK-NEXT: br %r142043entry:2044 %cmp = icmp sle <2 x i64> %a, %b2045 %0 = bitcast <2 x i1> %cmp to i22046 %1 = icmp ne i2 %0, 02047 ret i1 %12048}2049 2050define zeroext i1 @not_vec_all_le_vsl(<2 x i64> %a, <2 x i64> %b) {2051; CHECK-LABEL: not_vec_all_le_vsl:2052; CHECK: # %bb.0: # %entry2053; CHECK-NEXT: vchgs %v0, %v24, %v262054; CHECK-NEXT: lghi %r2, 02055; CHECK-NEXT: locghile %r2, 12056; CHECK-NEXT: br %r142057entry:2058 %0 = icmp sgt <2 x i64> %a, %b2059 %1 = bitcast <2 x i1> %0 to i22060 %2 = icmp ne i2 %1, 02061 ret i1 %22062}2063 2064define zeroext i1 @not_vec_any_le_vsl(<2 x i64> %a, <2 x i64> %b) {2065; CHECK-LABEL: not_vec_any_le_vsl:2066; CHECK: # %bb.0: # %entry2067; CHECK-NEXT: vchgs %v0, %v24, %v262068; CHECK-NEXT: lghi %r2, 02069; CHECK-NEXT: locghie %r2, 12070; CHECK-NEXT: br %r142071entry:2072 %cmp = icmp sle <2 x i64> %a, %b2073 %0 = bitcast <2 x i1> %cmp to i22074 %.not = icmp eq i2 %0, 02075 ret i1 %.not2076}2077 2078define zeroext i1 @vec_all_le_vul(<2 x i64> %a, <2 x i64> %b) {2079; CHECK-LABEL: vec_all_le_vul:2080; CHECK: # %bb.0: # %entry2081; CHECK-NEXT: vchlgs %v0, %v24, %v262082; CHECK-NEXT: lghi %r2, 02083; CHECK-NEXT: locghio %r2, 12084; CHECK-NEXT: br %r142085entry:2086 %0 = icmp ugt <2 x i64> %a, %b2087 %1 = bitcast <2 x i1> %0 to i22088 %2 = icmp eq i2 %1, 02089 ret i1 %22090}2091 2092define zeroext i1 @vec_any_le_vul(<2 x i64> %a, <2 x i64> %b) {2093; CHECK-LABEL: vec_any_le_vul:2094; CHECK: # %bb.0: # %entry2095; CHECK-NEXT: vchlgs %v0, %v24, %v262096; CHECK-NEXT: lghi %r2, 02097; CHECK-NEXT: locghinhe %r2, 12098; CHECK-NEXT: br %r142099entry:2100 %cmp = icmp ule <2 x i64> %a, %b2101 %0 = bitcast <2 x i1> %cmp to i22102 %1 = icmp ne i2 %0, 02103 ret i1 %12104}2105 2106define zeroext i1 @not_vec_all_le_vul(<2 x i64> %a, <2 x i64> %b) {2107; CHECK-LABEL: not_vec_all_le_vul:2108; CHECK: # %bb.0: # %entry2109; CHECK-NEXT: vchlgs %v0, %v24, %v262110; CHECK-NEXT: lghi %r2, 02111; CHECK-NEXT: locghile %r2, 12112; CHECK-NEXT: br %r142113entry:2114 %0 = icmp ugt <2 x i64> %a, %b2115 %1 = bitcast <2 x i1> %0 to i22116 %2 = icmp ne i2 %1, 02117 ret i1 %22118}2119 2120define zeroext i1 @not_vec_any_le_vul(<2 x i64> %a, <2 x i64> %b) {2121; CHECK-LABEL: not_vec_any_le_vul:2122; CHECK: # %bb.0: # %entry2123; CHECK-NEXT: vchlgs %v0, %v24, %v262124; CHECK-NEXT: lghi %r2, 02125; CHECK-NEXT: locghie %r2, 12126; CHECK-NEXT: br %r142127entry:2128 %cmp = icmp ule <2 x i64> %a, %b2129 %0 = bitcast <2 x i1> %cmp to i22130 %.not = icmp eq i2 %0, 02131 ret i1 %.not2132}2133 2134define zeroext i1 @vec_all_le_vf(<4 x float> %a, <4 x float> %b) {2135; CHECK-LABEL: vec_all_le_vf:2136; CHECK: # %bb.0: # %entry2137; CHECK-NEXT: vfchesbs %v0, %v26, %v242138; CHECK-NEXT: lghi %r2, 02139; CHECK-NEXT: locghie %r2, 12140; CHECK-NEXT: br %r142141entry:2142 %0 = fcmp ugt <4 x float> %a, %b2143 %1 = bitcast <4 x i1> %0 to i42144 %2 = icmp eq i4 %1, 02145 ret i1 %22146}2147 2148define zeroext i1 @vec_any_le_vf(<4 x float> %a, <4 x float> %b) {2149; CHECK-LABEL: vec_any_le_vf:2150; CHECK: # %bb.0: # %entry2151; CHECK-NEXT: vfchesbs %v0, %v26, %v242152; CHECK-NEXT: lghi %r2, 02153; CHECK-NEXT: locghile %r2, 12154; CHECK-NEXT: br %r142155entry:2156 %cmp = fcmp ole <4 x float> %a, %b2157 %0 = bitcast <4 x i1> %cmp to i42158 %1 = icmp ne i4 %0, 02159 ret i1 %12160}2161 2162define zeroext i1 @not_vec_all_le_vf(<4 x float> %a, <4 x float> %b) {2163; CHECK-LABEL: not_vec_all_le_vf:2164; CHECK: # %bb.0: # %entry2165; CHECK-NEXT: vfchesbs %v0, %v26, %v242166; CHECK-NEXT: lghi %r2, 02167; CHECK-NEXT: locghinhe %r2, 12168; CHECK-NEXT: br %r142169entry:2170 %0 = fcmp ugt <4 x float> %a, %b2171 %1 = bitcast <4 x i1> %0 to i42172 %2 = icmp ne i4 %1, 02173 ret i1 %22174}2175 2176define zeroext i1 @not_vec_any_le_vf(<4 x float> %a, <4 x float> %b) {2177; CHECK-LABEL: not_vec_any_le_vf:2178; CHECK: # %bb.0: # %entry2179; CHECK-NEXT: vfchesbs %v0, %v26, %v242180; CHECK-NEXT: lghi %r2, 02181; CHECK-NEXT: locghio %r2, 12182; CHECK-NEXT: br %r142183entry:2184 %cmp = fcmp ole <4 x float> %a, %b2185 %0 = bitcast <4 x i1> %cmp to i42186 %.not = icmp eq i4 %0, 02187 ret i1 %.not2188}2189 2190define zeroext i1 @vec_all_le_vd(<2 x double> %a, <2 x double> %b) {2191; CHECK-LABEL: vec_all_le_vd:2192; CHECK: # %bb.0: # %entry2193; CHECK-NEXT: vfchedbs %v0, %v26, %v242194; CHECK-NEXT: lghi %r2, 02195; CHECK-NEXT: locghie %r2, 12196; CHECK-NEXT: br %r142197entry:2198 %0 = fcmp ugt <2 x double> %a, %b2199 %1 = bitcast <2 x i1> %0 to i22200 %2 = icmp eq i2 %1, 02201 ret i1 %22202}2203 2204define zeroext i1 @vec_any_le_vd(<2 x double> %a, <2 x double> %b) {2205; CHECK-LABEL: vec_any_le_vd:2206; CHECK: # %bb.0: # %entry2207; CHECK-NEXT: vfchedbs %v0, %v26, %v242208; CHECK-NEXT: lghi %r2, 02209; CHECK-NEXT: locghile %r2, 12210; CHECK-NEXT: br %r142211entry:2212 %cmp = fcmp ole <2 x double> %a, %b2213 %0 = bitcast <2 x i1> %cmp to i22214 %1 = icmp ne i2 %0, 02215 ret i1 %12216}2217 2218define zeroext i1 @not_vec_all_le_vd(<2 x double> %a, <2 x double> %b) {2219; CHECK-LABEL: not_vec_all_le_vd:2220; CHECK: # %bb.0: # %entry2221; CHECK-NEXT: vfchedbs %v0, %v26, %v242222; CHECK-NEXT: lghi %r2, 02223; CHECK-NEXT: locghinhe %r2, 12224; CHECK-NEXT: br %r142225entry:2226 %0 = fcmp ugt <2 x double> %a, %b2227 %1 = bitcast <2 x i1> %0 to i22228 %2 = icmp ne i2 %1, 02229 ret i1 %22230}2231 2232define zeroext i1 @not_vec_any_le_vd(<2 x double> %a, <2 x double> %b) {2233; CHECK-LABEL: not_vec_any_le_vd:2234; CHECK: # %bb.0: # %entry2235; CHECK-NEXT: vfchedbs %v0, %v26, %v242236; CHECK-NEXT: lghi %r2, 02237; CHECK-NEXT: locghio %r2, 12238; CHECK-NEXT: br %r142239entry:2240 %cmp = fcmp ole <2 x double> %a, %b2241 %0 = bitcast <2 x i1> %cmp to i22242 %.not = icmp eq i2 %0, 02243 ret i1 %.not2244}2245 2246define zeroext i1 @vec_all_gt_vsc(<16 x i8> %a, <16 x i8> %b) {2247; CHECK-LABEL: vec_all_gt_vsc:2248; CHECK: # %bb.0: # %entry2249; CHECK-NEXT: vchbs %v0, %v24, %v262250; CHECK-NEXT: lghi %r2, 02251; CHECK-NEXT: locghie %r2, 12252; CHECK-NEXT: br %r142253entry:2254 %0 = icmp sle <16 x i8> %a, %b2255 %1 = bitcast <16 x i1> %0 to i162256 %2 = icmp eq i16 %1, 02257 ret i1 %22258}2259 2260define zeroext i1 @vec_any_gt_vsc(<16 x i8> %a, <16 x i8> %b) {2261; CHECK-LABEL: vec_any_gt_vsc:2262; CHECK: # %bb.0: # %entry2263; CHECK-NEXT: vchbs %v0, %v24, %v262264; CHECK-NEXT: lghi %r2, 02265; CHECK-NEXT: locghile %r2, 12266; CHECK-NEXT: br %r142267entry:2268 %cmp = icmp sgt <16 x i8> %a, %b2269 %0 = bitcast <16 x i1> %cmp to i162270 %1 = icmp ne i16 %0, 02271 ret i1 %12272}2273 2274define zeroext i1 @not_vec_all_gt_vsc(<16 x i8> %a, <16 x i8> %b) {2275; CHECK-LABEL: not_vec_all_gt_vsc:2276; CHECK: # %bb.0: # %entry2277; CHECK-NEXT: vchbs %v0, %v24, %v262278; CHECK-NEXT: lghi %r2, 02279; CHECK-NEXT: locghinhe %r2, 12280; CHECK-NEXT: br %r142281entry:2282 %0 = icmp sle <16 x i8> %a, %b2283 %1 = bitcast <16 x i1> %0 to i162284 %2 = icmp ne i16 %1, 02285 ret i1 %22286}2287 2288define zeroext i1 @not_vec_any_gt_vsc(<16 x i8> %a, <16 x i8> %b) {2289; CHECK-LABEL: not_vec_any_gt_vsc:2290; CHECK: # %bb.0: # %entry2291; CHECK-NEXT: vchbs %v0, %v24, %v262292; CHECK-NEXT: lghi %r2, 02293; CHECK-NEXT: locghio %r2, 12294; CHECK-NEXT: br %r142295entry:2296 %cmp = icmp sgt <16 x i8> %a, %b2297 %0 = bitcast <16 x i1> %cmp to i162298 %.not = icmp eq i16 %0, 02299 ret i1 %.not2300}2301 2302define zeroext i1 @vec_all_gt_vuc(<16 x i8> %a, <16 x i8> %b) {2303; CHECK-LABEL: vec_all_gt_vuc:2304; CHECK: # %bb.0: # %entry2305; CHECK-NEXT: vchlbs %v0, %v24, %v262306; CHECK-NEXT: lghi %r2, 02307; CHECK-NEXT: locghie %r2, 12308; CHECK-NEXT: br %r142309entry:2310 %0 = icmp ule <16 x i8> %a, %b2311 %1 = bitcast <16 x i1> %0 to i162312 %2 = icmp eq i16 %1, 02313 ret i1 %22314}2315 2316define zeroext i1 @vec_any_gt_vuc(<16 x i8> %a, <16 x i8> %b) {2317; CHECK-LABEL: vec_any_gt_vuc:2318; CHECK: # %bb.0: # %entry2319; CHECK-NEXT: vchlbs %v0, %v24, %v262320; CHECK-NEXT: lghi %r2, 02321; CHECK-NEXT: locghile %r2, 12322; CHECK-NEXT: br %r142323entry:2324 %cmp = icmp ugt <16 x i8> %a, %b2325 %0 = bitcast <16 x i1> %cmp to i162326 %1 = icmp ne i16 %0, 02327 ret i1 %12328}2329 2330define zeroext i1 @not_vec_all_gt_vuc(<16 x i8> %a, <16 x i8> %b) {2331; CHECK-LABEL: not_vec_all_gt_vuc:2332; CHECK: # %bb.0: # %entry2333; CHECK-NEXT: vchlbs %v0, %v24, %v262334; CHECK-NEXT: lghi %r2, 02335; CHECK-NEXT: locghinhe %r2, 12336; CHECK-NEXT: br %r142337entry:2338 %0 = icmp ule <16 x i8> %a, %b2339 %1 = bitcast <16 x i1> %0 to i162340 %2 = icmp ne i16 %1, 02341 ret i1 %22342}2343 2344define zeroext i1 @not_vec_any_gt_vuc(<16 x i8> %a, <16 x i8> %b) {2345; CHECK-LABEL: not_vec_any_gt_vuc:2346; CHECK: # %bb.0: # %entry2347; CHECK-NEXT: vchlbs %v0, %v24, %v262348; CHECK-NEXT: lghi %r2, 02349; CHECK-NEXT: locghio %r2, 12350; CHECK-NEXT: br %r142351entry:2352 %cmp = icmp ugt <16 x i8> %a, %b2353 %0 = bitcast <16 x i1> %cmp to i162354 %.not = icmp eq i16 %0, 02355 ret i1 %.not2356}2357 2358define zeroext i1 @vec_all_gt_vss(<8 x i16> %a, <8 x i16> %b) {2359; CHECK-LABEL: vec_all_gt_vss:2360; CHECK: # %bb.0: # %entry2361; CHECK-NEXT: vchhs %v0, %v24, %v262362; CHECK-NEXT: lghi %r2, 02363; CHECK-NEXT: locghie %r2, 12364; CHECK-NEXT: br %r142365entry:2366 %0 = icmp sle <8 x i16> %a, %b2367 %1 = bitcast <8 x i1> %0 to i82368 %2 = icmp eq i8 %1, 02369 ret i1 %22370}2371 2372define zeroext i1 @vec_any_gt_vss(<8 x i16> %a, <8 x i16> %b) {2373; CHECK-LABEL: vec_any_gt_vss:2374; CHECK: # %bb.0: # %entry2375; CHECK-NEXT: vchhs %v0, %v24, %v262376; CHECK-NEXT: lghi %r2, 02377; CHECK-NEXT: locghile %r2, 12378; CHECK-NEXT: br %r142379entry:2380 %cmp = icmp sgt <8 x i16> %a, %b2381 %0 = bitcast <8 x i1> %cmp to i82382 %1 = icmp ne i8 %0, 02383 ret i1 %12384}2385 2386define zeroext i1 @not_vec_all_gt_vss(<8 x i16> %a, <8 x i16> %b) {2387; CHECK-LABEL: not_vec_all_gt_vss:2388; CHECK: # %bb.0: # %entry2389; CHECK-NEXT: vchhs %v0, %v24, %v262390; CHECK-NEXT: lghi %r2, 02391; CHECK-NEXT: locghinhe %r2, 12392; CHECK-NEXT: br %r142393entry:2394 %0 = icmp sle <8 x i16> %a, %b2395 %1 = bitcast <8 x i1> %0 to i82396 %2 = icmp ne i8 %1, 02397 ret i1 %22398}2399 2400define zeroext i1 @not_vec_any_gt_vss(<8 x i16> %a, <8 x i16> %b) {2401; CHECK-LABEL: not_vec_any_gt_vss:2402; CHECK: # %bb.0: # %entry2403; CHECK-NEXT: vchhs %v0, %v24, %v262404; CHECK-NEXT: lghi %r2, 02405; CHECK-NEXT: locghio %r2, 12406; CHECK-NEXT: br %r142407entry:2408 %cmp = icmp sgt <8 x i16> %a, %b2409 %0 = bitcast <8 x i1> %cmp to i82410 %.not = icmp eq i8 %0, 02411 ret i1 %.not2412}2413 2414define zeroext i1 @vec_all_gt_vus(<8 x i16> %a, <8 x i16> %b) {2415; CHECK-LABEL: vec_all_gt_vus:2416; CHECK: # %bb.0: # %entry2417; CHECK-NEXT: vchlhs %v0, %v24, %v262418; CHECK-NEXT: lghi %r2, 02419; CHECK-NEXT: locghie %r2, 12420; CHECK-NEXT: br %r142421entry:2422 %0 = icmp ule <8 x i16> %a, %b2423 %1 = bitcast <8 x i1> %0 to i82424 %2 = icmp eq i8 %1, 02425 ret i1 %22426}2427 2428define zeroext i1 @vec_any_gt_vus(<8 x i16> %a, <8 x i16> %b) {2429; CHECK-LABEL: vec_any_gt_vus:2430; CHECK: # %bb.0: # %entry2431; CHECK-NEXT: vchlhs %v0, %v24, %v262432; CHECK-NEXT: lghi %r2, 02433; CHECK-NEXT: locghile %r2, 12434; CHECK-NEXT: br %r142435entry:2436 %cmp = icmp ugt <8 x i16> %a, %b2437 %0 = bitcast <8 x i1> %cmp to i82438 %1 = icmp ne i8 %0, 02439 ret i1 %12440}2441 2442define zeroext i1 @not_vec_all_gt_vus(<8 x i16> %a, <8 x i16> %b) {2443; CHECK-LABEL: not_vec_all_gt_vus:2444; CHECK: # %bb.0: # %entry2445; CHECK-NEXT: vchlhs %v0, %v24, %v262446; CHECK-NEXT: lghi %r2, 02447; CHECK-NEXT: locghinhe %r2, 12448; CHECK-NEXT: br %r142449entry:2450 %0 = icmp ule <8 x i16> %a, %b2451 %1 = bitcast <8 x i1> %0 to i82452 %2 = icmp ne i8 %1, 02453 ret i1 %22454}2455 2456define zeroext i1 @not_vec_any_gt_vus(<8 x i16> %a, <8 x i16> %b) {2457; CHECK-LABEL: not_vec_any_gt_vus:2458; CHECK: # %bb.0: # %entry2459; CHECK-NEXT: vchlhs %v0, %v24, %v262460; CHECK-NEXT: lghi %r2, 02461; CHECK-NEXT: locghio %r2, 12462; CHECK-NEXT: br %r142463entry:2464 %cmp = icmp ugt <8 x i16> %a, %b2465 %0 = bitcast <8 x i1> %cmp to i82466 %.not = icmp eq i8 %0, 02467 ret i1 %.not2468}2469 2470define zeroext i1 @vec_all_gt_vsi(<4 x i32> %a, <4 x i32> %b) {2471; CHECK-LABEL: vec_all_gt_vsi:2472; CHECK: # %bb.0: # %entry2473; CHECK-NEXT: vchfs %v0, %v24, %v262474; CHECK-NEXT: lghi %r2, 02475; CHECK-NEXT: locghie %r2, 12476; CHECK-NEXT: br %r142477entry:2478 %0 = icmp sle <4 x i32> %a, %b2479 %1 = bitcast <4 x i1> %0 to i42480 %2 = icmp eq i4 %1, 02481 ret i1 %22482}2483 2484define zeroext i1 @vec_any_gt_vsi(<4 x i32> %a, <4 x i32> %b) {2485; CHECK-LABEL: vec_any_gt_vsi:2486; CHECK: # %bb.0: # %entry2487; CHECK-NEXT: vchfs %v0, %v24, %v262488; CHECK-NEXT: lghi %r2, 02489; CHECK-NEXT: locghile %r2, 12490; CHECK-NEXT: br %r142491entry:2492 %cmp = icmp sgt <4 x i32> %a, %b2493 %0 = bitcast <4 x i1> %cmp to i42494 %1 = icmp ne i4 %0, 02495 ret i1 %12496}2497 2498define zeroext i1 @not_vec_all_gt_vsi(<4 x i32> %a, <4 x i32> %b) {2499; CHECK-LABEL: not_vec_all_gt_vsi:2500; CHECK: # %bb.0: # %entry2501; CHECK-NEXT: vchfs %v0, %v24, %v262502; CHECK-NEXT: lghi %r2, 02503; CHECK-NEXT: locghinhe %r2, 12504; CHECK-NEXT: br %r142505entry:2506 %0 = icmp sle <4 x i32> %a, %b2507 %1 = bitcast <4 x i1> %0 to i42508 %2 = icmp ne i4 %1, 02509 ret i1 %22510}2511 2512define zeroext i1 @not_vec_any_gt_vsi(<4 x i32> %a, <4 x i32> %b) {2513; CHECK-LABEL: not_vec_any_gt_vsi:2514; CHECK: # %bb.0: # %entry2515; CHECK-NEXT: vchfs %v0, %v24, %v262516; CHECK-NEXT: lghi %r2, 02517; CHECK-NEXT: locghio %r2, 12518; CHECK-NEXT: br %r142519entry:2520 %cmp = icmp sgt <4 x i32> %a, %b2521 %0 = bitcast <4 x i1> %cmp to i42522 %.not = icmp eq i4 %0, 02523 ret i1 %.not2524}2525 2526define zeroext i1 @vec_all_gt_vui(<4 x i32> %a, <4 x i32> %b) {2527; CHECK-LABEL: vec_all_gt_vui:2528; CHECK: # %bb.0: # %entry2529; CHECK-NEXT: vchlfs %v0, %v24, %v262530; CHECK-NEXT: lghi %r2, 02531; CHECK-NEXT: locghie %r2, 12532; CHECK-NEXT: br %r142533entry:2534 %0 = icmp ule <4 x i32> %a, %b2535 %1 = bitcast <4 x i1> %0 to i42536 %2 = icmp eq i4 %1, 02537 ret i1 %22538}2539 2540define zeroext i1 @vec_any_gt_vui(<4 x i32> %a, <4 x i32> %b) {2541; CHECK-LABEL: vec_any_gt_vui:2542; CHECK: # %bb.0: # %entry2543; CHECK-NEXT: vchlfs %v0, %v24, %v262544; CHECK-NEXT: lghi %r2, 02545; CHECK-NEXT: locghile %r2, 12546; CHECK-NEXT: br %r142547entry:2548 %cmp = icmp ugt <4 x i32> %a, %b2549 %0 = bitcast <4 x i1> %cmp to i42550 %1 = icmp ne i4 %0, 02551 ret i1 %12552}2553 2554define zeroext i1 @not_vec_all_gt_vui(<4 x i32> %a, <4 x i32> %b) {2555; CHECK-LABEL: not_vec_all_gt_vui:2556; CHECK: # %bb.0: # %entry2557; CHECK-NEXT: vchlfs %v0, %v24, %v262558; CHECK-NEXT: lghi %r2, 02559; CHECK-NEXT: locghinhe %r2, 12560; CHECK-NEXT: br %r142561entry:2562 %0 = icmp ule <4 x i32> %a, %b2563 %1 = bitcast <4 x i1> %0 to i42564 %2 = icmp ne i4 %1, 02565 ret i1 %22566}2567 2568define zeroext i1 @not_vec_any_gt_vui(<4 x i32> %a, <4 x i32> %b) {2569; CHECK-LABEL: not_vec_any_gt_vui:2570; CHECK: # %bb.0: # %entry2571; CHECK-NEXT: vchlfs %v0, %v24, %v262572; CHECK-NEXT: lghi %r2, 02573; CHECK-NEXT: locghio %r2, 12574; CHECK-NEXT: br %r142575entry:2576 %cmp = icmp ugt <4 x i32> %a, %b2577 %0 = bitcast <4 x i1> %cmp to i42578 %.not = icmp eq i4 %0, 02579 ret i1 %.not2580}2581 2582define zeroext i1 @vec_all_gt_vsl(<2 x i64> %a, <2 x i64> %b) {2583; CHECK-LABEL: vec_all_gt_vsl:2584; CHECK: # %bb.0: # %entry2585; CHECK-NEXT: vchgs %v0, %v24, %v262586; CHECK-NEXT: lghi %r2, 02587; CHECK-NEXT: locghie %r2, 12588; CHECK-NEXT: br %r142589entry:2590 %0 = icmp sle <2 x i64> %a, %b2591 %1 = bitcast <2 x i1> %0 to i22592 %2 = icmp eq i2 %1, 02593 ret i1 %22594}2595 2596define zeroext i1 @vec_any_gt_vsl(<2 x i64> %a, <2 x i64> %b) {2597; CHECK-LABEL: vec_any_gt_vsl:2598; CHECK: # %bb.0: # %entry2599; CHECK-NEXT: vchgs %v0, %v24, %v262600; CHECK-NEXT: lghi %r2, 02601; CHECK-NEXT: locghile %r2, 12602; CHECK-NEXT: br %r142603entry:2604 %cmp = icmp sgt <2 x i64> %a, %b2605 %0 = bitcast <2 x i1> %cmp to i22606 %1 = icmp ne i2 %0, 02607 ret i1 %12608}2609 2610define zeroext i1 @not_vec_all_gt_vsl(<2 x i64> %a, <2 x i64> %b) {2611; CHECK-LABEL: not_vec_all_gt_vsl:2612; CHECK: # %bb.0: # %entry2613; CHECK-NEXT: vchgs %v0, %v24, %v262614; CHECK-NEXT: lghi %r2, 02615; CHECK-NEXT: locghinhe %r2, 12616; CHECK-NEXT: br %r142617entry:2618 %0 = icmp sle <2 x i64> %a, %b2619 %1 = bitcast <2 x i1> %0 to i22620 %2 = icmp ne i2 %1, 02621 ret i1 %22622}2623 2624define zeroext i1 @not_vec_any_gt_vsl(<2 x i64> %a, <2 x i64> %b) {2625; CHECK-LABEL: not_vec_any_gt_vsl:2626; CHECK: # %bb.0: # %entry2627; CHECK-NEXT: vchgs %v0, %v24, %v262628; CHECK-NEXT: lghi %r2, 02629; CHECK-NEXT: locghio %r2, 12630; CHECK-NEXT: br %r142631entry:2632 %cmp = icmp sgt <2 x i64> %a, %b2633 %0 = bitcast <2 x i1> %cmp to i22634 %.not = icmp eq i2 %0, 02635 ret i1 %.not2636}2637 2638define zeroext i1 @vec_all_gt_vul(<2 x i64> %a, <2 x i64> %b) {2639; CHECK-LABEL: vec_all_gt_vul:2640; CHECK: # %bb.0: # %entry2641; CHECK-NEXT: vchlgs %v0, %v24, %v262642; CHECK-NEXT: lghi %r2, 02643; CHECK-NEXT: locghie %r2, 12644; CHECK-NEXT: br %r142645entry:2646 %0 = icmp ule <2 x i64> %a, %b2647 %1 = bitcast <2 x i1> %0 to i22648 %2 = icmp eq i2 %1, 02649 ret i1 %22650}2651 2652define zeroext i1 @vec_any_gt_vul(<2 x i64> %a, <2 x i64> %b) {2653; CHECK-LABEL: vec_any_gt_vul:2654; CHECK: # %bb.0: # %entry2655; CHECK-NEXT: vchlgs %v0, %v24, %v262656; CHECK-NEXT: lghi %r2, 02657; CHECK-NEXT: locghile %r2, 12658; CHECK-NEXT: br %r142659entry:2660 %cmp = icmp ugt <2 x i64> %a, %b2661 %0 = bitcast <2 x i1> %cmp to i22662 %1 = icmp ne i2 %0, 02663 ret i1 %12664}2665 2666define zeroext i1 @not_vec_all_gt_vul(<2 x i64> %a, <2 x i64> %b) {2667; CHECK-LABEL: not_vec_all_gt_vul:2668; CHECK: # %bb.0: # %entry2669; CHECK-NEXT: vchlgs %v0, %v24, %v262670; CHECK-NEXT: lghi %r2, 02671; CHECK-NEXT: locghinhe %r2, 12672; CHECK-NEXT: br %r142673entry:2674 %0 = icmp ule <2 x i64> %a, %b2675 %1 = bitcast <2 x i1> %0 to i22676 %2 = icmp ne i2 %1, 02677 ret i1 %22678}2679 2680define zeroext i1 @not_vec_any_gt_vul(<2 x i64> %a, <2 x i64> %b) {2681; CHECK-LABEL: not_vec_any_gt_vul:2682; CHECK: # %bb.0: # %entry2683; CHECK-NEXT: vchlgs %v0, %v24, %v262684; CHECK-NEXT: lghi %r2, 02685; CHECK-NEXT: locghio %r2, 12686; CHECK-NEXT: br %r142687entry:2688 %cmp = icmp ugt <2 x i64> %a, %b2689 %0 = bitcast <2 x i1> %cmp to i22690 %.not = icmp eq i2 %0, 02691 ret i1 %.not2692}2693 2694define zeroext i1 @vec_all_gt_vf(<4 x float> %a, <4 x float> %b) {2695; CHECK-LABEL: vec_all_gt_vf:2696; CHECK: # %bb.0: # %entry2697; CHECK-NEXT: vfchsbs %v0, %v24, %v262698; CHECK-NEXT: lghi %r2, 02699; CHECK-NEXT: locghie %r2, 12700; CHECK-NEXT: br %r142701entry:2702 %0 = fcmp ule <4 x float> %a, %b2703 %1 = bitcast <4 x i1> %0 to i42704 %2 = icmp eq i4 %1, 02705 ret i1 %22706}2707 2708define zeroext i1 @vec_any_gt_vf(<4 x float> %a, <4 x float> %b) {2709; CHECK-LABEL: vec_any_gt_vf:2710; CHECK: # %bb.0: # %entry2711; CHECK-NEXT: vfchsbs %v0, %v24, %v262712; CHECK-NEXT: lghi %r2, 02713; CHECK-NEXT: locghile %r2, 12714; CHECK-NEXT: br %r142715entry:2716 %cmp = fcmp ogt <4 x float> %a, %b2717 %0 = bitcast <4 x i1> %cmp to i42718 %1 = icmp ne i4 %0, 02719 ret i1 %12720}2721 2722define zeroext i1 @not_vec_all_gt_vf(<4 x float> %a, <4 x float> %b) {2723; CHECK-LABEL: not_vec_all_gt_vf:2724; CHECK: # %bb.0: # %entry2725; CHECK-NEXT: vfchsbs %v0, %v24, %v262726; CHECK-NEXT: lghi %r2, 02727; CHECK-NEXT: locghinhe %r2, 12728; CHECK-NEXT: br %r142729entry:2730 %0 = fcmp ule <4 x float> %a, %b2731 %1 = bitcast <4 x i1> %0 to i42732 %2 = icmp ne i4 %1, 02733 ret i1 %22734}2735 2736define zeroext i1 @not_vec_any_gt_vf(<4 x float> %a, <4 x float> %b) {2737; CHECK-LABEL: not_vec_any_gt_vf:2738; CHECK: # %bb.0: # %entry2739; CHECK-NEXT: vfchsbs %v0, %v24, %v262740; CHECK-NEXT: lghi %r2, 02741; CHECK-NEXT: locghio %r2, 12742; CHECK-NEXT: br %r142743entry:2744 %cmp = fcmp ogt <4 x float> %a, %b2745 %0 = bitcast <4 x i1> %cmp to i42746 %.not = icmp eq i4 %0, 02747 ret i1 %.not2748}2749 2750define zeroext i1 @vec_all_gt_vd(<2 x double> %a, <2 x double> %b) {2751; CHECK-LABEL: vec_all_gt_vd:2752; CHECK: # %bb.0: # %entry2753; CHECK-NEXT: vfchdbs %v0, %v24, %v262754; CHECK-NEXT: lghi %r2, 02755; CHECK-NEXT: locghie %r2, 12756; CHECK-NEXT: br %r142757entry:2758 %0 = fcmp ule <2 x double> %a, %b2759 %1 = bitcast <2 x i1> %0 to i22760 %2 = icmp eq i2 %1, 02761 ret i1 %22762}2763 2764define zeroext i1 @vec_any_gt_vd(<2 x double> %a, <2 x double> %b) {2765; CHECK-LABEL: vec_any_gt_vd:2766; CHECK: # %bb.0: # %entry2767; CHECK-NEXT: vfchdbs %v0, %v24, %v262768; CHECK-NEXT: lghi %r2, 02769; CHECK-NEXT: locghile %r2, 12770; CHECK-NEXT: br %r142771entry:2772 %cmp = fcmp ogt <2 x double> %a, %b2773 %0 = bitcast <2 x i1> %cmp to i22774 %1 = icmp ne i2 %0, 02775 ret i1 %12776}2777 2778define zeroext i1 @not_vec_all_gt_vd(<2 x double> %a, <2 x double> %b) {2779; CHECK-LABEL: not_vec_all_gt_vd:2780; CHECK: # %bb.0: # %entry2781; CHECK-NEXT: vfchdbs %v0, %v24, %v262782; CHECK-NEXT: lghi %r2, 02783; CHECK-NEXT: locghinhe %r2, 12784; CHECK-NEXT: br %r142785entry:2786 %0 = fcmp ule <2 x double> %a, %b2787 %1 = bitcast <2 x i1> %0 to i22788 %2 = icmp ne i2 %1, 02789 ret i1 %22790}2791 2792define zeroext i1 @not_vec_any_gt_vd(<2 x double> %a, <2 x double> %b) {2793; CHECK-LABEL: not_vec_any_gt_vd:2794; CHECK: # %bb.0: # %entry2795; CHECK-NEXT: vfchdbs %v0, %v24, %v262796; CHECK-NEXT: lghi %r2, 02797; CHECK-NEXT: locghio %r2, 12798; CHECK-NEXT: br %r142799entry:2800 %cmp = fcmp ogt <2 x double> %a, %b2801 %0 = bitcast <2 x i1> %cmp to i22802 %.not = icmp eq i2 %0, 02803 ret i1 %.not2804}2805 2806define zeroext i1 @vec_all_ge_vsc(<16 x i8> %a, <16 x i8> %b) {2807; CHECK-LABEL: vec_all_ge_vsc:2808; CHECK: # %bb.0: # %entry2809; CHECK-NEXT: vchbs %v0, %v26, %v242810; CHECK-NEXT: lghi %r2, 02811; CHECK-NEXT: locghio %r2, 12812; CHECK-NEXT: br %r142813entry:2814 %0 = icmp slt <16 x i8> %a, %b2815 %1 = bitcast <16 x i1> %0 to i162816 %2 = icmp eq i16 %1, 02817 ret i1 %22818}2819 2820define zeroext i1 @vec_any_ge_vsc(<16 x i8> %a, <16 x i8> %b) {2821; CHECK-LABEL: vec_any_ge_vsc:2822; CHECK: # %bb.0: # %entry2823; CHECK-NEXT: vchbs %v0, %v26, %v242824; CHECK-NEXT: lghi %r2, 02825; CHECK-NEXT: locghinhe %r2, 12826; CHECK-NEXT: br %r142827entry:2828 %cmp = icmp sge <16 x i8> %a, %b2829 %0 = bitcast <16 x i1> %cmp to i162830 %1 = icmp ne i16 %0, 02831 ret i1 %12832}2833 2834define zeroext i1 @not_vec_all_ge_vsc(<16 x i8> %a, <16 x i8> %b) {2835; CHECK-LABEL: not_vec_all_ge_vsc:2836; CHECK: # %bb.0: # %entry2837; CHECK-NEXT: vchbs %v0, %v26, %v242838; CHECK-NEXT: lghi %r2, 02839; CHECK-NEXT: locghile %r2, 12840; CHECK-NEXT: br %r142841entry:2842 %0 = icmp slt <16 x i8> %a, %b2843 %1 = bitcast <16 x i1> %0 to i162844 %2 = icmp ne i16 %1, 02845 ret i1 %22846}2847 2848define zeroext i1 @not_vec_any_ge_vsc(<16 x i8> %a, <16 x i8> %b) {2849; CHECK-LABEL: not_vec_any_ge_vsc:2850; CHECK: # %bb.0: # %entry2851; CHECK-NEXT: vchbs %v0, %v26, %v242852; CHECK-NEXT: lghi %r2, 02853; CHECK-NEXT: locghie %r2, 12854; CHECK-NEXT: br %r142855entry:2856 %cmp = icmp sge <16 x i8> %a, %b2857 %0 = bitcast <16 x i1> %cmp to i162858 %.not = icmp eq i16 %0, 02859 ret i1 %.not2860}2861 2862define zeroext i1 @vec_all_ge_vuc(<16 x i8> %a, <16 x i8> %b) {2863; CHECK-LABEL: vec_all_ge_vuc:2864; CHECK: # %bb.0: # %entry2865; CHECK-NEXT: vchlbs %v0, %v26, %v242866; CHECK-NEXT: lghi %r2, 02867; CHECK-NEXT: locghio %r2, 12868; CHECK-NEXT: br %r142869entry:2870 %0 = icmp ult <16 x i8> %a, %b2871 %1 = bitcast <16 x i1> %0 to i162872 %2 = icmp eq i16 %1, 02873 ret i1 %22874}2875 2876define zeroext i1 @vec_any_ge_vuc(<16 x i8> %a, <16 x i8> %b) {2877; CHECK-LABEL: vec_any_ge_vuc:2878; CHECK: # %bb.0: # %entry2879; CHECK-NEXT: vchlbs %v0, %v26, %v242880; CHECK-NEXT: lghi %r2, 02881; CHECK-NEXT: locghinhe %r2, 12882; CHECK-NEXT: br %r142883entry:2884 %cmp = icmp uge <16 x i8> %a, %b2885 %0 = bitcast <16 x i1> %cmp to i162886 %1 = icmp ne i16 %0, 02887 ret i1 %12888}2889 2890define zeroext i1 @not_vec_all_ge_vuc(<16 x i8> %a, <16 x i8> %b) {2891; CHECK-LABEL: not_vec_all_ge_vuc:2892; CHECK: # %bb.0: # %entry2893; CHECK-NEXT: vchlbs %v0, %v26, %v242894; CHECK-NEXT: lghi %r2, 02895; CHECK-NEXT: locghile %r2, 12896; CHECK-NEXT: br %r142897entry:2898 %0 = icmp ult <16 x i8> %a, %b2899 %1 = bitcast <16 x i1> %0 to i162900 %2 = icmp ne i16 %1, 02901 ret i1 %22902}2903 2904define zeroext i1 @not_vec_any_ge_vuc(<16 x i8> %a, <16 x i8> %b) {2905; CHECK-LABEL: not_vec_any_ge_vuc:2906; CHECK: # %bb.0: # %entry2907; CHECK-NEXT: vchlbs %v0, %v26, %v242908; CHECK-NEXT: lghi %r2, 02909; CHECK-NEXT: locghie %r2, 12910; CHECK-NEXT: br %r142911entry:2912 %cmp = icmp uge <16 x i8> %a, %b2913 %0 = bitcast <16 x i1> %cmp to i162914 %.not = icmp eq i16 %0, 02915 ret i1 %.not2916}2917 2918define zeroext i1 @vec_all_ge_vss(<8 x i16> %a, <8 x i16> %b) {2919; CHECK-LABEL: vec_all_ge_vss:2920; CHECK: # %bb.0: # %entry2921; CHECK-NEXT: vchhs %v0, %v26, %v242922; CHECK-NEXT: lghi %r2, 02923; CHECK-NEXT: locghio %r2, 12924; CHECK-NEXT: br %r142925entry:2926 %0 = icmp slt <8 x i16> %a, %b2927 %1 = bitcast <8 x i1> %0 to i82928 %2 = icmp eq i8 %1, 02929 ret i1 %22930}2931 2932define zeroext i1 @vec_any_ge_vss(<8 x i16> %a, <8 x i16> %b) {2933; CHECK-LABEL: vec_any_ge_vss:2934; CHECK: # %bb.0: # %entry2935; CHECK-NEXT: vchhs %v0, %v26, %v242936; CHECK-NEXT: lghi %r2, 02937; CHECK-NEXT: locghinhe %r2, 12938; CHECK-NEXT: br %r142939entry:2940 %cmp = icmp sge <8 x i16> %a, %b2941 %0 = bitcast <8 x i1> %cmp to i82942 %1 = icmp ne i8 %0, 02943 ret i1 %12944}2945 2946define zeroext i1 @not_vec_all_ge_vss(<8 x i16> %a, <8 x i16> %b) {2947; CHECK-LABEL: not_vec_all_ge_vss:2948; CHECK: # %bb.0: # %entry2949; CHECK-NEXT: vchhs %v0, %v26, %v242950; CHECK-NEXT: lghi %r2, 02951; CHECK-NEXT: locghile %r2, 12952; CHECK-NEXT: br %r142953entry:2954 %0 = icmp slt <8 x i16> %a, %b2955 %1 = bitcast <8 x i1> %0 to i82956 %2 = icmp ne i8 %1, 02957 ret i1 %22958}2959 2960define zeroext i1 @not_vec_any_ge_vss(<8 x i16> %a, <8 x i16> %b) {2961; CHECK-LABEL: not_vec_any_ge_vss:2962; CHECK: # %bb.0: # %entry2963; CHECK-NEXT: vchhs %v0, %v26, %v242964; CHECK-NEXT: lghi %r2, 02965; CHECK-NEXT: locghie %r2, 12966; CHECK-NEXT: br %r142967entry:2968 %cmp = icmp sge <8 x i16> %a, %b2969 %0 = bitcast <8 x i1> %cmp to i82970 %.not = icmp eq i8 %0, 02971 ret i1 %.not2972}2973 2974define zeroext i1 @vec_all_ge_vus(<8 x i16> %a, <8 x i16> %b) {2975; CHECK-LABEL: vec_all_ge_vus:2976; CHECK: # %bb.0: # %entry2977; CHECK-NEXT: vchlhs %v0, %v26, %v242978; CHECK-NEXT: lghi %r2, 02979; CHECK-NEXT: locghio %r2, 12980; CHECK-NEXT: br %r142981entry:2982 %0 = icmp ult <8 x i16> %a, %b2983 %1 = bitcast <8 x i1> %0 to i82984 %2 = icmp eq i8 %1, 02985 ret i1 %22986}2987 2988define zeroext i1 @vec_any_ge_vus(<8 x i16> %a, <8 x i16> %b) {2989; CHECK-LABEL: vec_any_ge_vus:2990; CHECK: # %bb.0: # %entry2991; CHECK-NEXT: vchlhs %v0, %v26, %v242992; CHECK-NEXT: lghi %r2, 02993; CHECK-NEXT: locghinhe %r2, 12994; CHECK-NEXT: br %r142995entry:2996 %cmp = icmp uge <8 x i16> %a, %b2997 %0 = bitcast <8 x i1> %cmp to i82998 %1 = icmp ne i8 %0, 02999 ret i1 %13000}3001 3002define zeroext i1 @not_vec_all_ge_vus(<8 x i16> %a, <8 x i16> %b) {3003; CHECK-LABEL: not_vec_all_ge_vus:3004; CHECK: # %bb.0: # %entry3005; CHECK-NEXT: vchlhs %v0, %v26, %v243006; CHECK-NEXT: lghi %r2, 03007; CHECK-NEXT: locghile %r2, 13008; CHECK-NEXT: br %r143009entry:3010 %0 = icmp ult <8 x i16> %a, %b3011 %1 = bitcast <8 x i1> %0 to i83012 %2 = icmp ne i8 %1, 03013 ret i1 %23014}3015 3016define zeroext i1 @not_vec_any_ge_vus(<8 x i16> %a, <8 x i16> %b) {3017; CHECK-LABEL: not_vec_any_ge_vus:3018; CHECK: # %bb.0: # %entry3019; CHECK-NEXT: vchlhs %v0, %v26, %v243020; CHECK-NEXT: lghi %r2, 03021; CHECK-NEXT: locghie %r2, 13022; CHECK-NEXT: br %r143023entry:3024 %cmp = icmp uge <8 x i16> %a, %b3025 %0 = bitcast <8 x i1> %cmp to i83026 %.not = icmp eq i8 %0, 03027 ret i1 %.not3028}3029 3030define zeroext i1 @vec_all_ge_vsi(<4 x i32> %a, <4 x i32> %b) {3031; CHECK-LABEL: vec_all_ge_vsi:3032; CHECK: # %bb.0: # %entry3033; CHECK-NEXT: vchfs %v0, %v26, %v243034; CHECK-NEXT: lghi %r2, 03035; CHECK-NEXT: locghio %r2, 13036; CHECK-NEXT: br %r143037entry:3038 %0 = icmp slt <4 x i32> %a, %b3039 %1 = bitcast <4 x i1> %0 to i43040 %2 = icmp eq i4 %1, 03041 ret i1 %23042}3043 3044define zeroext i1 @vec_any_ge_vsi(<4 x i32> %a, <4 x i32> %b) {3045; CHECK-LABEL: vec_any_ge_vsi:3046; CHECK: # %bb.0: # %entry3047; CHECK-NEXT: vchfs %v0, %v26, %v243048; CHECK-NEXT: lghi %r2, 03049; CHECK-NEXT: locghinhe %r2, 13050; CHECK-NEXT: br %r143051entry:3052 %cmp = icmp sge <4 x i32> %a, %b3053 %0 = bitcast <4 x i1> %cmp to i43054 %1 = icmp ne i4 %0, 03055 ret i1 %13056}3057 3058define zeroext i1 @not_vec_all_ge_vsi(<4 x i32> %a, <4 x i32> %b) {3059; CHECK-LABEL: not_vec_all_ge_vsi:3060; CHECK: # %bb.0: # %entry3061; CHECK-NEXT: vchfs %v0, %v26, %v243062; CHECK-NEXT: lghi %r2, 03063; CHECK-NEXT: locghile %r2, 13064; CHECK-NEXT: br %r143065entry:3066 %0 = icmp slt <4 x i32> %a, %b3067 %1 = bitcast <4 x i1> %0 to i43068 %2 = icmp ne i4 %1, 03069 ret i1 %23070}3071 3072define zeroext i1 @not_vec_any_ge_vsi(<4 x i32> %a, <4 x i32> %b) {3073; CHECK-LABEL: not_vec_any_ge_vsi:3074; CHECK: # %bb.0: # %entry3075; CHECK-NEXT: vchfs %v0, %v26, %v243076; CHECK-NEXT: lghi %r2, 03077; CHECK-NEXT: locghie %r2, 13078; CHECK-NEXT: br %r143079entry:3080 %cmp = icmp sge <4 x i32> %a, %b3081 %0 = bitcast <4 x i1> %cmp to i43082 %.not = icmp eq i4 %0, 03083 ret i1 %.not3084}3085 3086define zeroext i1 @vec_all_ge_vui(<4 x i32> %a, <4 x i32> %b) {3087; CHECK-LABEL: vec_all_ge_vui:3088; CHECK: # %bb.0: # %entry3089; CHECK-NEXT: vchlfs %v0, %v26, %v243090; CHECK-NEXT: lghi %r2, 03091; CHECK-NEXT: locghio %r2, 13092; CHECK-NEXT: br %r143093entry:3094 %0 = icmp ult <4 x i32> %a, %b3095 %1 = bitcast <4 x i1> %0 to i43096 %2 = icmp eq i4 %1, 03097 ret i1 %23098}3099 3100define zeroext i1 @vec_any_ge_vui(<4 x i32> %a, <4 x i32> %b) {3101; CHECK-LABEL: vec_any_ge_vui:3102; CHECK: # %bb.0: # %entry3103; CHECK-NEXT: vchlfs %v0, %v26, %v243104; CHECK-NEXT: lghi %r2, 03105; CHECK-NEXT: locghinhe %r2, 13106; CHECK-NEXT: br %r143107entry:3108 %cmp = icmp uge <4 x i32> %a, %b3109 %0 = bitcast <4 x i1> %cmp to i43110 %1 = icmp ne i4 %0, 03111 ret i1 %13112}3113 3114define zeroext i1 @not_vec_all_ge_vui(<4 x i32> %a, <4 x i32> %b) {3115; CHECK-LABEL: not_vec_all_ge_vui:3116; CHECK: # %bb.0: # %entry3117; CHECK-NEXT: vchlfs %v0, %v26, %v243118; CHECK-NEXT: lghi %r2, 03119; CHECK-NEXT: locghile %r2, 13120; CHECK-NEXT: br %r143121entry:3122 %0 = icmp ult <4 x i32> %a, %b3123 %1 = bitcast <4 x i1> %0 to i43124 %2 = icmp ne i4 %1, 03125 ret i1 %23126}3127 3128define zeroext i1 @not_vec_any_ge_vui(<4 x i32> %a, <4 x i32> %b) {3129; CHECK-LABEL: not_vec_any_ge_vui:3130; CHECK: # %bb.0: # %entry3131; CHECK-NEXT: vchlfs %v0, %v26, %v243132; CHECK-NEXT: lghi %r2, 03133; CHECK-NEXT: locghie %r2, 13134; CHECK-NEXT: br %r143135entry:3136 %cmp = icmp uge <4 x i32> %a, %b3137 %0 = bitcast <4 x i1> %cmp to i43138 %.not = icmp eq i4 %0, 03139 ret i1 %.not3140}3141 3142define zeroext i1 @vec_all_ge_vsl(<2 x i64> %a, <2 x i64> %b) {3143; CHECK-LABEL: vec_all_ge_vsl:3144; CHECK: # %bb.0: # %entry3145; CHECK-NEXT: vchgs %v0, %v26, %v243146; CHECK-NEXT: lghi %r2, 03147; CHECK-NEXT: locghio %r2, 13148; CHECK-NEXT: br %r143149entry:3150 %0 = icmp slt <2 x i64> %a, %b3151 %1 = bitcast <2 x i1> %0 to i23152 %2 = icmp eq i2 %1, 03153 ret i1 %23154}3155 3156define zeroext i1 @vec_any_ge_vsl(<2 x i64> %a, <2 x i64> %b) {3157; CHECK-LABEL: vec_any_ge_vsl:3158; CHECK: # %bb.0: # %entry3159; CHECK-NEXT: vchgs %v0, %v26, %v243160; CHECK-NEXT: lghi %r2, 03161; CHECK-NEXT: locghinhe %r2, 13162; CHECK-NEXT: br %r143163entry:3164 %cmp = icmp sge <2 x i64> %a, %b3165 %0 = bitcast <2 x i1> %cmp to i23166 %1 = icmp ne i2 %0, 03167 ret i1 %13168}3169 3170define zeroext i1 @not_vec_all_ge_vsl(<2 x i64> %a, <2 x i64> %b) {3171; CHECK-LABEL: not_vec_all_ge_vsl:3172; CHECK: # %bb.0: # %entry3173; CHECK-NEXT: vchgs %v0, %v26, %v243174; CHECK-NEXT: lghi %r2, 03175; CHECK-NEXT: locghile %r2, 13176; CHECK-NEXT: br %r143177entry:3178 %0 = icmp slt <2 x i64> %a, %b3179 %1 = bitcast <2 x i1> %0 to i23180 %2 = icmp ne i2 %1, 03181 ret i1 %23182}3183 3184define zeroext i1 @not_vec_any_ge_vsl(<2 x i64> %a, <2 x i64> %b) {3185; CHECK-LABEL: not_vec_any_ge_vsl:3186; CHECK: # %bb.0: # %entry3187; CHECK-NEXT: vchgs %v0, %v26, %v243188; CHECK-NEXT: lghi %r2, 03189; CHECK-NEXT: locghie %r2, 13190; CHECK-NEXT: br %r143191entry:3192 %cmp = icmp sge <2 x i64> %a, %b3193 %0 = bitcast <2 x i1> %cmp to i23194 %.not = icmp eq i2 %0, 03195 ret i1 %.not3196}3197 3198define zeroext i1 @vec_all_ge_vul(<2 x i64> %a, <2 x i64> %b) {3199; CHECK-LABEL: vec_all_ge_vul:3200; CHECK: # %bb.0: # %entry3201; CHECK-NEXT: vchlgs %v0, %v26, %v243202; CHECK-NEXT: lghi %r2, 03203; CHECK-NEXT: locghio %r2, 13204; CHECK-NEXT: br %r143205entry:3206 %0 = icmp ult <2 x i64> %a, %b3207 %1 = bitcast <2 x i1> %0 to i23208 %2 = icmp eq i2 %1, 03209 ret i1 %23210}3211 3212define zeroext i1 @vec_any_ge_vul(<2 x i64> %a, <2 x i64> %b) {3213; CHECK-LABEL: vec_any_ge_vul:3214; CHECK: # %bb.0: # %entry3215; CHECK-NEXT: vchlgs %v0, %v26, %v243216; CHECK-NEXT: lghi %r2, 03217; CHECK-NEXT: locghinhe %r2, 13218; CHECK-NEXT: br %r143219entry:3220 %cmp = icmp uge <2 x i64> %a, %b3221 %0 = bitcast <2 x i1> %cmp to i23222 %1 = icmp ne i2 %0, 03223 ret i1 %13224}3225 3226define zeroext i1 @not_vec_all_ge_vul(<2 x i64> %a, <2 x i64> %b) {3227; CHECK-LABEL: not_vec_all_ge_vul:3228; CHECK: # %bb.0: # %entry3229; CHECK-NEXT: vchlgs %v0, %v26, %v243230; CHECK-NEXT: lghi %r2, 03231; CHECK-NEXT: locghile %r2, 13232; CHECK-NEXT: br %r143233entry:3234 %0 = icmp ult <2 x i64> %a, %b3235 %1 = bitcast <2 x i1> %0 to i23236 %2 = icmp ne i2 %1, 03237 ret i1 %23238}3239 3240define zeroext i1 @not_vec_any_ge_vul(<2 x i64> %a, <2 x i64> %b) {3241; CHECK-LABEL: not_vec_any_ge_vul:3242; CHECK: # %bb.0: # %entry3243; CHECK-NEXT: vchlgs %v0, %v26, %v243244; CHECK-NEXT: lghi %r2, 03245; CHECK-NEXT: locghie %r2, 13246; CHECK-NEXT: br %r143247entry:3248 %cmp = icmp uge <2 x i64> %a, %b3249 %0 = bitcast <2 x i1> %cmp to i23250 %.not = icmp eq i2 %0, 03251 ret i1 %.not3252}3253 3254define zeroext i1 @vec_all_ge_vf(<4 x float> %a, <4 x float> %b) {3255; CHECK-LABEL: vec_all_ge_vf:3256; CHECK: # %bb.0: # %entry3257; CHECK-NEXT: vfchesbs %v0, %v24, %v263258; CHECK-NEXT: lghi %r2, 03259; CHECK-NEXT: locghie %r2, 13260; CHECK-NEXT: br %r143261entry:3262 %0 = fcmp ult <4 x float> %a, %b3263 %1 = bitcast <4 x i1> %0 to i43264 %2 = icmp eq i4 %1, 03265 ret i1 %23266}3267 3268define zeroext i1 @vec_any_ge_vf(<4 x float> %a, <4 x float> %b) {3269; CHECK-LABEL: vec_any_ge_vf:3270; CHECK: # %bb.0: # %entry3271; CHECK-NEXT: vfchesbs %v0, %v24, %v263272; CHECK-NEXT: lghi %r2, 03273; CHECK-NEXT: locghile %r2, 13274; CHECK-NEXT: br %r143275entry:3276 %cmp = fcmp oge <4 x float> %a, %b3277 %0 = bitcast <4 x i1> %cmp to i43278 %1 = icmp ne i4 %0, 03279 ret i1 %13280}3281 3282define zeroext i1 @not_vec_all_ge_vf(<4 x float> %a, <4 x float> %b) {3283; CHECK-LABEL: not_vec_all_ge_vf:3284; CHECK: # %bb.0: # %entry3285; CHECK-NEXT: vfchesbs %v0, %v24, %v263286; CHECK-NEXT: lghi %r2, 03287; CHECK-NEXT: locghinhe %r2, 13288; CHECK-NEXT: br %r143289entry:3290 %0 = fcmp ult <4 x float> %a, %b3291 %1 = bitcast <4 x i1> %0 to i43292 %2 = icmp ne i4 %1, 03293 ret i1 %23294}3295 3296define zeroext i1 @not_vec_any_ge_vf(<4 x float> %a, <4 x float> %b) {3297; CHECK-LABEL: not_vec_any_ge_vf:3298; CHECK: # %bb.0: # %entry3299; CHECK-NEXT: vfchesbs %v0, %v24, %v263300; CHECK-NEXT: lghi %r2, 03301; CHECK-NEXT: locghio %r2, 13302; CHECK-NEXT: br %r143303entry:3304 %cmp = fcmp oge <4 x float> %a, %b3305 %0 = bitcast <4 x i1> %cmp to i43306 %.not = icmp eq i4 %0, 03307 ret i1 %.not3308}3309 3310define zeroext i1 @vec_all_ge_vd(<2 x double> %a, <2 x double> %b) {3311; CHECK-LABEL: vec_all_ge_vd:3312; CHECK: # %bb.0: # %entry3313; CHECK-NEXT: vfchedbs %v0, %v24, %v263314; CHECK-NEXT: lghi %r2, 03315; CHECK-NEXT: locghie %r2, 13316; CHECK-NEXT: br %r143317entry:3318 %0 = fcmp ult <2 x double> %a, %b3319 %1 = bitcast <2 x i1> %0 to i23320 %2 = icmp eq i2 %1, 03321 ret i1 %23322}3323 3324define zeroext i1 @vec_any_ge_vd(<2 x double> %a, <2 x double> %b) {3325; CHECK-LABEL: vec_any_ge_vd:3326; CHECK: # %bb.0: # %entry3327; CHECK-NEXT: vfchedbs %v0, %v24, %v263328; CHECK-NEXT: lghi %r2, 03329; CHECK-NEXT: locghile %r2, 13330; CHECK-NEXT: br %r143331entry:3332 %cmp = fcmp oge <2 x double> %a, %b3333 %0 = bitcast <2 x i1> %cmp to i23334 %1 = icmp ne i2 %0, 03335 ret i1 %13336}3337 3338define zeroext i1 @not_vec_all_ge_vd(<2 x double> %a, <2 x double> %b) {3339; CHECK-LABEL: not_vec_all_ge_vd:3340; CHECK: # %bb.0: # %entry3341; CHECK-NEXT: vfchedbs %v0, %v24, %v263342; CHECK-NEXT: lghi %r2, 03343; CHECK-NEXT: locghinhe %r2, 13344; CHECK-NEXT: br %r143345entry:3346 %0 = fcmp ult <2 x double> %a, %b3347 %1 = bitcast <2 x i1> %0 to i23348 %2 = icmp ne i2 %1, 03349 ret i1 %23350}3351 3352define zeroext i1 @not_vec_any_ge_vd(<2 x double> %a, <2 x double> %b) {3353; CHECK-LABEL: not_vec_any_ge_vd:3354; CHECK: # %bb.0: # %entry3355; CHECK-NEXT: vfchedbs %v0, %v24, %v263356; CHECK-NEXT: lghi %r2, 03357; CHECK-NEXT: locghio %r2, 13358; CHECK-NEXT: br %r143359entry:3360 %cmp = fcmp oge <2 x double> %a, %b3361 %0 = bitcast <2 x i1> %cmp to i23362 %.not = icmp eq i2 %0, 03363 ret i1 %.not3364}3365 3366define zeroext i1 @vec_all_nlt_vf(<4 x float> %a, <4 x float> %b) {3367; CHECK-LABEL: vec_all_nlt_vf:3368; CHECK: # %bb.0: # %entry3369; CHECK-NEXT: vfchsbs %v0, %v26, %v243370; CHECK-NEXT: lghi %r2, 03371; CHECK-NEXT: locghio %r2, 13372; CHECK-NEXT: br %r143373entry:3374 %0 = fcmp olt <4 x float> %a, %b3375 %1 = bitcast <4 x i1> %0 to i43376 %2 = icmp eq i4 %1, 03377 ret i1 %23378}3379 3380define zeroext i1 @vec_any_nlt_vf(<4 x float> %a, <4 x float> %b) {3381; CHECK-LABEL: vec_any_nlt_vf:3382; CHECK: # %bb.0: # %entry3383; CHECK-NEXT: vfchsbs %v0, %v26, %v243384; CHECK-NEXT: lghi %r2, 03385; CHECK-NEXT: locghinhe %r2, 13386; CHECK-NEXT: br %r143387entry:3388 %0 = fcmp uge <4 x float> %a, %b3389 %1 = bitcast <4 x i1> %0 to i43390 %2 = icmp ne i4 %1, 03391 ret i1 %23392}3393 3394define zeroext i1 @not_vec_all_nlt_vf(<4 x float> %a, <4 x float> %b) {3395; CHECK-LABEL: not_vec_all_nlt_vf:3396; CHECK: # %bb.0: # %entry3397; CHECK-NEXT: vfchsbs %v0, %v26, %v243398; CHECK-NEXT: lghi %r2, 03399; CHECK-NEXT: locghile %r2, 13400; CHECK-NEXT: br %r143401entry:3402 %0 = fcmp olt <4 x float> %a, %b3403 %1 = bitcast <4 x i1> %0 to i43404 %2 = icmp ne i4 %1, 03405 ret i1 %23406}3407 3408define zeroext i1 @not_vec_any_nlt_vf(<4 x float> %a, <4 x float> %b) {3409; CHECK-LABEL: not_vec_any_nlt_vf:3410; CHECK: # %bb.0: # %entry3411; CHECK-NEXT: vfchsbs %v0, %v26, %v243412; CHECK-NEXT: lghi %r2, 03413; CHECK-NEXT: locghie %r2, 13414; CHECK-NEXT: br %r143415entry:3416 %0 = fcmp uge <4 x float> %a, %b3417 %1 = bitcast <4 x i1> %0 to i43418 %.not = icmp eq i4 %1, 03419 ret i1 %.not3420}3421 3422define zeroext i1 @vec_all_nlt_vd(<2 x double> %a, <2 x double> %b) {3423; CHECK-LABEL: vec_all_nlt_vd:3424; CHECK: # %bb.0: # %entry3425; CHECK-NEXT: vfchdbs %v0, %v26, %v243426; CHECK-NEXT: lghi %r2, 03427; CHECK-NEXT: locghio %r2, 13428; CHECK-NEXT: br %r143429entry:3430 %0 = fcmp olt <2 x double> %a, %b3431 %1 = bitcast <2 x i1> %0 to i23432 %2 = icmp eq i2 %1, 03433 ret i1 %23434}3435 3436define zeroext i1 @vec_any_nlt_vd(<2 x double> %a, <2 x double> %b) {3437; CHECK-LABEL: vec_any_nlt_vd:3438; CHECK: # %bb.0: # %entry3439; CHECK-NEXT: vfchdbs %v0, %v26, %v243440; CHECK-NEXT: lghi %r2, 03441; CHECK-NEXT: locghinhe %r2, 13442; CHECK-NEXT: br %r143443entry:3444 %0 = fcmp uge <2 x double> %a, %b3445 %1 = bitcast <2 x i1> %0 to i23446 %2 = icmp ne i2 %1, 03447 ret i1 %23448}3449 3450define zeroext i1 @not_vec_all_nlt_vd(<2 x double> %a, <2 x double> %b) {3451; CHECK-LABEL: not_vec_all_nlt_vd:3452; CHECK: # %bb.0: # %entry3453; CHECK-NEXT: vfchdbs %v0, %v26, %v243454; CHECK-NEXT: lghi %r2, 03455; CHECK-NEXT: locghile %r2, 13456; CHECK-NEXT: br %r143457entry:3458 %0 = fcmp olt <2 x double> %a, %b3459 %1 = bitcast <2 x i1> %0 to i23460 %2 = icmp ne i2 %1, 03461 ret i1 %23462}3463 3464define zeroext i1 @not_vec_any_nlt_vd(<2 x double> %a, <2 x double> %b) {3465; CHECK-LABEL: not_vec_any_nlt_vd:3466; CHECK: # %bb.0: # %entry3467; CHECK-NEXT: vfchdbs %v0, %v26, %v243468; CHECK-NEXT: lghi %r2, 03469; CHECK-NEXT: locghie %r2, 13470; CHECK-NEXT: br %r143471entry:3472 %0 = fcmp uge <2 x double> %a, %b3473 %1 = bitcast <2 x i1> %0 to i23474 %.not = icmp eq i2 %1, 03475 ret i1 %.not3476}3477 3478define zeroext i1 @vec_all_nle_vf(<4 x float> %a, <4 x float> %b) {3479; CHECK-LABEL: vec_all_nle_vf:3480; CHECK: # %bb.0: # %entry3481; CHECK-NEXT: vfchesbs %v0, %v26, %v243482; CHECK-NEXT: lghi %r2, 03483; CHECK-NEXT: locghio %r2, 13484; CHECK-NEXT: br %r143485entry:3486 %0 = fcmp ole <4 x float> %a, %b3487 %1 = bitcast <4 x i1> %0 to i43488 %2 = icmp eq i4 %1, 03489 ret i1 %23490}3491 3492define zeroext i1 @vec_any_nle_vf(<4 x float> %a, <4 x float> %b) {3493; CHECK-LABEL: vec_any_nle_vf:3494; CHECK: # %bb.0: # %entry3495; CHECK-NEXT: vfchesbs %v0, %v26, %v243496; CHECK-NEXT: lghi %r2, 03497; CHECK-NEXT: locghinhe %r2, 13498; CHECK-NEXT: br %r143499entry:3500 %0 = fcmp ugt <4 x float> %a, %b3501 %1 = bitcast <4 x i1> %0 to i43502 %2 = icmp ne i4 %1, 03503 ret i1 %23504}3505 3506define zeroext i1 @not_vec_all_nle_vf(<4 x float> %a, <4 x float> %b) {3507; CHECK-LABEL: not_vec_all_nle_vf:3508; CHECK: # %bb.0: # %entry3509; CHECK-NEXT: vfchesbs %v0, %v26, %v243510; CHECK-NEXT: lghi %r2, 03511; CHECK-NEXT: locghile %r2, 13512; CHECK-NEXT: br %r143513entry:3514 %0 = fcmp ole <4 x float> %a, %b3515 %1 = bitcast <4 x i1> %0 to i43516 %2 = icmp ne i4 %1, 03517 ret i1 %23518}3519 3520define zeroext i1 @not_vec_any_nle_vf(<4 x float> %a, <4 x float> %b) {3521; CHECK-LABEL: not_vec_any_nle_vf:3522; CHECK: # %bb.0: # %entry3523; CHECK-NEXT: vfchesbs %v0, %v26, %v243524; CHECK-NEXT: lghi %r2, 03525; CHECK-NEXT: locghie %r2, 13526; CHECK-NEXT: br %r143527entry:3528 %0 = fcmp ugt <4 x float> %a, %b3529 %1 = bitcast <4 x i1> %0 to i43530 %.not = icmp eq i4 %1, 03531 ret i1 %.not3532}3533 3534define zeroext i1 @vec_all_nle_vd(<2 x double> %a, <2 x double> %b) {3535; CHECK-LABEL: vec_all_nle_vd:3536; CHECK: # %bb.0: # %entry3537; CHECK-NEXT: vfchedbs %v0, %v26, %v243538; CHECK-NEXT: lghi %r2, 03539; CHECK-NEXT: locghio %r2, 13540; CHECK-NEXT: br %r143541entry:3542 %0 = fcmp ole <2 x double> %a, %b3543 %1 = bitcast <2 x i1> %0 to i23544 %2 = icmp eq i2 %1, 03545 ret i1 %23546}3547 3548define zeroext i1 @vec_any_nle_vd(<2 x double> %a, <2 x double> %b) {3549; CHECK-LABEL: vec_any_nle_vd:3550; CHECK: # %bb.0: # %entry3551; CHECK-NEXT: vfchedbs %v0, %v26, %v243552; CHECK-NEXT: lghi %r2, 03553; CHECK-NEXT: locghinhe %r2, 13554; CHECK-NEXT: br %r143555entry:3556 %0 = fcmp ugt <2 x double> %a, %b3557 %1 = bitcast <2 x i1> %0 to i23558 %2 = icmp ne i2 %1, 03559 ret i1 %23560}3561 3562define zeroext i1 @not_vec_all_nle_vd(<2 x double> %a, <2 x double> %b) {3563; CHECK-LABEL: not_vec_all_nle_vd:3564; CHECK: # %bb.0: # %entry3565; CHECK-NEXT: vfchedbs %v0, %v26, %v243566; CHECK-NEXT: lghi %r2, 03567; CHECK-NEXT: locghile %r2, 13568; CHECK-NEXT: br %r143569entry:3570 %0 = fcmp ole <2 x double> %a, %b3571 %1 = bitcast <2 x i1> %0 to i23572 %2 = icmp ne i2 %1, 03573 ret i1 %23574}3575 3576define zeroext i1 @not_vec_any_nle_vd(<2 x double> %a, <2 x double> %b) {3577; CHECK-LABEL: not_vec_any_nle_vd:3578; CHECK: # %bb.0: # %entry3579; CHECK-NEXT: vfchedbs %v0, %v26, %v243580; CHECK-NEXT: lghi %r2, 03581; CHECK-NEXT: locghie %r2, 13582; CHECK-NEXT: br %r143583entry:3584 %0 = fcmp ugt <2 x double> %a, %b3585 %1 = bitcast <2 x i1> %0 to i23586 %.not = icmp eq i2 %1, 03587 ret i1 %.not3588}3589 3590define zeroext i1 @vec_all_ngt_vf(<4 x float> %a, <4 x float> %b) {3591; CHECK-LABEL: vec_all_ngt_vf:3592; CHECK: # %bb.0: # %entry3593; CHECK-NEXT: vfchsbs %v0, %v24, %v263594; CHECK-NEXT: lghi %r2, 03595; CHECK-NEXT: locghio %r2, 13596; CHECK-NEXT: br %r143597entry:3598 %0 = fcmp ogt <4 x float> %a, %b3599 %1 = bitcast <4 x i1> %0 to i43600 %2 = icmp eq i4 %1, 03601 ret i1 %23602}3603 3604define zeroext i1 @vec_any_ngt_vf(<4 x float> %a, <4 x float> %b) {3605; CHECK-LABEL: vec_any_ngt_vf:3606; CHECK: # %bb.0: # %entry3607; CHECK-NEXT: vfchsbs %v0, %v24, %v263608; CHECK-NEXT: lghi %r2, 03609; CHECK-NEXT: locghinhe %r2, 13610; CHECK-NEXT: br %r143611entry:3612 %0 = fcmp ule <4 x float> %a, %b3613 %1 = bitcast <4 x i1> %0 to i43614 %2 = icmp ne i4 %1, 03615 ret i1 %23616}3617 3618define zeroext i1 @not_vec_all_ngt_vf(<4 x float> %a, <4 x float> %b) {3619; CHECK-LABEL: not_vec_all_ngt_vf:3620; CHECK: # %bb.0: # %entry3621; CHECK-NEXT: vfchsbs %v0, %v24, %v263622; CHECK-NEXT: lghi %r2, 03623; CHECK-NEXT: locghile %r2, 13624; CHECK-NEXT: br %r143625entry:3626 %0 = fcmp ogt <4 x float> %a, %b3627 %1 = bitcast <4 x i1> %0 to i43628 %2 = icmp ne i4 %1, 03629 ret i1 %23630}3631 3632define zeroext i1 @not_vec_any_ngt_vf(<4 x float> %a, <4 x float> %b) {3633; CHECK-LABEL: not_vec_any_ngt_vf:3634; CHECK: # %bb.0: # %entry3635; CHECK-NEXT: vfchsbs %v0, %v24, %v263636; CHECK-NEXT: lghi %r2, 03637; CHECK-NEXT: locghie %r2, 13638; CHECK-NEXT: br %r143639entry:3640 %0 = fcmp ule <4 x float> %a, %b3641 %1 = bitcast <4 x i1> %0 to i43642 %.not = icmp eq i4 %1, 03643 ret i1 %.not3644}3645 3646define zeroext i1 @vec_all_ngt_vd(<2 x double> %a, <2 x double> %b) {3647; CHECK-LABEL: vec_all_ngt_vd:3648; CHECK: # %bb.0: # %entry3649; CHECK-NEXT: vfchdbs %v0, %v24, %v263650; CHECK-NEXT: lghi %r2, 03651; CHECK-NEXT: locghio %r2, 13652; CHECK-NEXT: br %r143653entry:3654 %0 = fcmp ogt <2 x double> %a, %b3655 %1 = bitcast <2 x i1> %0 to i23656 %2 = icmp eq i2 %1, 03657 ret i1 %23658}3659 3660define zeroext i1 @vec_any_ngt_vd(<2 x double> %a, <2 x double> %b) {3661; CHECK-LABEL: vec_any_ngt_vd:3662; CHECK: # %bb.0: # %entry3663; CHECK-NEXT: vfchdbs %v0, %v24, %v263664; CHECK-NEXT: lghi %r2, 03665; CHECK-NEXT: locghinhe %r2, 13666; CHECK-NEXT: br %r143667entry:3668 %0 = fcmp ule <2 x double> %a, %b3669 %1 = bitcast <2 x i1> %0 to i23670 %2 = icmp ne i2 %1, 03671 ret i1 %23672}3673 3674define zeroext i1 @not_vec_all_ngt_vd(<2 x double> %a, <2 x double> %b) {3675; CHECK-LABEL: not_vec_all_ngt_vd:3676; CHECK: # %bb.0: # %entry3677; CHECK-NEXT: vfchdbs %v0, %v24, %v263678; CHECK-NEXT: lghi %r2, 03679; CHECK-NEXT: locghile %r2, 13680; CHECK-NEXT: br %r143681entry:3682 %0 = fcmp ogt <2 x double> %a, %b3683 %1 = bitcast <2 x i1> %0 to i23684 %2 = icmp ne i2 %1, 03685 ret i1 %23686}3687 3688define zeroext i1 @not_vec_any_ngt_vd(<2 x double> %a, <2 x double> %b) {3689; CHECK-LABEL: not_vec_any_ngt_vd:3690; CHECK: # %bb.0: # %entry3691; CHECK-NEXT: vfchdbs %v0, %v24, %v263692; CHECK-NEXT: lghi %r2, 03693; CHECK-NEXT: locghie %r2, 13694; CHECK-NEXT: br %r143695entry:3696 %0 = fcmp ule <2 x double> %a, %b3697 %1 = bitcast <2 x i1> %0 to i23698 %.not = icmp eq i2 %1, 03699 ret i1 %.not3700}3701 3702define zeroext i1 @vec_all_nge_vf(<4 x float> %a, <4 x float> %b) {3703; CHECK-LABEL: vec_all_nge_vf:3704; CHECK: # %bb.0: # %entry3705; CHECK-NEXT: vfchesbs %v0, %v24, %v263706; CHECK-NEXT: lghi %r2, 03707; CHECK-NEXT: locghio %r2, 13708; CHECK-NEXT: br %r143709entry:3710 %0 = fcmp oge <4 x float> %a, %b3711 %1 = bitcast <4 x i1> %0 to i43712 %2 = icmp eq i4 %1, 03713 ret i1 %23714}3715 3716define zeroext i1 @vec_any_nge_vf(<4 x float> %a, <4 x float> %b) {3717; CHECK-LABEL: vec_any_nge_vf:3718; CHECK: # %bb.0: # %entry3719; CHECK-NEXT: vfchesbs %v0, %v24, %v263720; CHECK-NEXT: lghi %r2, 03721; CHECK-NEXT: locghinhe %r2, 13722; CHECK-NEXT: br %r143723entry:3724 %0 = fcmp ult <4 x float> %a, %b3725 %1 = bitcast <4 x i1> %0 to i43726 %2 = icmp ne i4 %1, 03727 ret i1 %23728}3729 3730define zeroext i1 @not_vec_all_nge_vf(<4 x float> %a, <4 x float> %b) {3731; CHECK-LABEL: not_vec_all_nge_vf:3732; CHECK: # %bb.0: # %entry3733; CHECK-NEXT: vfchesbs %v0, %v24, %v263734; CHECK-NEXT: lghi %r2, 03735; CHECK-NEXT: locghile %r2, 13736; CHECK-NEXT: br %r143737entry:3738 %0 = fcmp oge <4 x float> %a, %b3739 %1 = bitcast <4 x i1> %0 to i43740 %2 = icmp ne i4 %1, 03741 ret i1 %23742}3743 3744define zeroext i1 @not_vec_any_nge_vf(<4 x float> %a, <4 x float> %b) {3745; CHECK-LABEL: not_vec_any_nge_vf:3746; CHECK: # %bb.0: # %entry3747; CHECK-NEXT: vfchesbs %v0, %v24, %v263748; CHECK-NEXT: lghi %r2, 03749; CHECK-NEXT: locghie %r2, 13750; CHECK-NEXT: br %r143751entry:3752 %0 = fcmp ult <4 x float> %a, %b3753 %1 = bitcast <4 x i1> %0 to i43754 %.not = icmp eq i4 %1, 03755 ret i1 %.not3756}3757 3758define zeroext i1 @vec_all_nge_vd(<2 x double> %a, <2 x double> %b) {3759; CHECK-LABEL: vec_all_nge_vd:3760; CHECK: # %bb.0: # %entry3761; CHECK-NEXT: vfchedbs %v0, %v24, %v263762; CHECK-NEXT: lghi %r2, 03763; CHECK-NEXT: locghio %r2, 13764; CHECK-NEXT: br %r143765entry:3766 %0 = fcmp oge <2 x double> %a, %b3767 %1 = bitcast <2 x i1> %0 to i23768 %2 = icmp eq i2 %1, 03769 ret i1 %23770}3771 3772define zeroext i1 @vec_any_nge_vd(<2 x double> %a, <2 x double> %b) {3773; CHECK-LABEL: vec_any_nge_vd:3774; CHECK: # %bb.0: # %entry3775; CHECK-NEXT: vfchedbs %v0, %v24, %v263776; CHECK-NEXT: lghi %r2, 03777; CHECK-NEXT: locghinhe %r2, 13778; CHECK-NEXT: br %r143779entry:3780 %0 = fcmp ult <2 x double> %a, %b3781 %1 = bitcast <2 x i1> %0 to i23782 %2 = icmp ne i2 %1, 03783 ret i1 %23784}3785 3786define zeroext i1 @not_vec_all_nge_vd(<2 x double> %a, <2 x double> %b) {3787; CHECK-LABEL: not_vec_all_nge_vd:3788; CHECK: # %bb.0: # %entry3789; CHECK-NEXT: vfchedbs %v0, %v24, %v263790; CHECK-NEXT: lghi %r2, 03791; CHECK-NEXT: locghile %r2, 13792; CHECK-NEXT: br %r143793entry:3794 %0 = fcmp oge <2 x double> %a, %b3795 %1 = bitcast <2 x i1> %0 to i23796 %2 = icmp ne i2 %1, 03797 ret i1 %23798}3799 3800define zeroext i1 @not_vec_any_nge_vd(<2 x double> %a, <2 x double> %b) {3801; CHECK-LABEL: not_vec_any_nge_vd:3802; CHECK: # %bb.0: # %entry3803; CHECK-NEXT: vfchedbs %v0, %v24, %v263804; CHECK-NEXT: lghi %r2, 03805; CHECK-NEXT: locghie %r2, 13806; CHECK-NEXT: br %r143807entry:3808 %0 = fcmp ult <2 x double> %a, %b3809 %1 = bitcast <2 x i1> %0 to i23810 %.not = icmp eq i2 %1, 03811 ret i1 %.not3812}3813