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1; Test vector arithmetic shift right with vector shift amount.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s4 5; Test a v16i8 shift.6define <16 x i8> @f1(<16 x i8> %dummy, <16 x i8> %val1, <16 x i8> %val2) {7; CHECK-LABEL: f1:8; CHECK: vesravb %v24, %v26, %v289; CHECK: br %r1410 %ret = ashr <16 x i8> %val1, %val211 ret <16 x i8> %ret12}13 14; Test a v8i16 shift.15define <8 x i16> @f2(<8 x i16> %dummy, <8 x i16> %val1, <8 x i16> %val2) {16; CHECK-LABEL: f2:17; CHECK: vesravh %v24, %v26, %v2818; CHECK: br %r1419 %ret = ashr <8 x i16> %val1, %val220 ret <8 x i16> %ret21}22 23; Test a v4i32 shift.24define <4 x i32> @f3(<4 x i32> %dummy, <4 x i32> %val1, <4 x i32> %val2) {25; CHECK-LABEL: f3:26; CHECK: vesravf %v24, %v26, %v2827; CHECK: br %r1428 %ret = ashr <4 x i32> %val1, %val229 ret <4 x i32> %ret30}31 32; Test a v2i64 shift.33define <2 x i64> @f4(<2 x i64> %dummy, <2 x i64> %val1, <2 x i64> %val2) {34; CHECK-LABEL: f4:35; CHECK: vesravg %v24, %v26, %v2836; CHECK: br %r1437 %ret = ashr <2 x i64> %val1, %val238 ret <2 x i64> %ret39}40