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1; Test strict vector division on z14.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s4 5declare float @llvm.experimental.constrained.fdiv.f32(float, float, metadata, metadata)6declare <4 x float> @llvm.experimental.constrained.fdiv.v4f32(<4 x float>, <4 x float>, metadata, metadata)7 8; Test a v4f32 division.9define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1,10 <4 x float> %val2) #0 {11; CHECK-LABEL: f1:12; CHECK: vfdsb %v24, %v26, %v2813; CHECK: br %r1414 %ret = call <4 x float> @llvm.experimental.constrained.fdiv.v4f32(15 <4 x float> %val1, <4 x float> %val2,16 metadata !"round.dynamic",17 metadata !"fpexcept.strict") #018 ret <4 x float> %ret19}20 21; Test an f32 division that uses vector registers.22define float @f2(<4 x float> %val1, <4 x float> %val2) #0 {23; CHECK-LABEL: f2:24; CHECK: wfdsb %f0, %v24, %v2625; CHECK: br %r1426 %scalar1 = extractelement <4 x float> %val1, i32 027 %scalar2 = extractelement <4 x float> %val2, i32 028 %ret = call float @llvm.experimental.constrained.fdiv.f32(29 float %scalar1, float %scalar2,30 metadata !"round.dynamic",31 metadata !"fpexcept.strict") #032 ret float %ret33}34 35attributes #0 = { strictfp }36