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1; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -mcpu=cortex-m0 -verify-machineinstrs | FileCheck --check-prefix CHECK-T1 %s2; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -mcpu=cortex-m3 -verify-machineinstrs | FileCheck --check-prefix CHECK-T2 %s3 4; CHECK-T1-LABEL: @mov_and_add5; CHECK-T2-LABEL: @mov_and_add6; CHECK-T1: movs r0, #2557; CHECK-T1: adds r0, #128; CHECK-T2: movw r0, #2679define i32 @mov_and_add() {10 ret i32 26711}12 13; CHECK-T1-LABEL: @mov_and_add214; CHECK-T2-LABEL: @mov_and_add215; CHECK-T1: ldr r0,16; CHECK-T2: movw r0, #51117define i32 @mov_and_add2() {18 ret i32 51119}20 21; CHECK-T1-LABEL: @test6422; CHECK-T2-LABEL: @test6423; CHECK-T1: movs r4, #024; CHECK-T1: mvns r5, r425; CHECK-T1: mov r0, r526; CHECK-T1: subs r0, #1527; CHECK-T2: subs.w r0, r{{[0-9]+}}, #1528; CHECK-T2-NEXT: sbc r1, r{{[0-9]+}}, #029define i32 @test64() {30entry:31 tail call void @fn1(i64 -1)32 tail call void @fn1(i64 -1)33 tail call void @fn1(i64 -16)34 ret i32 035}36declare void @fn1(i64) ;37