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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple thumbv8m.base-none-eabi -run-pass=peephole-opt -verify-machineinstrs -o - %s | FileCheck %s3--- |4 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"5 target triple = "thumbv8m.base-none-none-eabi"6 7 define i32 @test_subrr(i32 %a, i32 %b) { ret i32 %a }8 define i32 @test_subrr_c(i32 %a, i32 %b) { ret i32 %a }9 define i32 @test_subri3(i32 %a) { ret i32 %a }10 define i32 @test_subri8(i32 %a) { ret i32 %a }11 define i32 @test_addrr(i32 %a) { ret i32 %a }12 define i32 @test_addri3(i32 %a) { ret i32 %a }13 define i32 @test_addri8(i32 %a) { ret i32 %a }14 15...16---17name: test_subrr18liveins:19 - { reg: '$r0', virtual-reg: '%1' }20 - { reg: '$r1', virtual-reg: '%2' }21body: |22 ; CHECK-LABEL: name: test_subrr23 ; CHECK: bb.0:24 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)25 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r126 ; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r027 ; CHECK: %2:tgpr, $cpsr = tSUBrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg28 ; CHECK: tBcc %bb.2, 8 /* CC::hi */, $cpsr29 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg30 ; CHECK: bb.1:31 ; CHECK: $r0 = COPY %232 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r033 ; CHECK: bb.2:34 ; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg35 ; CHECK: $r0 = COPY %336 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r037 bb.0:38 successors: %bb.2(0x40000000), %bb.1(0x40000000)39 liveins: $r0, $r140 41 %2:tgpr = COPY $r142 %1:tgpr = COPY $r043 %0:tgpr, $cpsr = tSUBrr %2, %1, 14, $noreg44 tCMPr %1, %2, 14, $noreg, implicit-def $cpsr45 tBcc %bb.2, 3, $cpsr46 tB %bb.1, 14, $noreg47 48 bb.1:49 $r0 = COPY %050 tBX_RET 14, $noreg, implicit $r051 52 bb.2:53 %3:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg54 $r0 = COPY %355 tBX_RET 14, $noreg, implicit $r056 57...58---59name: test_subrr_c60liveins:61 - { reg: '$r0', virtual-reg: '%1' }62 - { reg: '$r1', virtual-reg: '%2' }63body: |64 ; CHECK-LABEL: name: test_subrr_c65 ; CHECK: bb.0:66 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)67 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r168 ; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r069 ; CHECK: %2:tgpr, $cpsr = tSUBrr [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg70 ; CHECK: tBcc %bb.2, 3 /* CC::lo */, $cpsr71 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg72 ; CHECK: bb.1:73 ; CHECK: $r0 = COPY %274 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r075 ; CHECK: bb.2:76 ; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg77 ; CHECK: $r0 = COPY %378 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r079 bb.0:80 successors: %bb.2(0x40000000), %bb.1(0x40000000)81 liveins: $r0, $r182 83 %2:tgpr = COPY $r184 %1:tgpr = COPY $r085 %0:tgpr, $cpsr = tSUBrr %1, %2, 14, $noreg86 tCMPr %1, %2, 14, $noreg, implicit-def $cpsr87 tBcc %bb.2, 3, $cpsr88 tB %bb.1, 14, $noreg89 90 bb.1:91 $r0 = COPY %092 tBX_RET 14, $noreg, implicit $r093 94 bb.2:95 %3:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg96 $r0 = COPY %397 tBX_RET 14, $noreg, implicit $r098 99...100---101name: test_subri3102liveins:103 - { reg: '$r0', virtual-reg: '%1' }104body: |105 ; CHECK-LABEL: name: test_subri3106 ; CHECK: bb.0:107 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)108 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0109 ; CHECK: %1:tgpr, $cpsr = tSUBi3 [[COPY]], 1, 14 /* CC::al */, $noreg110 ; CHECK: tBcc %bb.2, 3 /* CC::lo */, $cpsr111 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg112 ; CHECK: bb.1:113 ; CHECK: $r0 = COPY %1114 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0115 ; CHECK: bb.2:116 ; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg117 ; CHECK: $r0 = COPY %2118 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0119 bb.0:120 successors: %bb.2(0x40000000), %bb.1(0x40000000)121 liveins: $r0122 123 %1:tgpr = COPY $r0124 %0:tgpr, $cpsr = tSUBi3 %1, 1, 14, $noreg125 tCMPi8 %1, 1, 14, $noreg, implicit-def $cpsr126 tBcc %bb.2, 3, $cpsr127 tB %bb.1, 14, $noreg128 129 bb.1:130 $r0 = COPY %0131 tBX_RET 14, $noreg, implicit $r0132 133 bb.2:134 %2:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg135 $r0 = COPY %2136 tBX_RET 14, $noreg, implicit $r0137 138...139---140name: test_subri8141liveins:142 - { reg: '$r0', virtual-reg: '%1' }143body: |144 ; CHECK-LABEL: name: test_subri8145 ; CHECK: bb.0:146 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)147 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0148 ; CHECK: %1:tgpr, $cpsr = tSUBi8 [[COPY]], 1, 14 /* CC::al */, $noreg149 ; CHECK: tBcc %bb.2, 3 /* CC::lo */, $cpsr150 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg151 ; CHECK: bb.1:152 ; CHECK: $r0 = COPY %1153 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0154 ; CHECK: bb.2:155 ; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg156 ; CHECK: $r0 = COPY %2157 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0158 bb.0:159 successors: %bb.2(0x40000000), %bb.1(0x40000000)160 liveins: $r0161 162 %1:tgpr = COPY $r0163 %0:tgpr, $cpsr = tSUBi8 %1, 1, 14, $noreg164 tCMPi8 %1, 1, 14, $noreg, implicit-def $cpsr165 tBcc %bb.2, 3, $cpsr166 tB %bb.1, 14, $noreg167 168 bb.1:169 $r0 = COPY %0170 tBX_RET 14, $noreg, implicit $r0171 172 bb.2:173 %2:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg174 $r0 = COPY %2175 tBX_RET 14, $noreg, implicit $r0176 177...178---179name: test_addrr180liveins:181 - { reg: '$r0', virtual-reg: '%1' }182 - { reg: '$r1', virtual-reg: '%2' }183body: |184 ; CHECK-LABEL: name: test_addrr185 ; CHECK: bb.0:186 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)187 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1188 ; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0189 ; CHECK: %2:tgpr, $cpsr = tADDrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg190 ; CHECK: tBcc %bb.2, 2 /* CC::hs */, $cpsr191 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg192 ; CHECK: bb.1:193 ; CHECK: $r0 = COPY %2194 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0195 ; CHECK: bb.2:196 ; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg197 ; CHECK: $r0 = COPY %3198 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0199 bb.0:200 successors: %bb.2(0x40000000), %bb.1(0x40000000)201 liveins: $r0, $r1202 203 %2:tgpr = COPY $r1204 %1:tgpr = COPY $r0205 %0:tgpr, $cpsr = tADDrr %2, %1, 14, $noreg206 tCMPr %0, %2, 14, $noreg, implicit-def $cpsr207 tBcc %bb.2, 3, $cpsr208 tB %bb.1, 14, $noreg209 210 bb.1:211 $r0 = COPY %0212 tBX_RET 14, $noreg, implicit $r0213 214 bb.2:215 %3:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg216 $r0 = COPY %3217 tBX_RET 14, $noreg, implicit $r0218 219...220---221name: test_addri3222liveins:223 - { reg: '$r0', virtual-reg: '%1' }224body: |225 ; CHECK-LABEL: name: test_addri3226 ; CHECK: bb.0:227 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)228 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0229 ; CHECK: %0:tgpr, $cpsr = tADDi3 [[COPY]], 1, 14 /* CC::al */, $noreg230 ; CHECK: tBcc %bb.2, 2 /* CC::hs */, $cpsr231 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg232 ; CHECK: bb.1:233 ; CHECK: $r0 = COPY [[COPY]]234 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0235 ; CHECK: bb.2:236 ; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg237 ; CHECK: $r0 = COPY %2238 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0239 bb.0:240 successors: %bb.2(0x40000000), %bb.1(0x40000000)241 liveins: $r0242 243 %0:tgpr = COPY $r0244 %1:tgpr, $cpsr = tADDi3 %0, 1, 14, $noreg245 tCMPr %1, %0, 14, $noreg, implicit-def $cpsr246 tBcc %bb.2, 3, $cpsr247 tB %bb.1, 14, $noreg248 249 bb.1:250 $r0 = COPY %0251 tBX_RET 14, $noreg, implicit $r0252 253 bb.2:254 %2:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg255 $r0 = COPY %2256 tBX_RET 14, $noreg, implicit $r0257 258...259---260name: test_addri8261liveins:262 - { reg: '$r0', virtual-reg: '%1' }263body: |264 ; CHECK-LABEL: name: test_addri8265 ; CHECK: bb.0:266 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)267 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0268 ; CHECK: %0:tgpr, $cpsr = tADDi8 [[COPY]], 10, 14 /* CC::al */, $noreg269 ; CHECK: tBcc %bb.2, 2 /* CC::hs */, $cpsr270 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg271 ; CHECK: bb.1:272 ; CHECK: $r0 = COPY [[COPY]]273 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0274 ; CHECK: bb.2:275 ; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg276 ; CHECK: $r0 = COPY %2277 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0278 bb.0:279 successors: %bb.2(0x40000000), %bb.1(0x40000000)280 liveins: $r0281 282 %0:tgpr = COPY $r0283 %1:tgpr, $cpsr = tADDi8 %0, 10, 14, $noreg284 tCMPr %1, %0, 14, $noreg, implicit-def $cpsr285 tBcc %bb.2, 3, $cpsr286 tB %bb.1, 14, $noreg287 288 bb.1:289 $r0 = COPY %0290 tBX_RET 14, $noreg, implicit $r0291 292 bb.2:293 %2:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg294 $r0 = COPY %2295 tBX_RET 14, $noreg, implicit $r0296 297...298