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1# RUN: llc -run-pass arm-cp-islands %s -o - | FileCheck %s2 3--- |4 ; ModuleID = '<stdin>'5 source_filename = "<stdin>"6 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"7 target triple = "thumbv6m--none-eabi"8 9 declare void @exit0()10 11 declare void @exit1(i32)12 13 declare void @exit2()14 15 declare void @exit3()16 17 declare void @exit4()18 19 define void @jump_table(i32 %val, i32 %arg2, i32 %arg3, i32 %arg4) {20 entry:21 switch i32 %val, label %default [22 i32 1, label %lab123 i32 2, label %lab224 i32 3, label %lab325 i32 4, label %lab426 ]27 28 default: ; preds = %entry29 tail call void @exit0()30 ret void31 32 lab1: ; preds = %entry33 %b = sub i32 %val, 134 %a = shl i32 %b, 235 tail call void @exit1(i32 %a)36 ret void37 38 lab2: ; preds = %entry39 tail call void @exit2()40 ret void41 42 lab3: ; preds = %entry43 tail call void @exit3()44 ret void45 46 lab4: ; preds = %entry47 tail call void @exit4()48 ret void49 }50 51 ; Function Attrs: nounwind52 declare void @llvm.stackprotector(ptr, ptr) #053 54 attributes #0 = { nounwind }55 56...57---58name: jump_table59alignment: 260exposesReturnsTwice: false61legalized: false62regBankSelected: false63selected: false64tracksRegLiveness: true65liveins:66 - { reg: '$r0' }67calleeSavedRegisters: [ '$lr', '$d8', '$d9', '$d10', '$d11', '$d12', '$d13',68 '$d14', '$d15', '$q4', '$q5', '$q6', '$q7', '$r4',69 '$r5', '$r6', '$r7', '$r8', '$r9', '$r10', '$r11',70 '$s16', '$s17', '$s18', '$s19', '$s20', '$s21',71 '$s22', '$s23', '$s24', '$s25', '$s26', '$s27',72 '$s28', '$s29', '$s30', '$s31', '$d8_d10', '$d9_d11',73 '$d10_d12', '$d11_d13', '$d12_d14', '$d13_d15',74 '$q4_q5', '$q5_q6', '$q6_q7', '$q4_q5_q6_q7', '$r4_r5',75 '$r6_r7', '$r8_r9', '$r10_r11', '$d8_d9_d10', '$d9_d10_d11',76 '$d10_d11_d12', '$d11_d12_d13', '$d12_d13_d14',77 '$d13_d14_d15', '$d8_d10_d12', '$d9_d11_d13', '$d10_d12_d14',78 '$d11_d13_d15', '$d8_d10_d12_d14', '$d9_d11_d13_d15',79 '$d9_d10', '$d11_d12', '$d13_d14', '$d9_d10_d11_d12',80 '$d11_d12_d13_d14' ]81frameInfo:82 isFrameAddressTaken: false83 isReturnAddressTaken: false84 hasStackMap: false85 hasPatchPoint: false86 stackSize: 887 offsetAdjustment: 088 maxAlignment: 489 adjustsStack: true90 hasCalls: true91 maxCallFrameSize: 092 hasOpaqueSPAdjustment: false93 hasVAStart: false94 hasMustTailInVarArgFunc: false95stack:96 - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '$lr', callee-saved-restored: false }97 - { id: 1, type: spill-slot, offset: -8, size: 4, alignment: 4, callee-saved-register: '$r7' }98jumpTable:99 kind: inline100 entries:101 - id: 0102 blocks: [ '%bb.3.lab1', '%bb.4.lab2', '%bb.5.lab3', '%bb.6.lab4' ]103# r1 is redefined in the middle of the recognizable jump sequence - it shouldn't be clobbered!104# CHECK-NOT: tTBB_JT105 106body: |107 bb.0.entry:108 successors: %bb.2.default(0x19999998), %bb.1.entry(0x66666668)109 liveins: $r0, $r7, $lr110 111 frame-setup tPUSH 14, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp112 frame-setup CFI_INSTRUCTION def_cfa_offset 8113 frame-setup CFI_INSTRUCTION offset $lr, -4114 frame-setup CFI_INSTRUCTION offset $r7, -8115 $r1, dead $cpsr = tSUBi3 $r0, 1, 14, $noreg116 tCMPi8 $r1, 3, 14, $noreg, implicit-def $cpsr117 tBcc %bb.2.default, 8, killed $cpsr118 119 bb.1.entry:120 successors: %bb.3.lab1(0x20000000), %bb.4.lab2(0x20000000), %bb.5.lab3(0x20000000), %bb.6.lab4(0x20000000)121 liveins: $r0, $r1122 123 $r1, dead $cpsr = tLSLri killed $r1, 2, 14, $noreg124 $r2 = tLEApcrelJT %jump-table.0, 14, $noreg125 $r2 = tLDRr killed $r1, killed $r2, 14, $noreg :: (load (s32) from jump-table)126 $r1, dead $cpsr = tLSLri $r2, 2, 14, $noreg127 tBR_JTr killed $r2, %jump-table.0128 129 bb.2.default:130 tBL 14, $noreg, @exit0, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp131 tPOP_RET 14, $noreg, def $r7, def $pc, implicit-def $sp, implicit $sp132 133 bb.3.lab1:134 liveins: $r0,$r1135 136 tBL 14, $noreg, @exit1, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp137 tPOP_RET 14, $noreg, def $r7, def $pc, implicit-def $sp, implicit $sp138 139 bb.4.lab2:140 tBL 14, $noreg, @exit2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp141 tPOP_RET 14, $noreg, def $r7, def $pc, implicit-def $sp, implicit $sp142 143 bb.5.lab3:144 tBL 14, $noreg, @exit3, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp145 tPOP_RET 14, $noreg, def $r7, def $pc, implicit-def $sp, implicit $sp146 147 bb.6.lab4:148 tBL 14, $noreg, @exit4, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp149 tPOP_RET 14, $noreg, def $r7, def $pc, implicit-def $sp, implicit $sp150 151...152