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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc %s -o - -enable-shrink-wrap=true -ifcvt-fn-start=1 -ifcvt-fn-stop=0 -tail-dup-placement=0 -mtriple=thumb-macho | FileCheck %s --check-prefix=ENABLE-V4T3; RUN: llc %s -o - -enable-shrink-wrap=true -ifcvt-fn-start=1 -ifcvt-fn-stop=0 -tail-dup-placement=0 -mtriple=thumbv5-macho | FileCheck %s --check-prefix=ENABLE-V5T4; RUN: llc %s -o - -enable-shrink-wrap=false -ifcvt-fn-start=1 -ifcvt-fn-stop=0 -tail-dup-placement=0 -mtriple=thumb-macho | FileCheck %s --check-prefix=DISABLE-V4T5; RUN: llc %s -o - -enable-shrink-wrap=false -ifcvt-fn-start=1 -ifcvt-fn-stop=0 -tail-dup-placement=0 -mtriple=thumbv5-macho | FileCheck %s --check-prefix=DISABLE-V5T6 7;8; Note: Lots of tests use inline asm instead of regular calls.9; This allows to have a better control on what the allocation will do.10; Otherwise, we may have spill right in the entry block, defeating11; shrink-wrapping. Moreover, some of the inline asm statements (nop)12; are here to ensure that the related paths do not end up as critical13; edges.14; Also disable the late if-converter as it makes harder to reason on15; the diffs.16; Disable tail-duplication during placement, as v4t vs v5t get different17; results due to branches not being analyzable under v518 19; Initial motivating example: Simple diamond with a call just on one side.20define i32 @foo(i32 %a, i32 %b) {21; ENABLE-V4T-LABEL: foo:22; ENABLE-V4T: @ %bb.0:23; ENABLE-V4T-NEXT: cmp r0, r124; ENABLE-V4T-NEXT: bge LBB0_225; ENABLE-V4T-NEXT: @ %bb.1: @ %true26; ENABLE-V4T-NEXT: push {r7, lr}27; ENABLE-V4T-NEXT: .cfi_def_cfa_offset 828; ENABLE-V4T-NEXT: .cfi_offset lr, -429; ENABLE-V4T-NEXT: .cfi_offset r7, -830; ENABLE-V4T-NEXT: sub sp, #831; ENABLE-V4T-NEXT: .cfi_def_cfa_offset 1632; ENABLE-V4T-NEXT: str r0, [sp, #4]33; ENABLE-V4T-NEXT: ldr r0, LCPI0_034; ENABLE-V4T-NEXT: LPC0_0:35; ENABLE-V4T-NEXT: add r0, pc36; ENABLE-V4T-NEXT: ldr r2, [r0]37; ENABLE-V4T-NEXT: movs r0, #038; ENABLE-V4T-NEXT: add r1, sp, #439; ENABLE-V4T-NEXT: bl Ltmp040; ENABLE-V4T-NEXT: add sp, #841; ENABLE-V4T-NEXT: pop {r7}42; ENABLE-V4T-NEXT: pop {r1}43; ENABLE-V4T-NEXT: mov lr, r144; ENABLE-V4T-NEXT: LBB0_2: @ %false45; ENABLE-V4T-NEXT: bx lr46; ENABLE-V4T-NEXT: .p2align 247; ENABLE-V4T-NEXT: @ %bb.3:48; ENABLE-V4T-NEXT: .data_region49; ENABLE-V4T-NEXT: LCPI0_0:50; ENABLE-V4T-NEXT: .long L_doSomething$non_lazy_ptr-(LPC0_0+4)51; ENABLE-V4T-NEXT: .end_data_region52;53; ENABLE-V5T-LABEL: foo:54; ENABLE-V5T: @ %bb.0:55; ENABLE-V5T-NEXT: cmp r0, r156; ENABLE-V5T-NEXT: bge LBB0_257; ENABLE-V5T-NEXT: @ %bb.1: @ %true58; ENABLE-V5T-NEXT: push {r7, lr}59; ENABLE-V5T-NEXT: .cfi_def_cfa_offset 860; ENABLE-V5T-NEXT: .cfi_offset lr, -461; ENABLE-V5T-NEXT: .cfi_offset r7, -862; ENABLE-V5T-NEXT: sub sp, #863; ENABLE-V5T-NEXT: .cfi_def_cfa_offset 1664; ENABLE-V5T-NEXT: str r0, [sp, #4]65; ENABLE-V5T-NEXT: movs r0, #066; ENABLE-V5T-NEXT: add r1, sp, #467; ENABLE-V5T-NEXT: bl _doSomething68; ENABLE-V5T-NEXT: add sp, #869; ENABLE-V5T-NEXT: pop {r7, pc}70; ENABLE-V5T-NEXT: LBB0_2: @ %false71; ENABLE-V5T-NEXT: bx lr72;73; DISABLE-V4T-LABEL: foo:74; DISABLE-V4T: @ %bb.0:75; DISABLE-V4T-NEXT: push {r7, lr}76; DISABLE-V4T-NEXT: .cfi_def_cfa_offset 877; DISABLE-V4T-NEXT: .cfi_offset lr, -478; DISABLE-V4T-NEXT: .cfi_offset r7, -879; DISABLE-V4T-NEXT: sub sp, #880; DISABLE-V4T-NEXT: .cfi_def_cfa_offset 1681; DISABLE-V4T-NEXT: cmp r0, r182; DISABLE-V4T-NEXT: bge LBB0_283; DISABLE-V4T-NEXT: @ %bb.1: @ %true84; DISABLE-V4T-NEXT: str r0, [sp, #4]85; DISABLE-V4T-NEXT: ldr r0, LCPI0_086; DISABLE-V4T-NEXT: LPC0_0:87; DISABLE-V4T-NEXT: add r0, pc88; DISABLE-V4T-NEXT: ldr r2, [r0]89; DISABLE-V4T-NEXT: movs r0, #090; DISABLE-V4T-NEXT: add r1, sp, #491; DISABLE-V4T-NEXT: bl Ltmp092; DISABLE-V4T-NEXT: LBB0_2: @ %false93; DISABLE-V4T-NEXT: add sp, #894; DISABLE-V4T-NEXT: pop {r7}95; DISABLE-V4T-NEXT: pop {r1}96; DISABLE-V4T-NEXT: bx r197; DISABLE-V4T-NEXT: .p2align 298; DISABLE-V4T-NEXT: @ %bb.3:99; DISABLE-V4T-NEXT: .data_region100; DISABLE-V4T-NEXT: LCPI0_0:101; DISABLE-V4T-NEXT: .long L_doSomething$non_lazy_ptr-(LPC0_0+4)102; DISABLE-V4T-NEXT: .end_data_region103;104; DISABLE-V5T-LABEL: foo:105; DISABLE-V5T: @ %bb.0:106; DISABLE-V5T-NEXT: push {r7, lr}107; DISABLE-V5T-NEXT: .cfi_def_cfa_offset 8108; DISABLE-V5T-NEXT: .cfi_offset lr, -4109; DISABLE-V5T-NEXT: .cfi_offset r7, -8110; DISABLE-V5T-NEXT: sub sp, #8111; DISABLE-V5T-NEXT: .cfi_def_cfa_offset 16112; DISABLE-V5T-NEXT: cmp r0, r1113; DISABLE-V5T-NEXT: bge LBB0_2114; DISABLE-V5T-NEXT: @ %bb.1: @ %true115; DISABLE-V5T-NEXT: str r0, [sp, #4]116; DISABLE-V5T-NEXT: movs r0, #0117; DISABLE-V5T-NEXT: add r1, sp, #4118; DISABLE-V5T-NEXT: bl _doSomething119; DISABLE-V5T-NEXT: LBB0_2: @ %false120; DISABLE-V5T-NEXT: add sp, #8121; DISABLE-V5T-NEXT: pop {r7, pc}122 %tmp = alloca i32, align 4123 %tmp2 = icmp slt i32 %a, %b124 br i1 %tmp2, label %true, label %false125 126true:127 store i32 %a, ptr %tmp, align 4128 %tmp4 = call i32 @doSomething(i32 0, ptr %tmp)129 br label %false130 131false:132 %tmp.0 = phi i32 [ %tmp4, %true ], [ %a, %0 ]133 ret i32 %tmp.0134}135 136 137; Same, but the final BB is non-trivial, so we don't duplicate the return inst.138define i32 @bar(i32 %a, i32 %b) {139; ENABLE-V4T-LABEL: bar:140; ENABLE-V4T: @ %bb.0:141; ENABLE-V4T-NEXT: cmp r0, r1142; ENABLE-V4T-NEXT: bge LBB1_2143; ENABLE-V4T-NEXT: @ %bb.1: @ %true144; ENABLE-V4T-NEXT: push {r7, lr}145; ENABLE-V4T-NEXT: .cfi_def_cfa_offset 8146; ENABLE-V4T-NEXT: .cfi_offset lr, -4147; ENABLE-V4T-NEXT: .cfi_offset r7, -8148; ENABLE-V4T-NEXT: sub sp, #8149; ENABLE-V4T-NEXT: .cfi_def_cfa_offset 16150; ENABLE-V4T-NEXT: str r0, [sp, #4]151; ENABLE-V4T-NEXT: ldr r0, LCPI1_0152; ENABLE-V4T-NEXT: LPC1_0:153; ENABLE-V4T-NEXT: add r0, pc154; ENABLE-V4T-NEXT: ldr r2, [r0]155; ENABLE-V4T-NEXT: movs r0, #0156; ENABLE-V4T-NEXT: add r1, sp, #4157; ENABLE-V4T-NEXT: bl Ltmp1158; ENABLE-V4T-NEXT: add sp, #8159; ENABLE-V4T-NEXT: pop {r7}160; ENABLE-V4T-NEXT: pop {r0}161; ENABLE-V4T-NEXT: mov lr, r0162; ENABLE-V4T-NEXT: LBB1_2: @ %false163; ENABLE-V4T-NEXT: movs r0, #42164; ENABLE-V4T-NEXT: bx lr165; ENABLE-V4T-NEXT: .p2align 2166; ENABLE-V4T-NEXT: @ %bb.3:167; ENABLE-V4T-NEXT: .data_region168; ENABLE-V4T-NEXT: LCPI1_0:169; ENABLE-V4T-NEXT: .long L_doSomething$non_lazy_ptr-(LPC1_0+4)170; ENABLE-V4T-NEXT: .end_data_region171;172; ENABLE-V5T-LABEL: bar:173; ENABLE-V5T: @ %bb.0:174; ENABLE-V5T-NEXT: cmp r0, r1175; ENABLE-V5T-NEXT: bge LBB1_2176; ENABLE-V5T-NEXT: @ %bb.1: @ %true177; ENABLE-V5T-NEXT: push {r7, lr}178; ENABLE-V5T-NEXT: .cfi_def_cfa_offset 8179; ENABLE-V5T-NEXT: .cfi_offset lr, -4180; ENABLE-V5T-NEXT: .cfi_offset r7, -8181; ENABLE-V5T-NEXT: sub sp, #8182; ENABLE-V5T-NEXT: .cfi_def_cfa_offset 16183; ENABLE-V5T-NEXT: str r0, [sp, #4]184; ENABLE-V5T-NEXT: movs r0, #0185; ENABLE-V5T-NEXT: add r1, sp, #4186; ENABLE-V5T-NEXT: bl _doSomething187; ENABLE-V5T-NEXT: add sp, #8188; ENABLE-V5T-NEXT: pop {r7}189; ENABLE-V5T-NEXT: pop {r0}190; ENABLE-V5T-NEXT: mov lr, r0191; ENABLE-V5T-NEXT: LBB1_2: @ %false192; ENABLE-V5T-NEXT: movs r0, #42193; ENABLE-V5T-NEXT: bx lr194;195; DISABLE-V4T-LABEL: bar:196; DISABLE-V4T: @ %bb.0:197; DISABLE-V4T-NEXT: push {r7, lr}198; DISABLE-V4T-NEXT: .cfi_def_cfa_offset 8199; DISABLE-V4T-NEXT: .cfi_offset lr, -4200; DISABLE-V4T-NEXT: .cfi_offset r7, -8201; DISABLE-V4T-NEXT: sub sp, #8202; DISABLE-V4T-NEXT: .cfi_def_cfa_offset 16203; DISABLE-V4T-NEXT: cmp r0, r1204; DISABLE-V4T-NEXT: bge LBB1_2205; DISABLE-V4T-NEXT: @ %bb.1: @ %true206; DISABLE-V4T-NEXT: str r0, [sp, #4]207; DISABLE-V4T-NEXT: ldr r0, LCPI1_0208; DISABLE-V4T-NEXT: LPC1_0:209; DISABLE-V4T-NEXT: add r0, pc210; DISABLE-V4T-NEXT: ldr r2, [r0]211; DISABLE-V4T-NEXT: movs r0, #0212; DISABLE-V4T-NEXT: add r1, sp, #4213; DISABLE-V4T-NEXT: bl Ltmp1214; DISABLE-V4T-NEXT: LBB1_2: @ %false215; DISABLE-V4T-NEXT: movs r0, #42216; DISABLE-V4T-NEXT: add sp, #8217; DISABLE-V4T-NEXT: pop {r7}218; DISABLE-V4T-NEXT: pop {r1}219; DISABLE-V4T-NEXT: bx r1220; DISABLE-V4T-NEXT: .p2align 2221; DISABLE-V4T-NEXT: @ %bb.3:222; DISABLE-V4T-NEXT: .data_region223; DISABLE-V4T-NEXT: LCPI1_0:224; DISABLE-V4T-NEXT: .long L_doSomething$non_lazy_ptr-(LPC1_0+4)225; DISABLE-V4T-NEXT: .end_data_region226;227; DISABLE-V5T-LABEL: bar:228; DISABLE-V5T: @ %bb.0:229; DISABLE-V5T-NEXT: push {r7, lr}230; DISABLE-V5T-NEXT: .cfi_def_cfa_offset 8231; DISABLE-V5T-NEXT: .cfi_offset lr, -4232; DISABLE-V5T-NEXT: .cfi_offset r7, -8233; DISABLE-V5T-NEXT: sub sp, #8234; DISABLE-V5T-NEXT: .cfi_def_cfa_offset 16235; DISABLE-V5T-NEXT: cmp r0, r1236; DISABLE-V5T-NEXT: bge LBB1_2237; DISABLE-V5T-NEXT: @ %bb.1: @ %true238; DISABLE-V5T-NEXT: str r0, [sp, #4]239; DISABLE-V5T-NEXT: movs r0, #0240; DISABLE-V5T-NEXT: add r1, sp, #4241; DISABLE-V5T-NEXT: bl _doSomething242; DISABLE-V5T-NEXT: LBB1_2: @ %false243; DISABLE-V5T-NEXT: movs r0, #42244; DISABLE-V5T-NEXT: add sp, #8245; DISABLE-V5T-NEXT: pop {r7, pc}246 %tmp = alloca i32, align 4247 %tmp2 = icmp slt i32 %a, %b248 br i1 %tmp2, label %true, label %false249 250true:251 store i32 %a, ptr %tmp, align 4252 %tmp4 = call i32 @doSomething(i32 0, ptr %tmp)253 br label %false254 255false:256 ret i32 42257}258 259; Function Attrs: optsize260declare i32 @doSomething(i32, ptr)261 262 263; Check that we do not perform the restore inside the loop whereas the save264; is outside.265define i32 @freqSaveAndRestoreOutsideLoop(i32 %cond, i32 %N) {266; ENABLE-V4T-LABEL: freqSaveAndRestoreOutsideLoop:267; ENABLE-V4T: @ %bb.0: @ %entry268; ENABLE-V4T-NEXT: cmp r0, #0269; ENABLE-V4T-NEXT: beq LBB2_4270; ENABLE-V4T-NEXT: @ %bb.1: @ %for.preheader271; ENABLE-V4T-NEXT: push {r4, lr}272; ENABLE-V4T-NEXT: .cfi_def_cfa_offset 8273; ENABLE-V4T-NEXT: .cfi_offset lr, -4274; ENABLE-V4T-NEXT: .cfi_offset r4, -8275; ENABLE-V4T-NEXT: @ InlineAsm Start276; ENABLE-V4T-NEXT: mov r8, r8277; ENABLE-V4T-NEXT: @ InlineAsm End278; ENABLE-V4T-NEXT: movs r0, #0279; ENABLE-V4T-NEXT: movs r1, #10280; ENABLE-V4T-NEXT: LBB2_2: @ %for.body281; ENABLE-V4T-NEXT: @ =>This Inner Loop Header: Depth=1282; ENABLE-V4T-NEXT: @ InlineAsm Start283; ENABLE-V4T-NEXT: movs r2, #1284; ENABLE-V4T-NEXT: @ InlineAsm End285; ENABLE-V4T-NEXT: adds r0, r2, r0286; ENABLE-V4T-NEXT: subs r1, r1, #1287; ENABLE-V4T-NEXT: bne LBB2_2288; ENABLE-V4T-NEXT: @ %bb.3: @ %for.end289; ENABLE-V4T-NEXT: lsls r0, r0, #3290; ENABLE-V4T-NEXT: pop {r4}291; ENABLE-V4T-NEXT: pop {r1}292; ENABLE-V4T-NEXT: bx r1293; ENABLE-V4T-NEXT: LBB2_4: @ %if.else294; ENABLE-V4T-NEXT: lsls r0, r1, #1295; ENABLE-V4T-NEXT: bx lr296;297; ENABLE-V5T-LABEL: freqSaveAndRestoreOutsideLoop:298; ENABLE-V5T: @ %bb.0: @ %entry299; ENABLE-V5T-NEXT: cmp r0, #0300; ENABLE-V5T-NEXT: beq LBB2_4301; ENABLE-V5T-NEXT: @ %bb.1: @ %for.preheader302; ENABLE-V5T-NEXT: push {r4, lr}303; ENABLE-V5T-NEXT: .cfi_def_cfa_offset 8304; ENABLE-V5T-NEXT: .cfi_offset lr, -4305; ENABLE-V5T-NEXT: .cfi_offset r4, -8306; ENABLE-V5T-NEXT: @ InlineAsm Start307; ENABLE-V5T-NEXT: mov r8, r8308; ENABLE-V5T-NEXT: @ InlineAsm End309; ENABLE-V5T-NEXT: movs r0, #0310; ENABLE-V5T-NEXT: movs r1, #10311; ENABLE-V5T-NEXT: LBB2_2: @ %for.body312; ENABLE-V5T-NEXT: @ =>This Inner Loop Header: Depth=1313; ENABLE-V5T-NEXT: @ InlineAsm Start314; ENABLE-V5T-NEXT: movs r2, #1315; ENABLE-V5T-NEXT: @ InlineAsm End316; ENABLE-V5T-NEXT: adds r0, r2, r0317; ENABLE-V5T-NEXT: subs r1, r1, #1318; ENABLE-V5T-NEXT: bne LBB2_2319; ENABLE-V5T-NEXT: @ %bb.3: @ %for.end320; ENABLE-V5T-NEXT: lsls r0, r0, #3321; ENABLE-V5T-NEXT: pop {r4, pc}322; ENABLE-V5T-NEXT: LBB2_4: @ %if.else323; ENABLE-V5T-NEXT: lsls r0, r1, #1324; ENABLE-V5T-NEXT: LBB2_5: @ %if.end325; ENABLE-V5T-NEXT: bx lr326;327; DISABLE-V4T-LABEL: freqSaveAndRestoreOutsideLoop:328; DISABLE-V4T: @ %bb.0: @ %entry329; DISABLE-V4T-NEXT: push {r4, lr}330; DISABLE-V4T-NEXT: .cfi_def_cfa_offset 8331; DISABLE-V4T-NEXT: .cfi_offset lr, -4332; DISABLE-V4T-NEXT: .cfi_offset r4, -8333; DISABLE-V4T-NEXT: cmp r0, #0334; DISABLE-V4T-NEXT: beq LBB2_4335; DISABLE-V4T-NEXT: @ %bb.1: @ %for.preheader336; DISABLE-V4T-NEXT: @ InlineAsm Start337; DISABLE-V4T-NEXT: mov r8, r8338; DISABLE-V4T-NEXT: @ InlineAsm End339; DISABLE-V4T-NEXT: movs r0, #0340; DISABLE-V4T-NEXT: movs r1, #10341; DISABLE-V4T-NEXT: LBB2_2: @ %for.body342; DISABLE-V4T-NEXT: @ =>This Inner Loop Header: Depth=1343; DISABLE-V4T-NEXT: @ InlineAsm Start344; DISABLE-V4T-NEXT: movs r2, #1345; DISABLE-V4T-NEXT: @ InlineAsm End346; DISABLE-V4T-NEXT: adds r0, r2, r0347; DISABLE-V4T-NEXT: subs r1, r1, #1348; DISABLE-V4T-NEXT: bne LBB2_2349; DISABLE-V4T-NEXT: @ %bb.3: @ %for.end350; DISABLE-V4T-NEXT: lsls r0, r0, #3351; DISABLE-V4T-NEXT: b LBB2_5352; DISABLE-V4T-NEXT: LBB2_4: @ %if.else353; DISABLE-V4T-NEXT: lsls r0, r1, #1354; DISABLE-V4T-NEXT: LBB2_5: @ %if.end355; DISABLE-V4T-NEXT: pop {r4}356; DISABLE-V4T-NEXT: pop {r1}357; DISABLE-V4T-NEXT: bx r1358;359; DISABLE-V5T-LABEL: freqSaveAndRestoreOutsideLoop:360; DISABLE-V5T: @ %bb.0: @ %entry361; DISABLE-V5T-NEXT: push {r4, lr}362; DISABLE-V5T-NEXT: .cfi_def_cfa_offset 8363; DISABLE-V5T-NEXT: .cfi_offset lr, -4364; DISABLE-V5T-NEXT: .cfi_offset r4, -8365; DISABLE-V5T-NEXT: cmp r0, #0366; DISABLE-V5T-NEXT: beq LBB2_4367; DISABLE-V5T-NEXT: @ %bb.1: @ %for.preheader368; DISABLE-V5T-NEXT: @ InlineAsm Start369; DISABLE-V5T-NEXT: mov r8, r8370; DISABLE-V5T-NEXT: @ InlineAsm End371; DISABLE-V5T-NEXT: movs r0, #0372; DISABLE-V5T-NEXT: movs r1, #10373; DISABLE-V5T-NEXT: LBB2_2: @ %for.body374; DISABLE-V5T-NEXT: @ =>This Inner Loop Header: Depth=1375; DISABLE-V5T-NEXT: @ InlineAsm Start376; DISABLE-V5T-NEXT: movs r2, #1377; DISABLE-V5T-NEXT: @ InlineAsm End378; DISABLE-V5T-NEXT: adds r0, r2, r0379; DISABLE-V5T-NEXT: subs r1, r1, #1380; DISABLE-V5T-NEXT: bne LBB2_2381; DISABLE-V5T-NEXT: @ %bb.3: @ %for.end382; DISABLE-V5T-NEXT: lsls r0, r0, #3383; DISABLE-V5T-NEXT: pop {r4, pc}384; DISABLE-V5T-NEXT: LBB2_4: @ %if.else385; DISABLE-V5T-NEXT: lsls r0, r1, #1386; DISABLE-V5T-NEXT: pop {r4, pc}387entry:388 %tobool = icmp eq i32 %cond, 0389 br i1 %tobool, label %if.else, label %for.preheader390 391for.preheader:392 tail call void asm "nop", ""()393 br label %for.body394 395for.body: ; preds = %entry, %for.body396 %i.05 = phi i32 [ %inc, %for.body ], [ 0, %for.preheader ]397 %sum.04 = phi i32 [ %add, %for.body ], [ 0, %for.preheader ]398 %call = tail call i32 asm sideeffect "movs $0, #1", "=r,~{r4}"()399 %add = add nsw i32 %call, %sum.04400 %inc = add nuw nsw i32 %i.05, 1401 %exitcond = icmp eq i32 %inc, 10402 br i1 %exitcond, label %for.end, label %for.body403 404for.end: ; preds = %for.body405 %shl = shl i32 %add, 3406 br label %if.end407 408if.else: ; preds = %entry409 %mul = shl nsw i32 %N, 1410 br label %if.end411 412if.end: ; preds = %if.else, %for.end413 %sum.1 = phi i32 [ %shl, %for.end ], [ %mul, %if.else ]414 ret i32 %sum.1415}416 417declare i32 @something(...)418 419; Check that we do not perform the shrink-wrapping inside the loop even420; though that would be legal. The cost model must prevent that.421define i32 @freqSaveAndRestoreOutsideLoop2(i32 %cond) {422; ENABLE-V4T-LABEL: freqSaveAndRestoreOutsideLoop2:423; ENABLE-V4T: @ %bb.0: @ %entry424; ENABLE-V4T-NEXT: push {r4, lr}425; ENABLE-V4T-NEXT: .cfi_def_cfa_offset 8426; ENABLE-V4T-NEXT: .cfi_offset lr, -4427; ENABLE-V4T-NEXT: .cfi_offset r4, -8428; ENABLE-V4T-NEXT: @ InlineAsm Start429; ENABLE-V4T-NEXT: mov r8, r8430; ENABLE-V4T-NEXT: @ InlineAsm End431; ENABLE-V4T-NEXT: movs r0, #0432; ENABLE-V4T-NEXT: movs r1, #10433; ENABLE-V4T-NEXT: LBB3_1: @ %for.body434; ENABLE-V4T-NEXT: @ =>This Inner Loop Header: Depth=1435; ENABLE-V4T-NEXT: @ InlineAsm Start436; ENABLE-V4T-NEXT: movs r2, #1437; ENABLE-V4T-NEXT: @ InlineAsm End438; ENABLE-V4T-NEXT: adds r0, r2, r0439; ENABLE-V4T-NEXT: subs r1, r1, #1440; ENABLE-V4T-NEXT: bne LBB3_1441; ENABLE-V4T-NEXT: @ %bb.2: @ %for.exit442; ENABLE-V4T-NEXT: @ InlineAsm Start443; ENABLE-V4T-NEXT: mov r8, r8444; ENABLE-V4T-NEXT: @ InlineAsm End445; ENABLE-V4T-NEXT: pop {r4}446; ENABLE-V4T-NEXT: pop {r1}447; ENABLE-V4T-NEXT: bx r1448;449; ENABLE-V5T-LABEL: freqSaveAndRestoreOutsideLoop2:450; ENABLE-V5T: @ %bb.0: @ %entry451; ENABLE-V5T-NEXT: push {r4, lr}452; ENABLE-V5T-NEXT: .cfi_def_cfa_offset 8453; ENABLE-V5T-NEXT: .cfi_offset lr, -4454; ENABLE-V5T-NEXT: .cfi_offset r4, -8455; ENABLE-V5T-NEXT: @ InlineAsm Start456; ENABLE-V5T-NEXT: mov r8, r8457; ENABLE-V5T-NEXT: @ InlineAsm End458; ENABLE-V5T-NEXT: movs r0, #0459; ENABLE-V5T-NEXT: movs r1, #10460; ENABLE-V5T-NEXT: LBB3_1: @ %for.body461; ENABLE-V5T-NEXT: @ =>This Inner Loop Header: Depth=1462; ENABLE-V5T-NEXT: @ InlineAsm Start463; ENABLE-V5T-NEXT: movs r2, #1464; ENABLE-V5T-NEXT: @ InlineAsm End465; ENABLE-V5T-NEXT: adds r0, r2, r0466; ENABLE-V5T-NEXT: subs r1, r1, #1467; ENABLE-V5T-NEXT: bne LBB3_1468; ENABLE-V5T-NEXT: @ %bb.2: @ %for.exit469; ENABLE-V5T-NEXT: @ InlineAsm Start470; ENABLE-V5T-NEXT: mov r8, r8471; ENABLE-V5T-NEXT: @ InlineAsm End472; ENABLE-V5T-NEXT: pop {r4, pc}473; ENABLE-V5T-NEXT: LBB3_3: @ %for.end474; ENABLE-V5T-NEXT: bx lr475;476; DISABLE-V4T-LABEL: freqSaveAndRestoreOutsideLoop2:477; DISABLE-V4T: @ %bb.0: @ %entry478; DISABLE-V4T-NEXT: push {r4, lr}479; DISABLE-V4T-NEXT: .cfi_def_cfa_offset 8480; DISABLE-V4T-NEXT: .cfi_offset lr, -4481; DISABLE-V4T-NEXT: .cfi_offset r4, -8482; DISABLE-V4T-NEXT: @ InlineAsm Start483; DISABLE-V4T-NEXT: mov r8, r8484; DISABLE-V4T-NEXT: @ InlineAsm End485; DISABLE-V4T-NEXT: movs r0, #0486; DISABLE-V4T-NEXT: movs r1, #10487; DISABLE-V4T-NEXT: LBB3_1: @ %for.body488; DISABLE-V4T-NEXT: @ =>This Inner Loop Header: Depth=1489; DISABLE-V4T-NEXT: @ InlineAsm Start490; DISABLE-V4T-NEXT: movs r2, #1491; DISABLE-V4T-NEXT: @ InlineAsm End492; DISABLE-V4T-NEXT: adds r0, r2, r0493; DISABLE-V4T-NEXT: subs r1, r1, #1494; DISABLE-V4T-NEXT: bne LBB3_1495; DISABLE-V4T-NEXT: @ %bb.2: @ %for.exit496; DISABLE-V4T-NEXT: @ InlineAsm Start497; DISABLE-V4T-NEXT: mov r8, r8498; DISABLE-V4T-NEXT: @ InlineAsm End499; DISABLE-V4T-NEXT: pop {r4}500; DISABLE-V4T-NEXT: pop {r1}501; DISABLE-V4T-NEXT: bx r1502;503; DISABLE-V5T-LABEL: freqSaveAndRestoreOutsideLoop2:504; DISABLE-V5T: @ %bb.0: @ %entry505; DISABLE-V5T-NEXT: push {r4, lr}506; DISABLE-V5T-NEXT: .cfi_def_cfa_offset 8507; DISABLE-V5T-NEXT: .cfi_offset lr, -4508; DISABLE-V5T-NEXT: .cfi_offset r4, -8509; DISABLE-V5T-NEXT: @ InlineAsm Start510; DISABLE-V5T-NEXT: mov r8, r8511; DISABLE-V5T-NEXT: @ InlineAsm End512; DISABLE-V5T-NEXT: movs r0, #0513; DISABLE-V5T-NEXT: movs r1, #10514; DISABLE-V5T-NEXT: LBB3_1: @ %for.body515; DISABLE-V5T-NEXT: @ =>This Inner Loop Header: Depth=1516; DISABLE-V5T-NEXT: @ InlineAsm Start517; DISABLE-V5T-NEXT: movs r2, #1518; DISABLE-V5T-NEXT: @ InlineAsm End519; DISABLE-V5T-NEXT: adds r0, r2, r0520; DISABLE-V5T-NEXT: subs r1, r1, #1521; DISABLE-V5T-NEXT: bne LBB3_1522; DISABLE-V5T-NEXT: @ %bb.2: @ %for.exit523; DISABLE-V5T-NEXT: @ InlineAsm Start524; DISABLE-V5T-NEXT: mov r8, r8525; DISABLE-V5T-NEXT: @ InlineAsm End526; DISABLE-V5T-NEXT: pop {r4, pc}527entry:528 br label %for.preheader529 530for.preheader:531 tail call void asm "nop", ""()532 br label %for.body533 534for.body: ; preds = %for.body, %entry535 %i.04 = phi i32 [ 0, %for.preheader ], [ %inc, %for.body ]536 %sum.03 = phi i32 [ 0, %for.preheader ], [ %add, %for.body ]537 %call = tail call i32 asm sideeffect "movs $0, #1", "=r,~{r4}"()538 %add = add nsw i32 %call, %sum.03539 %inc = add nuw nsw i32 %i.04, 1540 %exitcond = icmp eq i32 %inc, 10541 br i1 %exitcond, label %for.exit, label %for.body542 543for.exit:544 tail call void asm "nop", ""()545 br label %for.end546 547for.end: ; preds = %for.body548 ret i32 %add549}550 551; Check with a more complex case that we do not have save within the loop and552; restore outside.553define i32 @loopInfoSaveOutsideLoop(i32 %cond, i32 %N) {554; ENABLE-V4T-LABEL: loopInfoSaveOutsideLoop:555; ENABLE-V4T: @ %bb.0: @ %entry556; ENABLE-V4T-NEXT: cmp r0, #0557; ENABLE-V4T-NEXT: beq LBB4_4558; ENABLE-V4T-NEXT: @ %bb.1: @ %for.preheader559; ENABLE-V4T-NEXT: push {r4, lr}560; ENABLE-V4T-NEXT: .cfi_def_cfa_offset 8561; ENABLE-V4T-NEXT: .cfi_offset lr, -4562; ENABLE-V4T-NEXT: .cfi_offset r4, -8563; ENABLE-V4T-NEXT: @ InlineAsm Start564; ENABLE-V4T-NEXT: mov r8, r8565; ENABLE-V4T-NEXT: @ InlineAsm End566; ENABLE-V4T-NEXT: movs r0, #0567; ENABLE-V4T-NEXT: movs r1, #10568; ENABLE-V4T-NEXT: LBB4_2: @ %for.body569; ENABLE-V4T-NEXT: @ =>This Inner Loop Header: Depth=1570; ENABLE-V4T-NEXT: @ InlineAsm Start571; ENABLE-V4T-NEXT: movs r2, #1572; ENABLE-V4T-NEXT: @ InlineAsm End573; ENABLE-V4T-NEXT: adds r0, r2, r0574; ENABLE-V4T-NEXT: subs r1, r1, #1575; ENABLE-V4T-NEXT: bne LBB4_2576; ENABLE-V4T-NEXT: @ %bb.3: @ %for.end577; ENABLE-V4T-NEXT: @ InlineAsm Start578; ENABLE-V4T-NEXT: mov r8, r8579; ENABLE-V4T-NEXT: @ InlineAsm End580; ENABLE-V4T-NEXT: lsls r0, r0, #3581; ENABLE-V4T-NEXT: pop {r4}582; ENABLE-V4T-NEXT: pop {r1}583; ENABLE-V4T-NEXT: bx r1584; ENABLE-V4T-NEXT: LBB4_4: @ %if.else585; ENABLE-V4T-NEXT: lsls r0, r1, #1586; ENABLE-V4T-NEXT: bx lr587;588; ENABLE-V5T-LABEL: loopInfoSaveOutsideLoop:589; ENABLE-V5T: @ %bb.0: @ %entry590; ENABLE-V5T-NEXT: cmp r0, #0591; ENABLE-V5T-NEXT: beq LBB4_4592; ENABLE-V5T-NEXT: @ %bb.1: @ %for.preheader593; ENABLE-V5T-NEXT: push {r4, lr}594; ENABLE-V5T-NEXT: .cfi_def_cfa_offset 8595; ENABLE-V5T-NEXT: .cfi_offset lr, -4596; ENABLE-V5T-NEXT: .cfi_offset r4, -8597; ENABLE-V5T-NEXT: @ InlineAsm Start598; ENABLE-V5T-NEXT: mov r8, r8599; ENABLE-V5T-NEXT: @ InlineAsm End600; ENABLE-V5T-NEXT: movs r0, #0601; ENABLE-V5T-NEXT: movs r1, #10602; ENABLE-V5T-NEXT: LBB4_2: @ %for.body603; ENABLE-V5T-NEXT: @ =>This Inner Loop Header: Depth=1604; ENABLE-V5T-NEXT: @ InlineAsm Start605; ENABLE-V5T-NEXT: movs r2, #1606; ENABLE-V5T-NEXT: @ InlineAsm End607; ENABLE-V5T-NEXT: adds r0, r2, r0608; ENABLE-V5T-NEXT: subs r1, r1, #1609; ENABLE-V5T-NEXT: bne LBB4_2610; ENABLE-V5T-NEXT: @ %bb.3: @ %for.end611; ENABLE-V5T-NEXT: @ InlineAsm Start612; ENABLE-V5T-NEXT: mov r8, r8613; ENABLE-V5T-NEXT: @ InlineAsm End614; ENABLE-V5T-NEXT: lsls r0, r0, #3615; ENABLE-V5T-NEXT: pop {r4, pc}616; ENABLE-V5T-NEXT: LBB4_4: @ %if.else617; ENABLE-V5T-NEXT: lsls r0, r1, #1618; ENABLE-V5T-NEXT: LBB4_5: @ %if.end619; ENABLE-V5T-NEXT: bx lr620;621; DISABLE-V4T-LABEL: loopInfoSaveOutsideLoop:622; DISABLE-V4T: @ %bb.0: @ %entry623; DISABLE-V4T-NEXT: push {r4, lr}624; DISABLE-V4T-NEXT: .cfi_def_cfa_offset 8625; DISABLE-V4T-NEXT: .cfi_offset lr, -4626; DISABLE-V4T-NEXT: .cfi_offset r4, -8627; DISABLE-V4T-NEXT: cmp r0, #0628; DISABLE-V4T-NEXT: beq LBB4_4629; DISABLE-V4T-NEXT: @ %bb.1: @ %for.preheader630; DISABLE-V4T-NEXT: @ InlineAsm Start631; DISABLE-V4T-NEXT: mov r8, r8632; DISABLE-V4T-NEXT: @ InlineAsm End633; DISABLE-V4T-NEXT: movs r0, #0634; DISABLE-V4T-NEXT: movs r1, #10635; DISABLE-V4T-NEXT: LBB4_2: @ %for.body636; DISABLE-V4T-NEXT: @ =>This Inner Loop Header: Depth=1637; DISABLE-V4T-NEXT: @ InlineAsm Start638; DISABLE-V4T-NEXT: movs r2, #1639; DISABLE-V4T-NEXT: @ InlineAsm End640; DISABLE-V4T-NEXT: adds r0, r2, r0641; DISABLE-V4T-NEXT: subs r1, r1, #1642; DISABLE-V4T-NEXT: bne LBB4_2643; DISABLE-V4T-NEXT: @ %bb.3: @ %for.end644; DISABLE-V4T-NEXT: @ InlineAsm Start645; DISABLE-V4T-NEXT: mov r8, r8646; DISABLE-V4T-NEXT: @ InlineAsm End647; DISABLE-V4T-NEXT: lsls r0, r0, #3648; DISABLE-V4T-NEXT: b LBB4_5649; DISABLE-V4T-NEXT: LBB4_4: @ %if.else650; DISABLE-V4T-NEXT: lsls r0, r1, #1651; DISABLE-V4T-NEXT: LBB4_5: @ %if.end652; DISABLE-V4T-NEXT: pop {r4}653; DISABLE-V4T-NEXT: pop {r1}654; DISABLE-V4T-NEXT: bx r1655;656; DISABLE-V5T-LABEL: loopInfoSaveOutsideLoop:657; DISABLE-V5T: @ %bb.0: @ %entry658; DISABLE-V5T-NEXT: push {r4, lr}659; DISABLE-V5T-NEXT: .cfi_def_cfa_offset 8660; DISABLE-V5T-NEXT: .cfi_offset lr, -4661; DISABLE-V5T-NEXT: .cfi_offset r4, -8662; DISABLE-V5T-NEXT: cmp r0, #0663; DISABLE-V5T-NEXT: beq LBB4_4664; DISABLE-V5T-NEXT: @ %bb.1: @ %for.preheader665; DISABLE-V5T-NEXT: @ InlineAsm Start666; DISABLE-V5T-NEXT: mov r8, r8667; DISABLE-V5T-NEXT: @ InlineAsm End668; DISABLE-V5T-NEXT: movs r0, #0669; DISABLE-V5T-NEXT: movs r1, #10670; DISABLE-V5T-NEXT: LBB4_2: @ %for.body671; DISABLE-V5T-NEXT: @ =>This Inner Loop Header: Depth=1672; DISABLE-V5T-NEXT: @ InlineAsm Start673; DISABLE-V5T-NEXT: movs r2, #1674; DISABLE-V5T-NEXT: @ InlineAsm End675; DISABLE-V5T-NEXT: adds r0, r2, r0676; DISABLE-V5T-NEXT: subs r1, r1, #1677; DISABLE-V5T-NEXT: bne LBB4_2678; DISABLE-V5T-NEXT: @ %bb.3: @ %for.end679; DISABLE-V5T-NEXT: @ InlineAsm Start680; DISABLE-V5T-NEXT: mov r8, r8681; DISABLE-V5T-NEXT: @ InlineAsm End682; DISABLE-V5T-NEXT: lsls r0, r0, #3683; DISABLE-V5T-NEXT: pop {r4, pc}684; DISABLE-V5T-NEXT: LBB4_4: @ %if.else685; DISABLE-V5T-NEXT: lsls r0, r1, #1686; DISABLE-V5T-NEXT: pop {r4, pc}687entry:688 %tobool = icmp eq i32 %cond, 0689 br i1 %tobool, label %if.else, label %for.preheader690 691for.preheader:692 tail call void asm "nop", ""()693 br label %for.body694 695for.body: ; preds = %entry, %for.body696 %i.05 = phi i32 [ %inc, %for.body ], [ 0, %for.preheader ]697 %sum.04 = phi i32 [ %add, %for.body ], [ 0, %for.preheader ]698 %call = tail call i32 asm sideeffect "movs $0, #1", "=r,~{r4}"()699 %add = add nsw i32 %call, %sum.04700 %inc = add nuw nsw i32 %i.05, 1701 %exitcond = icmp eq i32 %inc, 10702 br i1 %exitcond, label %for.end, label %for.body703 704for.end: ; preds = %for.body705 tail call void asm "nop", "~{r4}"()706 %shl = shl i32 %add, 3707 br label %if.end708 709if.else: ; preds = %entry710 %mul = shl nsw i32 %N, 1711 br label %if.end712 713if.end: ; preds = %if.else, %for.end714 %sum.1 = phi i32 [ %shl, %for.end ], [ %mul, %if.else ]715 ret i32 %sum.1716}717 718declare void @somethingElse(...)719 720; Check with a more complex case that we do not have restore within the loop and721; save outside.722define i32 @loopInfoRestoreOutsideLoop(i32 %cond, i32 %N) nounwind {723; ENABLE-V4T-LABEL: loopInfoRestoreOutsideLoop:724; ENABLE-V4T: @ %bb.0: @ %entry725; ENABLE-V4T-NEXT: cmp r0, #0726; ENABLE-V4T-NEXT: beq LBB5_4727; ENABLE-V4T-NEXT: @ %bb.1: @ %if.then728; ENABLE-V4T-NEXT: push {r4, lr}729; ENABLE-V4T-NEXT: @ InlineAsm Start730; ENABLE-V4T-NEXT: mov r8, r8731; ENABLE-V4T-NEXT: @ InlineAsm End732; ENABLE-V4T-NEXT: movs r0, #0733; ENABLE-V4T-NEXT: movs r1, #10734; ENABLE-V4T-NEXT: LBB5_2: @ %for.body735; ENABLE-V4T-NEXT: @ =>This Inner Loop Header: Depth=1736; ENABLE-V4T-NEXT: @ InlineAsm Start737; ENABLE-V4T-NEXT: movs r2, #1738; ENABLE-V4T-NEXT: @ InlineAsm End739; ENABLE-V4T-NEXT: adds r0, r2, r0740; ENABLE-V4T-NEXT: subs r1, r1, #1741; ENABLE-V4T-NEXT: bne LBB5_2742; ENABLE-V4T-NEXT: @ %bb.3: @ %for.end743; ENABLE-V4T-NEXT: lsls r0, r0, #3744; ENABLE-V4T-NEXT: pop {r4}745; ENABLE-V4T-NEXT: pop {r1}746; ENABLE-V4T-NEXT: bx r1747; ENABLE-V4T-NEXT: LBB5_4: @ %if.else748; ENABLE-V4T-NEXT: lsls r0, r1, #1749; ENABLE-V4T-NEXT: bx lr750; ENABLE-V4T-NEXT: @ -- End function751; ENABLE-V4T-NEXT: .globl _emptyFrame @ -- Begin function emptyFrame752; ENABLE-V4T-NEXT: .p2align 1753; ENABLE-V4T-NEXT: .code 16754; ENABLE-V4T-NEXT: .thumb_func _emptyFrame755; ENABLE-V4T-NEXT: _emptyFrame: @ @emptyFrame756; ENABLE-V4T-NEXT: .cfi_startproc757; ENABLE-V4T-NEXT: @ %bb.0: @ %entry758; ENABLE-V4T-NEXT: movs r0, #0759; ENABLE-V4T-NEXT: bx lr760;761; ENABLE-V5T-LABEL: loopInfoRestoreOutsideLoop:762; ENABLE-V5T: @ %bb.0: @ %entry763; ENABLE-V5T-NEXT: cmp r0, #0764; ENABLE-V5T-NEXT: beq LBB5_4765; ENABLE-V5T-NEXT: @ %bb.1: @ %if.then766; ENABLE-V5T-NEXT: push {r4, lr}767; ENABLE-V5T-NEXT: @ InlineAsm Start768; ENABLE-V5T-NEXT: mov r8, r8769; ENABLE-V5T-NEXT: @ InlineAsm End770; ENABLE-V5T-NEXT: movs r0, #0771; ENABLE-V5T-NEXT: movs r1, #10772; ENABLE-V5T-NEXT: LBB5_2: @ %for.body773; ENABLE-V5T-NEXT: @ =>This Inner Loop Header: Depth=1774; ENABLE-V5T-NEXT: @ InlineAsm Start775; ENABLE-V5T-NEXT: movs r2, #1776; ENABLE-V5T-NEXT: @ InlineAsm End777; ENABLE-V5T-NEXT: adds r0, r2, r0778; ENABLE-V5T-NEXT: subs r1, r1, #1779; ENABLE-V5T-NEXT: bne LBB5_2780; ENABLE-V5T-NEXT: @ %bb.3: @ %for.end781; ENABLE-V5T-NEXT: lsls r0, r0, #3782; ENABLE-V5T-NEXT: pop {r4, pc}783; ENABLE-V5T-NEXT: LBB5_4: @ %if.else784; ENABLE-V5T-NEXT: lsls r0, r1, #1785; ENABLE-V5T-NEXT: LBB5_5: @ %if.end786; ENABLE-V5T-NEXT: bx lr787; ENABLE-V5T-NEXT: @ -- End function788; ENABLE-V5T-NEXT: .globl _emptyFrame @ -- Begin function emptyFrame789; ENABLE-V5T-NEXT: .p2align 1790; ENABLE-V5T-NEXT: .code 16791; ENABLE-V5T-NEXT: .thumb_func _emptyFrame792; ENABLE-V5T-NEXT: _emptyFrame: @ @emptyFrame793; ENABLE-V5T-NEXT: .cfi_startproc794; ENABLE-V5T-NEXT: @ %bb.0: @ %entry795; ENABLE-V5T-NEXT: movs r0, #0796; ENABLE-V5T-NEXT: bx lr797;798; DISABLE-V4T-LABEL: loopInfoRestoreOutsideLoop:799; DISABLE-V4T: @ %bb.0: @ %entry800; DISABLE-V4T-NEXT: push {r4, lr}801; DISABLE-V4T-NEXT: cmp r0, #0802; DISABLE-V4T-NEXT: beq LBB5_4803; DISABLE-V4T-NEXT: @ %bb.1: @ %if.then804; DISABLE-V4T-NEXT: @ InlineAsm Start805; DISABLE-V4T-NEXT: mov r8, r8806; DISABLE-V4T-NEXT: @ InlineAsm End807; DISABLE-V4T-NEXT: movs r0, #0808; DISABLE-V4T-NEXT: movs r1, #10809; DISABLE-V4T-NEXT: LBB5_2: @ %for.body810; DISABLE-V4T-NEXT: @ =>This Inner Loop Header: Depth=1811; DISABLE-V4T-NEXT: @ InlineAsm Start812; DISABLE-V4T-NEXT: movs r2, #1813; DISABLE-V4T-NEXT: @ InlineAsm End814; DISABLE-V4T-NEXT: adds r0, r2, r0815; DISABLE-V4T-NEXT: subs r1, r1, #1816; DISABLE-V4T-NEXT: bne LBB5_2817; DISABLE-V4T-NEXT: @ %bb.3: @ %for.end818; DISABLE-V4T-NEXT: lsls r0, r0, #3819; DISABLE-V4T-NEXT: b LBB5_5820; DISABLE-V4T-NEXT: LBB5_4: @ %if.else821; DISABLE-V4T-NEXT: lsls r0, r1, #1822; DISABLE-V4T-NEXT: LBB5_5: @ %if.end823; DISABLE-V4T-NEXT: pop {r4}824; DISABLE-V4T-NEXT: pop {r1}825; DISABLE-V4T-NEXT: bx r1826; DISABLE-V4T-NEXT: @ -- End function827; DISABLE-V4T-NEXT: .globl _emptyFrame @ -- Begin function emptyFrame828; DISABLE-V4T-NEXT: .p2align 1829; DISABLE-V4T-NEXT: .code 16830; DISABLE-V4T-NEXT: .thumb_func _emptyFrame831; DISABLE-V4T-NEXT: _emptyFrame: @ @emptyFrame832; DISABLE-V4T-NEXT: .cfi_startproc833; DISABLE-V4T-NEXT: @ %bb.0: @ %entry834; DISABLE-V4T-NEXT: movs r0, #0835; DISABLE-V4T-NEXT: bx lr836;837; DISABLE-V5T-LABEL: loopInfoRestoreOutsideLoop:838; DISABLE-V5T: @ %bb.0: @ %entry839; DISABLE-V5T-NEXT: push {r4, lr}840; DISABLE-V5T-NEXT: cmp r0, #0841; DISABLE-V5T-NEXT: beq LBB5_4842; DISABLE-V5T-NEXT: @ %bb.1: @ %if.then843; DISABLE-V5T-NEXT: @ InlineAsm Start844; DISABLE-V5T-NEXT: mov r8, r8845; DISABLE-V5T-NEXT: @ InlineAsm End846; DISABLE-V5T-NEXT: movs r0, #0847; DISABLE-V5T-NEXT: movs r1, #10848; DISABLE-V5T-NEXT: LBB5_2: @ %for.body849; DISABLE-V5T-NEXT: @ =>This Inner Loop Header: Depth=1850; DISABLE-V5T-NEXT: @ InlineAsm Start851; DISABLE-V5T-NEXT: movs r2, #1852; DISABLE-V5T-NEXT: @ InlineAsm End853; DISABLE-V5T-NEXT: adds r0, r2, r0854; DISABLE-V5T-NEXT: subs r1, r1, #1855; DISABLE-V5T-NEXT: bne LBB5_2856; DISABLE-V5T-NEXT: @ %bb.3: @ %for.end857; DISABLE-V5T-NEXT: lsls r0, r0, #3858; DISABLE-V5T-NEXT: pop {r4, pc}859; DISABLE-V5T-NEXT: LBB5_4: @ %if.else860; DISABLE-V5T-NEXT: lsls r0, r1, #1861; DISABLE-V5T-NEXT: pop {r4, pc}862; DISABLE-V5T-NEXT: @ -- End function863; DISABLE-V5T-NEXT: .globl _emptyFrame @ -- Begin function emptyFrame864; DISABLE-V5T-NEXT: .p2align 1865; DISABLE-V5T-NEXT: .code 16866; DISABLE-V5T-NEXT: .thumb_func _emptyFrame867; DISABLE-V5T-NEXT: _emptyFrame: @ @emptyFrame868; DISABLE-V5T-NEXT: .cfi_startproc869; DISABLE-V5T-NEXT: @ %bb.0: @ %entry870; DISABLE-V5T-NEXT: movs r0, #0871; DISABLE-V5T-NEXT: bx lr872entry:873 %tobool = icmp eq i32 %cond, 0874 br i1 %tobool, label %if.else, label %if.then875 876if.then: ; preds = %entry877 tail call void asm "nop", "~{r4}"()878 br label %for.body879 880for.body: ; preds = %for.body, %if.then881 %i.05 = phi i32 [ 0, %if.then ], [ %inc, %for.body ]882 %sum.04 = phi i32 [ 0, %if.then ], [ %add, %for.body ]883 %call = tail call i32 asm sideeffect "movs $0, #1", "=r,~{r4}"()884 %add = add nsw i32 %call, %sum.04885 %inc = add nuw nsw i32 %i.05, 1886 %exitcond = icmp eq i32 %inc, 10887 br i1 %exitcond, label %for.end, label %for.body888 889for.end: ; preds = %for.body890 %shl = shl i32 %add, 3891 br label %if.end892 893if.else: ; preds = %entry894 %mul = shl nsw i32 %N, 1895 br label %if.end896 897if.end: ; preds = %if.else, %for.end898 %sum.1 = phi i32 [ %shl, %for.end ], [ %mul, %if.else ]899 ret i32 %sum.1900}901 902; Check that we handle function with no frame information correctly.903define i32 @emptyFrame() {904entry:905 ret i32 0906}907 908; Check that we handle inline asm correctly.909define i32 @inlineAsm(i32 %cond, i32 %N) {910; ENABLE-V4T-LABEL: inlineAsm:911; ENABLE-V4T: @ %bb.0: @ %entry912; ENABLE-V4T-NEXT: cmp r0, #0913; ENABLE-V4T-NEXT: beq LBB7_4914; ENABLE-V4T-NEXT: @ %bb.1: @ %for.preheader915; ENABLE-V4T-NEXT: push {r4, lr}916; ENABLE-V4T-NEXT: .cfi_def_cfa_offset 8917; ENABLE-V4T-NEXT: .cfi_offset lr, -4918; ENABLE-V4T-NEXT: .cfi_offset r4, -8919; ENABLE-V4T-NEXT: @ InlineAsm Start920; ENABLE-V4T-NEXT: mov r8, r8921; ENABLE-V4T-NEXT: @ InlineAsm End922; ENABLE-V4T-NEXT: movs r0, #10923; ENABLE-V4T-NEXT: LBB7_2: @ %for.body924; ENABLE-V4T-NEXT: @ =>This Inner Loop Header: Depth=1925; ENABLE-V4T-NEXT: @ InlineAsm Start926; ENABLE-V4T-NEXT: movs r4, #1927; ENABLE-V4T-NEXT: @ InlineAsm End928; ENABLE-V4T-NEXT: subs r0, r0, #1929; ENABLE-V4T-NEXT: bne LBB7_2930; ENABLE-V4T-NEXT: @ %bb.3: @ %for.exit931; ENABLE-V4T-NEXT: @ InlineAsm Start932; ENABLE-V4T-NEXT: mov r8, r8933; ENABLE-V4T-NEXT: @ InlineAsm End934; ENABLE-V4T-NEXT: movs r0, #0935; ENABLE-V4T-NEXT: pop {r4}936; ENABLE-V4T-NEXT: pop {r1}937; ENABLE-V4T-NEXT: bx r1938; ENABLE-V4T-NEXT: LBB7_4: @ %if.else939; ENABLE-V4T-NEXT: lsls r0, r1, #1940; ENABLE-V4T-NEXT: bx lr941;942; ENABLE-V5T-LABEL: inlineAsm:943; ENABLE-V5T: @ %bb.0: @ %entry944; ENABLE-V5T-NEXT: cmp r0, #0945; ENABLE-V5T-NEXT: beq LBB7_4946; ENABLE-V5T-NEXT: @ %bb.1: @ %for.preheader947; ENABLE-V5T-NEXT: push {r4, lr}948; ENABLE-V5T-NEXT: .cfi_def_cfa_offset 8949; ENABLE-V5T-NEXT: .cfi_offset lr, -4950; ENABLE-V5T-NEXT: .cfi_offset r4, -8951; ENABLE-V5T-NEXT: @ InlineAsm Start952; ENABLE-V5T-NEXT: mov r8, r8953; ENABLE-V5T-NEXT: @ InlineAsm End954; ENABLE-V5T-NEXT: movs r0, #10955; ENABLE-V5T-NEXT: LBB7_2: @ %for.body956; ENABLE-V5T-NEXT: @ =>This Inner Loop Header: Depth=1957; ENABLE-V5T-NEXT: @ InlineAsm Start958; ENABLE-V5T-NEXT: movs r4, #1959; ENABLE-V5T-NEXT: @ InlineAsm End960; ENABLE-V5T-NEXT: subs r0, r0, #1961; ENABLE-V5T-NEXT: bne LBB7_2962; ENABLE-V5T-NEXT: @ %bb.3: @ %for.exit963; ENABLE-V5T-NEXT: @ InlineAsm Start964; ENABLE-V5T-NEXT: mov r8, r8965; ENABLE-V5T-NEXT: @ InlineAsm End966; ENABLE-V5T-NEXT: movs r0, #0967; ENABLE-V5T-NEXT: pop {r4, pc}968; ENABLE-V5T-NEXT: LBB7_4: @ %if.else969; ENABLE-V5T-NEXT: lsls r0, r1, #1970; ENABLE-V5T-NEXT: LBB7_5: @ %if.end971; ENABLE-V5T-NEXT: bx lr972;973; DISABLE-V4T-LABEL: inlineAsm:974; DISABLE-V4T: @ %bb.0: @ %entry975; DISABLE-V4T-NEXT: push {r4, lr}976; DISABLE-V4T-NEXT: .cfi_def_cfa_offset 8977; DISABLE-V4T-NEXT: .cfi_offset lr, -4978; DISABLE-V4T-NEXT: .cfi_offset r4, -8979; DISABLE-V4T-NEXT: cmp r0, #0980; DISABLE-V4T-NEXT: beq LBB7_4981; DISABLE-V4T-NEXT: @ %bb.1: @ %for.preheader982; DISABLE-V4T-NEXT: @ InlineAsm Start983; DISABLE-V4T-NEXT: mov r8, r8984; DISABLE-V4T-NEXT: @ InlineAsm End985; DISABLE-V4T-NEXT: movs r0, #10986; DISABLE-V4T-NEXT: LBB7_2: @ %for.body987; DISABLE-V4T-NEXT: @ =>This Inner Loop Header: Depth=1988; DISABLE-V4T-NEXT: @ InlineAsm Start989; DISABLE-V4T-NEXT: movs r4, #1990; DISABLE-V4T-NEXT: @ InlineAsm End991; DISABLE-V4T-NEXT: subs r0, r0, #1992; DISABLE-V4T-NEXT: bne LBB7_2993; DISABLE-V4T-NEXT: @ %bb.3: @ %for.exit994; DISABLE-V4T-NEXT: @ InlineAsm Start995; DISABLE-V4T-NEXT: mov r8, r8996; DISABLE-V4T-NEXT: @ InlineAsm End997; DISABLE-V4T-NEXT: movs r0, #0998; DISABLE-V4T-NEXT: b LBB7_5999; DISABLE-V4T-NEXT: LBB7_4: @ %if.else1000; DISABLE-V4T-NEXT: lsls r0, r1, #11001; DISABLE-V4T-NEXT: LBB7_5: @ %if.end1002; DISABLE-V4T-NEXT: pop {r4}1003; DISABLE-V4T-NEXT: pop {r1}1004; DISABLE-V4T-NEXT: bx r11005;1006; DISABLE-V5T-LABEL: inlineAsm:1007; DISABLE-V5T: @ %bb.0: @ %entry1008; DISABLE-V5T-NEXT: push {r4, lr}1009; DISABLE-V5T-NEXT: .cfi_def_cfa_offset 81010; DISABLE-V5T-NEXT: .cfi_offset lr, -41011; DISABLE-V5T-NEXT: .cfi_offset r4, -81012; DISABLE-V5T-NEXT: cmp r0, #01013; DISABLE-V5T-NEXT: beq LBB7_41014; DISABLE-V5T-NEXT: @ %bb.1: @ %for.preheader1015; DISABLE-V5T-NEXT: @ InlineAsm Start1016; DISABLE-V5T-NEXT: mov r8, r81017; DISABLE-V5T-NEXT: @ InlineAsm End1018; DISABLE-V5T-NEXT: movs r0, #101019; DISABLE-V5T-NEXT: LBB7_2: @ %for.body1020; DISABLE-V5T-NEXT: @ =>This Inner Loop Header: Depth=11021; DISABLE-V5T-NEXT: @ InlineAsm Start1022; DISABLE-V5T-NEXT: movs r4, #11023; DISABLE-V5T-NEXT: @ InlineAsm End1024; DISABLE-V5T-NEXT: subs r0, r0, #11025; DISABLE-V5T-NEXT: bne LBB7_21026; DISABLE-V5T-NEXT: @ %bb.3: @ %for.exit1027; DISABLE-V5T-NEXT: @ InlineAsm Start1028; DISABLE-V5T-NEXT: mov r8, r81029; DISABLE-V5T-NEXT: @ InlineAsm End1030; DISABLE-V5T-NEXT: movs r0, #01031; DISABLE-V5T-NEXT: pop {r4, pc}1032; DISABLE-V5T-NEXT: LBB7_4: @ %if.else1033; DISABLE-V5T-NEXT: lsls r0, r1, #11034; DISABLE-V5T-NEXT: pop {r4, pc}1035entry:1036 %tobool = icmp eq i32 %cond, 01037 br i1 %tobool, label %if.else, label %for.preheader1038 1039for.preheader:1040 tail call void asm "nop", ""()1041 br label %for.body1042 1043for.body: ; preds = %entry, %for.body1044 %i.03 = phi i32 [ %inc, %for.body ], [ 0, %for.preheader ]1045 tail call void asm sideeffect "movs r4, #1", "~{r4}"()1046 %inc = add nuw nsw i32 %i.03, 11047 %exitcond = icmp eq i32 %inc, 101048 br i1 %exitcond, label %for.exit, label %for.body1049 1050for.exit:1051 tail call void asm "nop", ""()1052 br label %if.end1053 1054if.else: ; preds = %entry1055 %mul = shl nsw i32 %N, 11056 br label %if.end1057 1058if.end: ; preds = %for.body, %if.else1059 %sum.0 = phi i32 [ %mul, %if.else ], [ 0, %for.exit ]1060 ret i32 %sum.01061}1062 1063; Check that we handle calls to variadic functions correctly.1064define i32 @callVariadicFunc(i32 %cond, i32 %N) {1065; ENABLE-V4T-LABEL: callVariadicFunc:1066; ENABLE-V4T: @ %bb.0: @ %entry1067; ENABLE-V4T-NEXT: cmp r0, #01068; ENABLE-V4T-NEXT: beq LBB8_21069; ENABLE-V4T-NEXT: @ %bb.1: @ %if.then1070; ENABLE-V4T-NEXT: push {r4, lr}1071; ENABLE-V4T-NEXT: .cfi_def_cfa_offset 81072; ENABLE-V4T-NEXT: .cfi_offset lr, -41073; ENABLE-V4T-NEXT: .cfi_offset r4, -81074; ENABLE-V4T-NEXT: sub sp, #161075; ENABLE-V4T-NEXT: .cfi_def_cfa_offset 241076; ENABLE-V4T-NEXT: str r1, [sp]1077; ENABLE-V4T-NEXT: str r1, [sp, #4]1078; ENABLE-V4T-NEXT: str r1, [sp, #8]1079; ENABLE-V4T-NEXT: ldr r0, LCPI8_01080; ENABLE-V4T-NEXT: LPC8_0:1081; ENABLE-V4T-NEXT: add r0, pc1082; ENABLE-V4T-NEXT: ldr r4, [r0]1083; ENABLE-V4T-NEXT: movs r0, r11084; ENABLE-V4T-NEXT: movs r2, r11085; ENABLE-V4T-NEXT: movs r3, r11086; ENABLE-V4T-NEXT: bl Ltmp21087; ENABLE-V4T-NEXT: lsls r0, r0, #31088; ENABLE-V4T-NEXT: add sp, #161089; ENABLE-V4T-NEXT: pop {r4}1090; ENABLE-V4T-NEXT: pop {r1}1091; ENABLE-V4T-NEXT: bx r11092; ENABLE-V4T-NEXT: LBB8_2: @ %if.else1093; ENABLE-V4T-NEXT: lsls r0, r1, #11094; ENABLE-V4T-NEXT: bx lr1095; ENABLE-V4T-NEXT: .p2align 21096; ENABLE-V4T-NEXT: @ %bb.3:1097; ENABLE-V4T-NEXT: .data_region1098; ENABLE-V4T-NEXT: LCPI8_0:1099; ENABLE-V4T-NEXT: .long L_someVariadicFunc$non_lazy_ptr-(LPC8_0+4)1100; ENABLE-V4T-NEXT: .end_data_region1101;1102; ENABLE-V5T-LABEL: callVariadicFunc:1103; ENABLE-V5T: @ %bb.0: @ %entry1104; ENABLE-V5T-NEXT: cmp r0, #01105; ENABLE-V5T-NEXT: beq LBB8_21106; ENABLE-V5T-NEXT: @ %bb.1: @ %if.then1107; ENABLE-V5T-NEXT: push {r7, lr}1108; ENABLE-V5T-NEXT: .cfi_def_cfa_offset 81109; ENABLE-V5T-NEXT: .cfi_offset lr, -41110; ENABLE-V5T-NEXT: .cfi_offset r7, -81111; ENABLE-V5T-NEXT: sub sp, #161112; ENABLE-V5T-NEXT: .cfi_def_cfa_offset 241113; ENABLE-V5T-NEXT: str r1, [sp]1114; ENABLE-V5T-NEXT: str r1, [sp, #4]1115; ENABLE-V5T-NEXT: str r1, [sp, #8]1116; ENABLE-V5T-NEXT: movs r0, r11117; ENABLE-V5T-NEXT: movs r2, r11118; ENABLE-V5T-NEXT: movs r3, r11119; ENABLE-V5T-NEXT: bl _someVariadicFunc1120; ENABLE-V5T-NEXT: lsls r0, r0, #31121; ENABLE-V5T-NEXT: add sp, #161122; ENABLE-V5T-NEXT: pop {r7, pc}1123; ENABLE-V5T-NEXT: LBB8_2: @ %if.else1124; ENABLE-V5T-NEXT: lsls r0, r1, #11125; ENABLE-V5T-NEXT: LBB8_3: @ %if.end1126; ENABLE-V5T-NEXT: bx lr1127;1128; DISABLE-V4T-LABEL: callVariadicFunc:1129; DISABLE-V4T: @ %bb.0: @ %entry1130; DISABLE-V4T-NEXT: push {r4, lr}1131; DISABLE-V4T-NEXT: .cfi_def_cfa_offset 81132; DISABLE-V4T-NEXT: .cfi_offset lr, -41133; DISABLE-V4T-NEXT: .cfi_offset r4, -81134; DISABLE-V4T-NEXT: sub sp, #161135; DISABLE-V4T-NEXT: .cfi_def_cfa_offset 241136; DISABLE-V4T-NEXT: cmp r0, #01137; DISABLE-V4T-NEXT: beq LBB8_21138; DISABLE-V4T-NEXT: @ %bb.1: @ %if.then1139; DISABLE-V4T-NEXT: str r1, [sp]1140; DISABLE-V4T-NEXT: str r1, [sp, #4]1141; DISABLE-V4T-NEXT: str r1, [sp, #8]1142; DISABLE-V4T-NEXT: ldr r0, LCPI8_01143; DISABLE-V4T-NEXT: LPC8_0:1144; DISABLE-V4T-NEXT: add r0, pc1145; DISABLE-V4T-NEXT: ldr r4, [r0]1146; DISABLE-V4T-NEXT: movs r0, r11147; DISABLE-V4T-NEXT: movs r2, r11148; DISABLE-V4T-NEXT: movs r3, r11149; DISABLE-V4T-NEXT: bl Ltmp21150; DISABLE-V4T-NEXT: lsls r0, r0, #31151; DISABLE-V4T-NEXT: b LBB8_31152; DISABLE-V4T-NEXT: LBB8_2: @ %if.else1153; DISABLE-V4T-NEXT: lsls r0, r1, #11154; DISABLE-V4T-NEXT: LBB8_3: @ %if.end1155; DISABLE-V4T-NEXT: add sp, #161156; DISABLE-V4T-NEXT: pop {r4}1157; DISABLE-V4T-NEXT: pop {r1}1158; DISABLE-V4T-NEXT: bx r11159; DISABLE-V4T-NEXT: .p2align 21160; DISABLE-V4T-NEXT: @ %bb.4:1161; DISABLE-V4T-NEXT: .data_region1162; DISABLE-V4T-NEXT: LCPI8_0:1163; DISABLE-V4T-NEXT: .long L_someVariadicFunc$non_lazy_ptr-(LPC8_0+4)1164; DISABLE-V4T-NEXT: .end_data_region1165;1166; DISABLE-V5T-LABEL: callVariadicFunc:1167; DISABLE-V5T: @ %bb.0: @ %entry1168; DISABLE-V5T-NEXT: push {r7, lr}1169; DISABLE-V5T-NEXT: .cfi_def_cfa_offset 81170; DISABLE-V5T-NEXT: .cfi_offset lr, -41171; DISABLE-V5T-NEXT: .cfi_offset r7, -81172; DISABLE-V5T-NEXT: sub sp, #161173; DISABLE-V5T-NEXT: .cfi_def_cfa_offset 241174; DISABLE-V5T-NEXT: cmp r0, #01175; DISABLE-V5T-NEXT: beq LBB8_21176; DISABLE-V5T-NEXT: @ %bb.1: @ %if.then1177; DISABLE-V5T-NEXT: str r1, [sp]1178; DISABLE-V5T-NEXT: str r1, [sp, #4]1179; DISABLE-V5T-NEXT: str r1, [sp, #8]1180; DISABLE-V5T-NEXT: movs r0, r11181; DISABLE-V5T-NEXT: movs r2, r11182; DISABLE-V5T-NEXT: movs r3, r11183; DISABLE-V5T-NEXT: bl _someVariadicFunc1184; DISABLE-V5T-NEXT: lsls r0, r0, #31185; DISABLE-V5T-NEXT: add sp, #161186; DISABLE-V5T-NEXT: pop {r7, pc}1187; DISABLE-V5T-NEXT: LBB8_2: @ %if.else1188; DISABLE-V5T-NEXT: lsls r0, r1, #11189; DISABLE-V5T-NEXT: add sp, #161190; DISABLE-V5T-NEXT: pop {r7, pc}1191entry:1192 %tobool = icmp eq i32 %cond, 01193 br i1 %tobool, label %if.else, label %if.then1194 1195if.then: ; preds = %entry1196 %call = tail call i32 (i32, ...) @someVariadicFunc(i32 %N, i32 %N, i32 %N, i32 %N, i32 %N, i32 %N, i32 %N)1197 %shl = shl i32 %call, 31198 br label %if.end1199 1200if.else: ; preds = %entry1201 %mul = shl nsw i32 %N, 11202 br label %if.end1203 1204if.end: ; preds = %if.else, %if.then1205 %sum.0 = phi i32 [ %shl, %if.then ], [ %mul, %if.else ]1206 ret i32 %sum.01207}1208 1209declare i32 @someVariadicFunc(i32, ...)1210 1211; Make sure we do not insert unreachable code after noreturn function.1212; Although this is not incorrect to insert such code, it is useless1213; and it hurts the binary size.1214;1215define i32 @noreturn(i8 signext %bad_thing) {1216; ENABLE-V4T-LABEL: noreturn:1217; ENABLE-V4T: @ %bb.0: @ %entry1218; ENABLE-V4T-NEXT: cmp r0, #01219; ENABLE-V4T-NEXT: bne LBB9_21220; ENABLE-V4T-NEXT: @ %bb.1: @ %if.end1221; ENABLE-V4T-NEXT: movs r0, #421222; ENABLE-V4T-NEXT: bx lr1223; ENABLE-V4T-NEXT: LBB9_2: @ %if.abort1224; ENABLE-V4T-NEXT: push {r4, lr}1225; ENABLE-V4T-NEXT: .cfi_def_cfa_offset 81226; ENABLE-V4T-NEXT: .cfi_offset lr, -41227; ENABLE-V4T-NEXT: .cfi_offset r4, -81228; ENABLE-V4T-NEXT: ldr r0, LCPI9_01229; ENABLE-V4T-NEXT: LPC9_0:1230; ENABLE-V4T-NEXT: add r0, pc1231; ENABLE-V4T-NEXT: ldr r0, [r0]1232; ENABLE-V4T-NEXT: @ InlineAsm Start1233; ENABLE-V4T-NEXT: movs r1, #11234; ENABLE-V4T-NEXT: @ InlineAsm End1235; ENABLE-V4T-NEXT: bl Ltmp31236; ENABLE-V4T-NEXT: .p2align 21237; ENABLE-V4T-NEXT: @ %bb.3:1238; ENABLE-V4T-NEXT: .data_region1239; ENABLE-V4T-NEXT: LCPI9_0:1240; ENABLE-V4T-NEXT: .long L_abort$non_lazy_ptr-(LPC9_0+4)1241; ENABLE-V4T-NEXT: .end_data_region1242;1243; ENABLE-V5T-LABEL: noreturn:1244; ENABLE-V5T: @ %bb.0: @ %entry1245; ENABLE-V5T-NEXT: cmp r0, #01246; ENABLE-V5T-NEXT: bne LBB9_21247; ENABLE-V5T-NEXT: @ %bb.1: @ %if.end1248; ENABLE-V5T-NEXT: movs r0, #421249; ENABLE-V5T-NEXT: bx lr1250; ENABLE-V5T-NEXT: LBB9_2: @ %if.abort1251; ENABLE-V5T-NEXT: push {r4, lr}1252; ENABLE-V5T-NEXT: .cfi_def_cfa_offset 81253; ENABLE-V5T-NEXT: .cfi_offset lr, -41254; ENABLE-V5T-NEXT: .cfi_offset r4, -81255; ENABLE-V5T-NEXT: @ InlineAsm Start1256; ENABLE-V5T-NEXT: movs r0, #11257; ENABLE-V5T-NEXT: @ InlineAsm End1258; ENABLE-V5T-NEXT: bl _abort1259;1260; DISABLE-V4T-LABEL: noreturn:1261; DISABLE-V4T: @ %bb.0: @ %entry1262; DISABLE-V4T-NEXT: push {r4, lr}1263; DISABLE-V4T-NEXT: .cfi_def_cfa_offset 81264; DISABLE-V4T-NEXT: .cfi_offset lr, -41265; DISABLE-V4T-NEXT: .cfi_offset r4, -81266; DISABLE-V4T-NEXT: cmp r0, #01267; DISABLE-V4T-NEXT: bne LBB9_21268; DISABLE-V4T-NEXT: @ %bb.1: @ %if.end1269; DISABLE-V4T-NEXT: movs r0, #421270; DISABLE-V4T-NEXT: pop {r4}1271; DISABLE-V4T-NEXT: pop {r1}1272; DISABLE-V4T-NEXT: bx r11273; DISABLE-V4T-NEXT: LBB9_2: @ %if.abort1274; DISABLE-V4T-NEXT: ldr r0, LCPI9_01275; DISABLE-V4T-NEXT: LPC9_0:1276; DISABLE-V4T-NEXT: add r0, pc1277; DISABLE-V4T-NEXT: ldr r0, [r0]1278; DISABLE-V4T-NEXT: @ InlineAsm Start1279; DISABLE-V4T-NEXT: movs r1, #11280; DISABLE-V4T-NEXT: @ InlineAsm End1281; DISABLE-V4T-NEXT: bl Ltmp31282; DISABLE-V4T-NEXT: .p2align 21283; DISABLE-V4T-NEXT: @ %bb.3:1284; DISABLE-V4T-NEXT: .data_region1285; DISABLE-V4T-NEXT: LCPI9_0:1286; DISABLE-V4T-NEXT: .long L_abort$non_lazy_ptr-(LPC9_0+4)1287; DISABLE-V4T-NEXT: .end_data_region1288;1289; DISABLE-V5T-LABEL: noreturn:1290; DISABLE-V5T: @ %bb.0: @ %entry1291; DISABLE-V5T-NEXT: push {r4, lr}1292; DISABLE-V5T-NEXT: .cfi_def_cfa_offset 81293; DISABLE-V5T-NEXT: .cfi_offset lr, -41294; DISABLE-V5T-NEXT: .cfi_offset r4, -81295; DISABLE-V5T-NEXT: cmp r0, #01296; DISABLE-V5T-NEXT: bne LBB9_21297; DISABLE-V5T-NEXT: @ %bb.1: @ %if.end1298; DISABLE-V5T-NEXT: movs r0, #421299; DISABLE-V5T-NEXT: pop {r4, pc}1300; DISABLE-V5T-NEXT: LBB9_2: @ %if.abort1301; DISABLE-V5T-NEXT: @ InlineAsm Start1302; DISABLE-V5T-NEXT: movs r0, #11303; DISABLE-V5T-NEXT: @ InlineAsm End1304; DISABLE-V5T-NEXT: bl _abort1305entry:1306 %tobool = icmp eq i8 %bad_thing, 01307 br i1 %tobool, label %if.end, label %if.abort1308 1309if.abort:1310 %call = tail call i32 asm sideeffect "movs $0, #1", "=r,~{r4}"()1311 tail call void @abort() #01312 unreachable1313 1314if.end:1315 ret i32 421316}1317 1318declare void @abort() #01319 1320define i32 @b_to_bx(i32 %value) {1321; ENABLE-V4T-LABEL: b_to_bx:1322; ENABLE-V4T: @ %bb.0: @ %entry1323; ENABLE-V4T-NEXT: movs r1, r01324; ENABLE-V4T-NEXT: cmp r0, #491325; ENABLE-V4T-NEXT: bgt LBB10_21326; ENABLE-V4T-NEXT: @ %bb.1: @ %if.then1327; ENABLE-V4T-NEXT: push {r7, lr}1328; ENABLE-V4T-NEXT: .cfi_def_cfa_offset 81329; ENABLE-V4T-NEXT: .cfi_offset lr, -41330; ENABLE-V4T-NEXT: .cfi_offset r7, -81331; ENABLE-V4T-NEXT: ldr r0, LCPI10_01332; ENABLE-V4T-NEXT: ldr r2, LCPI10_11333; ENABLE-V4T-NEXT: LPC10_0:1334; ENABLE-V4T-NEXT: add r2, pc1335; ENABLE-V4T-NEXT: bl Ltmp41336; ENABLE-V4T-NEXT: pop {r7}1337; ENABLE-V4T-NEXT: pop {r1}1338; ENABLE-V4T-NEXT: bx r11339; ENABLE-V4T-NEXT: LBB10_2: @ %if.else1340; ENABLE-V4T-NEXT: lsls r0, r1, #11341; ENABLE-V4T-NEXT: bx lr1342; ENABLE-V4T-NEXT: .p2align 21343; ENABLE-V4T-NEXT: @ %bb.3:1344; ENABLE-V4T-NEXT: .data_region1345; ENABLE-V4T-NEXT: LCPI10_0:1346; ENABLE-V4T-NEXT: .long 5000 @ 0x13881347; ENABLE-V4T-NEXT: LCPI10_1:1348; ENABLE-V4T-NEXT: .long ___divsi3-(LPC10_0+4)1349; ENABLE-V4T-NEXT: .end_data_region1350;1351; ENABLE-V5T-LABEL: b_to_bx:1352; ENABLE-V5T: @ %bb.0: @ %entry1353; ENABLE-V5T-NEXT: movs r1, r01354; ENABLE-V5T-NEXT: cmp r0, #491355; ENABLE-V5T-NEXT: bgt LBB10_21356; ENABLE-V5T-NEXT: @ %bb.1: @ %if.then1357; ENABLE-V5T-NEXT: push {r7, lr}1358; ENABLE-V5T-NEXT: .cfi_def_cfa_offset 81359; ENABLE-V5T-NEXT: .cfi_offset lr, -41360; ENABLE-V5T-NEXT: .cfi_offset r7, -81361; ENABLE-V5T-NEXT: ldr r0, LCPI10_01362; ENABLE-V5T-NEXT: bl ___divsi31363; ENABLE-V5T-NEXT: pop {r7, pc}1364; ENABLE-V5T-NEXT: LBB10_2: @ %if.else1365; ENABLE-V5T-NEXT: lsls r0, r1, #11366; ENABLE-V5T-NEXT: LBB10_3: @ %if.end1367; ENABLE-V5T-NEXT: bx lr1368; ENABLE-V5T-NEXT: .p2align 21369; ENABLE-V5T-NEXT: @ %bb.4:1370; ENABLE-V5T-NEXT: .data_region1371; ENABLE-V5T-NEXT: LCPI10_0:1372; ENABLE-V5T-NEXT: .long 5000 @ 0x13881373; ENABLE-V5T-NEXT: .end_data_region1374;1375; DISABLE-V4T-LABEL: b_to_bx:1376; DISABLE-V4T: @ %bb.0: @ %entry1377; DISABLE-V4T-NEXT: push {r7, lr}1378; DISABLE-V4T-NEXT: .cfi_def_cfa_offset 81379; DISABLE-V4T-NEXT: .cfi_offset lr, -41380; DISABLE-V4T-NEXT: .cfi_offset r7, -81381; DISABLE-V4T-NEXT: movs r1, r01382; DISABLE-V4T-NEXT: cmp r0, #491383; DISABLE-V4T-NEXT: bgt LBB10_21384; DISABLE-V4T-NEXT: @ %bb.1: @ %if.then1385; DISABLE-V4T-NEXT: ldr r0, LCPI10_01386; DISABLE-V4T-NEXT: ldr r2, LCPI10_11387; DISABLE-V4T-NEXT: LPC10_0:1388; DISABLE-V4T-NEXT: add r2, pc1389; DISABLE-V4T-NEXT: bl Ltmp41390; DISABLE-V4T-NEXT: b LBB10_31391; DISABLE-V4T-NEXT: LBB10_2: @ %if.else1392; DISABLE-V4T-NEXT: lsls r0, r1, #11393; DISABLE-V4T-NEXT: LBB10_3: @ %if.end1394; DISABLE-V4T-NEXT: pop {r7}1395; DISABLE-V4T-NEXT: pop {r1}1396; DISABLE-V4T-NEXT: bx r11397; DISABLE-V4T-NEXT: .p2align 21398; DISABLE-V4T-NEXT: @ %bb.4:1399; DISABLE-V4T-NEXT: .data_region1400; DISABLE-V4T-NEXT: LCPI10_0:1401; DISABLE-V4T-NEXT: .long 5000 @ 0x13881402; DISABLE-V4T-NEXT: LCPI10_1:1403; DISABLE-V4T-NEXT: .long ___divsi3-(LPC10_0+4)1404; DISABLE-V4T-NEXT: .end_data_region1405;1406; DISABLE-V5T-LABEL: b_to_bx:1407; DISABLE-V5T: @ %bb.0: @ %entry1408; DISABLE-V5T-NEXT: push {r7, lr}1409; DISABLE-V5T-NEXT: .cfi_def_cfa_offset 81410; DISABLE-V5T-NEXT: .cfi_offset lr, -41411; DISABLE-V5T-NEXT: .cfi_offset r7, -81412; DISABLE-V5T-NEXT: movs r1, r01413; DISABLE-V5T-NEXT: cmp r0, #491414; DISABLE-V5T-NEXT: bgt LBB10_21415; DISABLE-V5T-NEXT: @ %bb.1: @ %if.then1416; DISABLE-V5T-NEXT: ldr r0, LCPI10_01417; DISABLE-V5T-NEXT: bl ___divsi31418; DISABLE-V5T-NEXT: pop {r7, pc}1419; DISABLE-V5T-NEXT: LBB10_2: @ %if.else1420; DISABLE-V5T-NEXT: lsls r0, r1, #11421; DISABLE-V5T-NEXT: pop {r7, pc}1422; DISABLE-V5T-NEXT: .p2align 21423; DISABLE-V5T-NEXT: @ %bb.3:1424; DISABLE-V5T-NEXT: .data_region1425; DISABLE-V5T-NEXT: LCPI10_0:1426; DISABLE-V5T-NEXT: .long 5000 @ 0x13881427; DISABLE-V5T-NEXT: .end_data_region1428entry:1429 %cmp = icmp slt i32 %value, 501430 br i1 %cmp, label %if.then, label %if.else1431 1432if.then:1433 %div = sdiv i32 5000, %value1434 br label %if.end1435 1436if.else:1437 %mul = shl nsw i32 %value, 11438 br label %if.end1439 1440if.end:1441 %value.addr.0 = phi i32 [ %div, %if.then ], [ %mul, %if.else ]1442 ret i32 %value.addr.01443}1444 1445define i1 @beq_to_bx(ptr %y, i32 %head) {1446; ENABLE-V4T-LABEL: beq_to_bx:1447; ENABLE-V4T: @ %bb.0: @ %entry1448; ENABLE-V4T-NEXT: movs r2, r01449; ENABLE-V4T-NEXT: movs r0, #11450; ENABLE-V4T-NEXT: cmp r2, #01451; ENABLE-V4T-NEXT: beq LBB11_31452; ENABLE-V4T-NEXT: @ %bb.1: @ %if.end1453; ENABLE-V4T-NEXT: push {r4, lr}1454; ENABLE-V4T-NEXT: .cfi_def_cfa_offset 81455; ENABLE-V4T-NEXT: .cfi_offset lr, -41456; ENABLE-V4T-NEXT: .cfi_offset r4, -81457; ENABLE-V4T-NEXT: ldr r3, [r2]1458; ENABLE-V4T-NEXT: lsls r4, r3, #301459; ENABLE-V4T-NEXT: ldr r4, [sp, #4]1460; ENABLE-V4T-NEXT: mov lr, r41461; ENABLE-V4T-NEXT: pop {r4}1462; ENABLE-V4T-NEXT: add sp, #41463; ENABLE-V4T-NEXT: bpl LBB11_31464; ENABLE-V4T-NEXT: @ %bb.2: @ %if.end41465; ENABLE-V4T-NEXT: str r1, [r2]1466; ENABLE-V4T-NEXT: str r3, [r2]1467; ENABLE-V4T-NEXT: movs r0, #01468; ENABLE-V4T-NEXT: LBB11_3: @ %cleanup1469; ENABLE-V4T-NEXT: bx lr1470;1471; ENABLE-V5T-LABEL: beq_to_bx:1472; ENABLE-V5T: @ %bb.0: @ %entry1473; ENABLE-V5T-NEXT: movs r2, r01474; ENABLE-V5T-NEXT: movs r0, #11475; ENABLE-V5T-NEXT: cmp r2, #01476; ENABLE-V5T-NEXT: beq LBB11_31477; ENABLE-V5T-NEXT: @ %bb.1: @ %if.end1478; ENABLE-V5T-NEXT: push {r4, lr}1479; ENABLE-V5T-NEXT: .cfi_def_cfa_offset 81480; ENABLE-V5T-NEXT: .cfi_offset lr, -41481; ENABLE-V5T-NEXT: .cfi_offset r4, -81482; ENABLE-V5T-NEXT: ldr r3, [r2]1483; ENABLE-V5T-NEXT: lsls r4, r3, #301484; ENABLE-V5T-NEXT: ldr r4, [sp, #4]1485; ENABLE-V5T-NEXT: mov lr, r41486; ENABLE-V5T-NEXT: pop {r4}1487; ENABLE-V5T-NEXT: add sp, #41488; ENABLE-V5T-NEXT: bpl LBB11_31489; ENABLE-V5T-NEXT: @ %bb.2: @ %if.end41490; ENABLE-V5T-NEXT: str r1, [r2]1491; ENABLE-V5T-NEXT: str r3, [r2]1492; ENABLE-V5T-NEXT: movs r0, #01493; ENABLE-V5T-NEXT: LBB11_3: @ %cleanup1494; ENABLE-V5T-NEXT: bx lr1495;1496; DISABLE-V4T-LABEL: beq_to_bx:1497; DISABLE-V4T: @ %bb.0: @ %entry1498; DISABLE-V4T-NEXT: push {r4, lr}1499; DISABLE-V4T-NEXT: .cfi_def_cfa_offset 81500; DISABLE-V4T-NEXT: .cfi_offset lr, -41501; DISABLE-V4T-NEXT: .cfi_offset r4, -81502; DISABLE-V4T-NEXT: movs r2, r01503; DISABLE-V4T-NEXT: movs r0, #11504; DISABLE-V4T-NEXT: cmp r2, #01505; DISABLE-V4T-NEXT: beq LBB11_31506; DISABLE-V4T-NEXT: @ %bb.1: @ %if.end1507; DISABLE-V4T-NEXT: ldr r3, [r2]1508; DISABLE-V4T-NEXT: lsls r4, r3, #301509; DISABLE-V4T-NEXT: bpl LBB11_31510; DISABLE-V4T-NEXT: @ %bb.2: @ %if.end41511; DISABLE-V4T-NEXT: str r1, [r2]1512; DISABLE-V4T-NEXT: str r3, [r2]1513; DISABLE-V4T-NEXT: movs r0, #01514; DISABLE-V4T-NEXT: LBB11_3: @ %cleanup1515; DISABLE-V4T-NEXT: pop {r4}1516; DISABLE-V4T-NEXT: pop {r1}1517; DISABLE-V4T-NEXT: bx r11518;1519; DISABLE-V5T-LABEL: beq_to_bx:1520; DISABLE-V5T: @ %bb.0: @ %entry1521; DISABLE-V5T-NEXT: push {r4, lr}1522; DISABLE-V5T-NEXT: .cfi_def_cfa_offset 81523; DISABLE-V5T-NEXT: .cfi_offset lr, -41524; DISABLE-V5T-NEXT: .cfi_offset r4, -81525; DISABLE-V5T-NEXT: movs r2, r01526; DISABLE-V5T-NEXT: movs r0, #11527; DISABLE-V5T-NEXT: cmp r2, #01528; DISABLE-V5T-NEXT: beq LBB11_31529; DISABLE-V5T-NEXT: @ %bb.1: @ %if.end1530; DISABLE-V5T-NEXT: ldr r3, [r2]1531; DISABLE-V5T-NEXT: lsls r4, r3, #301532; DISABLE-V5T-NEXT: bpl LBB11_31533; DISABLE-V5T-NEXT: @ %bb.2: @ %if.end41534; DISABLE-V5T-NEXT: str r1, [r2]1535; DISABLE-V5T-NEXT: str r3, [r2]1536; DISABLE-V5T-NEXT: movs r0, #01537; DISABLE-V5T-NEXT: LBB11_3: @ %cleanup1538; DISABLE-V5T-NEXT: pop {r4, pc}1539entry:1540 %cmp = icmp eq ptr %y, null1541 br i1 %cmp, label %cleanup, label %if.end1542 1543if.end:1544 %z = load i32, ptr %y, align 41545 %and = and i32 %z, 21546 %cmp2 = icmp eq i32 %and, 01547 br i1 %cmp2, label %cleanup, label %if.end41548 1549if.end4:1550 store i32 %head, ptr %y, align 41551 store volatile i32 %z, ptr %y, align 41552 br label %cleanup1553 1554cleanup:1555 %retval.0 = phi i1 [ 0, %if.end4 ], [ 1, %entry ], [ 1, %if.end ]1556 ret i1 %retval.01557}1558 1559attributes #0 = { noreturn nounwind }1560