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1; RUN: llc < %s -mtriple=thumbv7-apple-darwin -O3 -relocation-model=pic -frame-pointer=all -mcpu=cortex-a82; rdar://81108423 4declare arm_apcscc i32 @__maskrune(i32, i32)5 6define arm_apcscc i32 @strncmpic(ptr nocapture %s1, ptr nocapture %s2, i32 %n) nounwind {7entry:8 br i1 undef, label %bb11, label %bb199 10bb11: ; preds = %entry11 %0 = sext i8 0 to i32 ; <i32> [#uses=1]12 br i1 undef, label %bb.i.i10, label %bb1.i.i1113 14bb.i.i10: ; preds = %bb1115 br label %isupper144.exit1216 17bb1.i.i11: ; preds = %bb1118 %1 = tail call arm_apcscc i32 @__maskrune(i32 %0, i32 32768) nounwind ; <i32> [#uses=1]19 %2 = icmp ne i32 %1, 0 ; <i1> [#uses=1]20 %3 = zext i1 %2 to i32 ; <i32> [#uses=1]21 %.pre = load i8, ptr undef, align 1 ; <i8> [#uses=1]22 br label %isupper144.exit1223 24isupper144.exit12: ; preds = %bb1.i.i11, %bb.i.i1025 %4 = phi i8 [ %.pre, %bb1.i.i11 ], [ 0, %bb.i.i10 ] ; <i8> [#uses=1]26 %5 = phi i32 [ %3, %bb1.i.i11 ], [ undef, %bb.i.i10 ] ; <i32> [#uses=1]27 %6 = icmp eq i32 %5, 0 ; <i1> [#uses=1]28 %7 = sext i8 %4 to i32 ; <i32> [#uses=1]29 %storemerge1 = select i1 %6, i32 %7, i32 undef ; <i32> [#uses=1]30 %8 = sub nsw i32 %storemerge1, 0 ; <i32> [#uses=1]31 ret i32 %832 33bb19: ; preds = %entry34 ret i32 035}36