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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve -run-pass=arm-low-overhead-loops %s -o - | FileCheck %s3 4--- |5 %struct.arm_biquad_casd_df1_inst_q31 = type { ptr, ptr, i32, i32 }6 7 define hidden void @arm_biquad_cascade_df1_q31(ptr nocapture readonly %arg, ptr nocapture readonly %arg1, ptr nocapture %arg2, i32 %arg3) {8 bb:9 %i = bitcast ptr %arg to ptr10 %i4 = load ptr, ptr %i, align 411 %i5 = getelementptr inbounds %struct.arm_biquad_casd_df1_inst_q31, ptr %arg, i32 0, i32 112 %i6 = load ptr, ptr %i5, align 413 %i7 = getelementptr inbounds %struct.arm_biquad_casd_df1_inst_q31, ptr %arg, i32 0, i32 214 %i8 = load i32, ptr %i7, align 415 %i9 = sub i32 31, %i816 %i10 = getelementptr inbounds %struct.arm_biquad_casd_df1_inst_q31, ptr %arg, i32 0, i32 317 %i11 = load i32, ptr %i10, align 418 br label %bb1219 20 bb12: ; preds = %bb74, %bb21 %i13 = phi ptr [ %i6, %bb ], [ %i18, %bb74 ]22 %i14 = phi ptr [ %i4, %bb ], [ %i85, %bb74 ]23 %i15 = phi ptr [ %arg1, %bb ], [ %arg2, %bb74 ]24 %i16 = phi i32 [ %i11, %bb ], [ %i89, %bb74 ]25 %i18 = getelementptr inbounds i32, ptr %i13, i32 526 %i19 = load i32, ptr %i14, align 427 %i20 = getelementptr inbounds i32, ptr %i14, i32 128 %i21 = load i32, ptr %i20, align 429 %i22 = getelementptr inbounds i32, ptr %i14, i32 230 %i23 = load i32, ptr %i22, align 431 %i24 = getelementptr inbounds i32, ptr %i14, i32 332 %i25 = load i32, ptr %i24, align 433 %i26 = call i1 @llvm.test.set.loop.iterations.i32(i32 %arg3)34 br i1 %i26, label %bb27, label %bb7435 36 bb27: ; preds = %bb1237 %i28 = getelementptr inbounds i32, ptr %i13, i32 438 %i29 = load i32, ptr %i28, align 439 %i30 = getelementptr inbounds i32, ptr %i13, i32 340 %i31 = load i32, ptr %i30, align 441 %i32 = getelementptr inbounds i32, ptr %i13, i32 242 %i33 = load i32, ptr %i32, align 443 %i34 = getelementptr inbounds i32, ptr %i13, i32 144 %i35 = load i32, ptr %i34, align 445 %i36 = load i32, ptr %i13, align 446 br label %bb3747 48 bb37: ; preds = %bb37, %bb2749 %lsr.iv = phi i32 [ %lsr.iv.next, %bb37 ], [ %arg3, %bb27 ]50 %i38 = phi ptr [ %i15, %bb27 ], [ %i51, %bb37 ]51 %i39 = phi ptr [ %arg2, %bb27 ], [ %i69, %bb37 ]52 %i40 = phi i32 [ %i25, %bb27 ], [ %i41, %bb37 ]53 %i41 = phi i32 [ %i23, %bb27 ], [ %i68, %bb37 ]54 %i42 = phi i32 [ %i21, %bb27 ], [ %i43, %bb37 ]55 %i43 = phi i32 [ %i19, %bb27 ], [ %i52, %bb37 ]56 %i45 = sext i32 %i29 to i6457 %i46 = sext i32 %i31 to i6458 %i47 = sext i32 %i33 to i6459 %i48 = sext i32 %i35 to i6460 %i49 = sext i32 %i36 to i6461 %i50 = zext i32 %i9 to i6462 %i51 = getelementptr inbounds i32, ptr %i38, i32 163 %i52 = load i32, ptr %i38, align 464 %i53 = sext i32 %i52 to i6465 %i54 = mul nsw i64 %i53, %i4966 %i55 = sext i32 %i43 to i6467 %i56 = mul nsw i64 %i55, %i4868 %i57 = sext i32 %i42 to i6469 %i58 = mul nsw i64 %i57, %i4770 %i59 = sext i32 %i41 to i6471 %i60 = mul nsw i64 %i59, %i4672 %i61 = sext i32 %i40 to i6473 %i62 = mul nsw i64 %i61, %i4574 %i63 = add i64 %i58, %i5675 %i64 = add i64 %i63, %i6076 %i65 = add i64 %i64, %i6277 %i66 = add i64 %i65, %i5478 %i67 = ashr i64 %i66, %i5079 %i68 = trunc i64 %i67 to i3280 %i69 = getelementptr inbounds i32, ptr %i39, i32 181 store i32 %i68, ptr %i39, align 482 %i70 = call i32 @llvm.loop.decrement.reg.i32(i32 %lsr.iv, i32 1)83 %i71 = icmp ne i32 %i70, 084 %lsr.iv.next = add i32 %lsr.iv, -185 br i1 %i71, label %bb37, label %bb7286 87 bb72: ; preds = %bb3788 %i73 = trunc i64 %i67 to i3289 br label %bb7490 91 bb74: ; preds = %bb72, %bb1292 %i75 = phi i32 [ %i19, %bb12 ], [ %i52, %bb72 ]93 %i76 = phi i32 [ %i21, %bb12 ], [ %i43, %bb72 ]94 %i77 = phi i32 [ %i23, %bb12 ], [ %i73, %bb72 ]95 %i78 = phi i32 [ %i25, %bb12 ], [ %i41, %bb72 ]96 store i32 %i75, ptr %i14, align 497 %i79 = bitcast ptr %i14 to ptr98 %i80 = getelementptr inbounds i8, ptr %i79, i32 499 %i81 = bitcast ptr %i80 to ptr100 store i32 %i76, ptr %i81, align 4101 %i82 = bitcast ptr %i14 to ptr102 %i83 = getelementptr inbounds i8, ptr %i82, i32 8103 %i84 = bitcast ptr %i83 to ptr104 store i32 %i77, ptr %i84, align 4105 %i85 = getelementptr inbounds i32, ptr %i14, i32 4106 %i86 = bitcast ptr %i14 to ptr107 %i87 = getelementptr inbounds i8, ptr %i86, i32 12108 %i88 = bitcast ptr %i87 to ptr109 store i32 %i78, ptr %i88, align 4110 %i89 = add i32 %i16, -1111 %i90 = icmp eq i32 %i89, 0112 br i1 %i90, label %bb91, label %bb12113 114 bb91: ; preds = %bb74115 ret void116 }117 118 declare i1 @llvm.test.set.loop.iterations.i32(i32)119 declare i32 @llvm.loop.decrement.reg.i32(i32, i32)120 121...122---123name: arm_biquad_cascade_df1_q31124alignment: 2125tracksRegLiveness: true126registers: []127liveins:128 - { reg: '$r0', virtual-reg: '' }129 - { reg: '$r1', virtual-reg: '' }130 - { reg: '$r2', virtual-reg: '' }131 - { reg: '$r3', virtual-reg: '' }132frameInfo:133 stackSize: 76134 offsetAdjustment: 0135 maxAlignment: 4136 savePoint: []137 restorePoint: []138fixedStack: []139stack:140 - { id: 0, name: '', type: spill-slot, offset: -40, size: 4, alignment: 4,141 stack-id: default, callee-saved-register: '', callee-saved-restored: true,142 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }143 - { id: 1, name: '', type: spill-slot, offset: -44, size: 4, alignment: 4,144 stack-id: default, callee-saved-register: '', callee-saved-restored: true,145 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }146 - { id: 2, name: '', type: spill-slot, offset: -48, size: 4, alignment: 4,147 stack-id: default, callee-saved-register: '', callee-saved-restored: true,148 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }149 - { id: 3, name: '', type: spill-slot, offset: -52, size: 4, alignment: 4,150 stack-id: default, callee-saved-register: '', callee-saved-restored: true,151 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }152 - { id: 4, name: '', type: spill-slot, offset: -56, size: 4, alignment: 4,153 stack-id: default, callee-saved-register: '', callee-saved-restored: true,154 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }155 - { id: 5, name: '', type: spill-slot, offset: -60, size: 4, alignment: 4,156 stack-id: default, callee-saved-register: '', callee-saved-restored: true,157 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }158 - { id: 6, name: '', type: spill-slot, offset: -64, size: 4, alignment: 4,159 stack-id: default, callee-saved-register: '', callee-saved-restored: true,160 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }161 - { id: 7, name: '', type: spill-slot, offset: -68, size: 4, alignment: 4,162 stack-id: default, callee-saved-register: '', callee-saved-restored: true,163 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }164 - { id: 8, name: '', type: spill-slot, offset: -72, size: 4, alignment: 4,165 stack-id: default, callee-saved-register: '', callee-saved-restored: true,166 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }167 - { id: 9, name: '', type: spill-slot, offset: -76, size: 4, alignment: 4,168 stack-id: default, callee-saved-register: '', callee-saved-restored: true,169 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }170 - { id: 10, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,171 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,172 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }173 - { id: 11, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,174 stack-id: default, callee-saved-register: '$r11', callee-saved-restored: true,175 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }176 - { id: 12, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,177 stack-id: default, callee-saved-register: '$r10', callee-saved-restored: true,178 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }179 - { id: 13, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4,180 stack-id: default, callee-saved-register: '$r9', callee-saved-restored: true,181 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }182 - { id: 14, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4,183 stack-id: default, callee-saved-register: '$r8', callee-saved-restored: true,184 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }185 - { id: 15, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4,186 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,187 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }188 - { id: 16, name: '', type: spill-slot, offset: -28, size: 4, alignment: 4,189 stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true,190 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }191 - { id: 17, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4,192 stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true,193 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }194 - { id: 18, name: '', type: spill-slot, offset: -36, size: 4, alignment: 4,195 stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,196 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }197callSites: []198constants: []199machineFunctionInfo: {}200body: |201 ; CHECK-LABEL: name: arm_biquad_cascade_df1_q31202 ; CHECK: bb.0.bb:203 ; CHECK-NEXT: successors: %bb.2(0x80000000)204 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $lr205 ; CHECK-NEXT: {{ $}}206 ; CHECK-NEXT: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr207 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 36208 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4209 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r11, -8210 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r10, -12211 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r9, -16212 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r8, -20213 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -24214 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r6, -28215 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r5, -32216 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r4, -36217 ; CHECK-NEXT: $sp = frame-setup tSUBspi $sp, 10, 14 /* CC::al */, $noreg218 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 76219 ; CHECK-NEXT: $r6, $r5 = t2LDRDi8 $r0, 8, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i7), (load (s32) from %ir.i10)220 ; CHECK-NEXT: $r8 = tMOVr killed $r3, 14 /* CC::al */, $noreg221 ; CHECK-NEXT: $r3, $r7 = t2LDRDi8 killed $r0, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i), (load (s32) from %ir.i5)222 ; CHECK-NEXT: renamable $r0 = t2RSBri killed renamable $r6, 31, 14 /* CC::al */, $noreg, $noreg223 ; CHECK-NEXT: t2STMIA $sp, 14 /* CC::al */, $noreg, killed $r0, $r2, $r8 :: (store (s32) into %stack.9), (store (s32) into %stack.8), (store (s32) into %stack.7)224 ; CHECK-NEXT: $r12 = tMOVr killed $r2, 14 /* CC::al */, $noreg225 ; CHECK-NEXT: renamable $r2 = tLDRspi $sp, 0, 14 /* CC::al */, $noreg :: (load (s32) from %stack.9)226 ; CHECK-NEXT: tB %bb.2, 14 /* CC::al */, $noreg227 ; CHECK-NEXT: {{ $}}228 ; CHECK-NEXT: bb.1.bb74 (align 4):229 ; CHECK-NEXT: successors: %bb.6(0x04000000), %bb.2(0x7c000000)230 ; CHECK-NEXT: liveins: $r0, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r12, $r2231 ; CHECK-NEXT: {{ $}}232 ; CHECK-NEXT: renamable $r7, dead $cpsr = nuw tADDi8 killed renamable $r7, 20, 14 /* CC::al */, $noreg233 ; CHECK-NEXT: t2STRDi8 killed $r9, killed $r4, $r3, 0, 14 /* CC::al */, $noreg :: (store (s32) into %ir.i14), (store (s32) into %ir.i81)234 ; CHECK-NEXT: t2STRDi8 killed $r6, killed $r0, $r3, 8, 14 /* CC::al */, $noreg :: (store (s32) into %ir.i84), (store (s32) into %ir.i88)235 ; CHECK-NEXT: renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 16, 14 /* CC::al */, $noreg236 ; CHECK-NEXT: renamable $r5, $cpsr = tSUBi8 killed renamable $r5, 1, 14 /* CC::al */, $noreg237 ; CHECK-NEXT: $r1 = tMOVr $r12, 14 /* CC::al */, $noreg238 ; CHECK-NEXT: tBcc %bb.6, 0 /* CC::eq */, killed $cpsr239 ; CHECK-NEXT: {{ $}}240 ; CHECK-NEXT: bb.2.bb12:241 ; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.1(0x40000000)242 ; CHECK-NEXT: liveins: $r1, $r2, $r3, $r5, $r7, $r8, $r12243 ; CHECK-NEXT: {{ $}}244 ; CHECK-NEXT: $r9, $r4 = t2LDRDi8 $r3, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i14), (load (s32) from %ir.i20)245 ; CHECK-NEXT: $r6, $r0 = t2LDRDi8 $r3, 8, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i22), (load (s32) from %ir.i24)246 ; CHECK-NEXT: dead $lr = t2SUBri renamable $r8, 0, 14 /* CC::al */, $noreg, def $cpsr247 ; CHECK-NEXT: tBcc %bb.1, 0 /* CC::eq */, killed $cpsr248 ; CHECK-NEXT: tB %bb.3, 14 /* CC::al */, $noreg249 ; CHECK-NEXT: {{ $}}250 ; CHECK-NEXT: bb.3.bb27:251 ; CHECK-NEXT: successors: %bb.4(0x80000000)252 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r12253 ; CHECK-NEXT: {{ $}}254 ; CHECK-NEXT: t2STRDi8 killed $r3, killed $r5, $sp, 12, 14 /* CC::al */, $noreg :: (store (s32) into %stack.6), (store (s32) into %stack.5)255 ; CHECK-NEXT: renamable $r3 = tLDRi renamable $r7, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i13)256 ; CHECK-NEXT: tSTRspi killed renamable $r3, $sp, 9, 14 /* CC::al */, $noreg :: (store (s32) into %stack.0)257 ; CHECK-NEXT: renamable $r3 = tLDRi renamable $r7, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i34)258 ; CHECK-NEXT: tSTRspi killed renamable $r3, $sp, 8, 14 /* CC::al */, $noreg :: (store (s32) into %stack.1)259 ; CHECK-NEXT: renamable $r3 = tLDRi renamable $r7, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i32)260 ; CHECK-NEXT: tSTRspi killed renamable $r3, $sp, 7, 14 /* CC::al */, $noreg :: (store (s32) into %stack.2)261 ; CHECK-NEXT: renamable $r3 = tLDRi renamable $r7, 3, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i30)262 ; CHECK-NEXT: t2STRDi8 $r7, killed $r3, $sp, 20, 14 /* CC::al */, $noreg :: (store (s32) into %stack.4), (store (s32) into %stack.3)263 ; CHECK-NEXT: renamable $r10 = t2LDRi12 killed renamable $r7, 16, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i28)264 ; CHECK-NEXT: {{ $}}265 ; CHECK-NEXT: bb.4.bb37 (align 4):266 ; CHECK-NEXT: successors: %bb.4(0x7c000000), %bb.5(0x04000000)267 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r4, $r6, $r8, $r9, $r10, $r12268 ; CHECK-NEXT: {{ $}}269 ; CHECK-NEXT: $r7 = tMOVr killed $r6, 14 /* CC::al */, $noreg270 ; CHECK-NEXT: renamable $r6 = tLDRspi $sp, 8, 14 /* CC::al */, $noreg :: (load (s32) from %stack.1)271 ; CHECK-NEXT: renamable $r3 = tLDRspi $sp, 7, 14 /* CC::al */, $noreg :: (load (s32) from %stack.2)272 ; CHECK-NEXT: renamable $r6, renamable $r11 = t2SMULL $r9, killed renamable $r6, 14 /* CC::al */, $noreg273 ; CHECK-NEXT: renamable $r6, renamable $r11 = t2SMLAL killed renamable $r4, killed renamable $r3, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg274 ; CHECK-NEXT: renamable $r3 = tLDRspi $sp, 6, 14 /* CC::al */, $noreg :: (load (s32) from %stack.3)275 ; CHECK-NEXT: $r5 = tMOVr killed $r9, 14 /* CC::al */, $noreg276 ; CHECK-NEXT: renamable $r6, renamable $r11 = t2SMLAL renamable $r7, killed renamable $r3, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg277 ; CHECK-NEXT: renamable $r9, renamable $r1 = t2LDR_POST killed renamable $r1, 4, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i38)278 ; CHECK-NEXT: renamable $r6, renamable $r11 = t2SMLAL killed renamable $r0, renamable $r10, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg279 ; CHECK-NEXT: renamable $r0 = tLDRspi $sp, 9, 14 /* CC::al */, $noreg :: (load (s32) from %stack.0)280 ; CHECK-NEXT: $lr = tMOVr $r8, 14 /* CC::al */, $noreg281 ; CHECK-NEXT: renamable $r6, renamable $r11 = t2SMLAL renamable $r9, killed renamable $r0, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg282 ; CHECK-NEXT: early-clobber renamable $r6, dead early-clobber renamable $r11 = MVE_ASRLr killed renamable $r6, killed renamable $r11, renamable $r2, 14 /* CC::al */, $noreg283 ; CHECK-NEXT: early-clobber renamable $r12 = t2STR_POST renamable $r6, killed renamable $r12, 4, 14 /* CC::al */, $noreg :: (store (s32) into %ir.i39)284 ; CHECK-NEXT: dead renamable $lr = t2SUBri killed renamable $lr, 1, 14 /* CC::al */, $noreg, def $cpsr285 ; CHECK-NEXT: renamable $r8 = t2SUBri killed renamable $r8, 1, 14 /* CC::al */, $noreg, $noreg286 ; CHECK-NEXT: $r0 = tMOVr $r7, 14 /* CC::al */, $noreg287 ; CHECK-NEXT: $r4 = tMOVr $r5, 14 /* CC::al */, $noreg288 ; CHECK-NEXT: tBcc %bb.4, 1 /* CC::ne */, killed $cpsr289 ; CHECK-NEXT: tB %bb.5, 14 /* CC::al */, $noreg290 ; CHECK-NEXT: {{ $}}291 ; CHECK-NEXT: bb.5.bb72:292 ; CHECK-NEXT: successors: %bb.1(0x80000000)293 ; CHECK-NEXT: liveins: $r2, $r5, $r6, $r7, $r9294 ; CHECK-NEXT: {{ $}}295 ; CHECK-NEXT: $r0 = tMOVr killed $r7, 14 /* CC::al */, $noreg296 ; CHECK-NEXT: $r7 = tADDrSPi $sp, 3, 14 /* CC::al */, $noreg297 ; CHECK-NEXT: $r4 = tMOVr killed $r5, 14 /* CC::al */, $noreg298 ; CHECK-NEXT: $r12, $r8 = t2LDRDi8 $sp, 4, 14 /* CC::al */, $noreg :: (load (s32) from %stack.8), (load (s32) from %stack.7)299 ; CHECK-NEXT: tLDMIA killed $r7, 14 /* CC::al */, $noreg, def $r3, def $r5, def $r7 :: (load (s32) from %stack.6), (load (s32) from %stack.5), (load (s32) from %stack.4)300 ; CHECK-NEXT: tB %bb.1, 14 /* CC::al */, $noreg301 ; CHECK-NEXT: {{ $}}302 ; CHECK-NEXT: bb.6.bb91:303 ; CHECK-NEXT: $sp = frame-destroy tADDspi $sp, 10, 14 /* CC::al */, $noreg304 ; CHECK-NEXT: $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc305 bb.0.bb:306 successors: %bb.2(0x80000000)307 liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $lr308 309 $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr310 frame-setup CFI_INSTRUCTION def_cfa_offset 36311 frame-setup CFI_INSTRUCTION offset $lr, -4312 frame-setup CFI_INSTRUCTION offset $r11, -8313 frame-setup CFI_INSTRUCTION offset $r10, -12314 frame-setup CFI_INSTRUCTION offset $r9, -16315 frame-setup CFI_INSTRUCTION offset $r8, -20316 frame-setup CFI_INSTRUCTION offset $r7, -24317 frame-setup CFI_INSTRUCTION offset $r6, -28318 frame-setup CFI_INSTRUCTION offset $r5, -32319 frame-setup CFI_INSTRUCTION offset $r4, -36320 $sp = frame-setup tSUBspi $sp, 10, 14 /* CC::al */, $noreg321 frame-setup CFI_INSTRUCTION def_cfa_offset 76322 $r6, $r5 = t2LDRDi8 $r0, 8, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i7), (load (s32) from %ir.i10)323 $r8 = tMOVr killed $r3, 14 /* CC::al */, $noreg324 $r3, $r7 = t2LDRDi8 killed $r0, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i), (load (s32) from %ir.i5)325 renamable $r0 = t2RSBri killed renamable $r6, 31, 14 /* CC::al */, $noreg, $noreg326 t2STMIA $sp, 14 /* CC::al */, $noreg, killed $r0, $r2, $r8 :: (store (s32) into %stack.9), (store (s32) into %stack.8), (store (s32) into %stack.7)327 $r12 = tMOVr killed $r2, 14 /* CC::al */, $noreg328 renamable $r2 = tLDRspi $sp, 0, 14 /* CC::al */, $noreg :: (load (s32) from %stack.9)329 tB %bb.2, 14 /* CC::al */, $noreg330 331 bb.1.bb74 (align 4):332 successors: %bb.6(0x04000000), %bb.2(0x7c000000)333 liveins: $r0, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r12, $r2334 335 renamable $r7, dead $cpsr = nuw tADDi8 killed renamable $r7, 20, 14 /* CC::al */, $noreg336 t2STRDi8 killed $r9, killed $r4, $r3, 0, 14 /* CC::al */, $noreg :: (store (s32) into %ir.i14), (store (s32) into %ir.i81)337 t2STRDi8 killed $r6, killed $r0, $r3, 8, 14 /* CC::al */, $noreg :: (store (s32) into %ir.i84), (store (s32) into %ir.i88)338 renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 16, 14 /* CC::al */, $noreg339 renamable $r5, $cpsr = tSUBi8 killed renamable $r5, 1, 14 /* CC::al */, $noreg340 $r1 = tMOVr $r12, 14 /* CC::al */, $noreg341 tBcc %bb.6, 0 /* CC::eq */, killed $cpsr342 343 bb.2.bb12:344 successors: %bb.3(0x40000000), %bb.1(0x40000000)345 liveins: $r1, $r3, $r5, $r7, $r8, $r12, $r2346 347 $r9, $r4 = t2LDRDi8 $r3, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i14), (load (s32) from %ir.i20)348 $r6, $r0 = t2LDRDi8 $r3, 8, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i22), (load (s32) from %ir.i24)349 $lr = t2WhileLoopStartLR renamable $r8, %bb.1, implicit-def dead $cpsr350 tB %bb.3, 14 /* CC::al */, $noreg351 352 bb.3.bb27:353 successors: %bb.4(0x80000000)354 liveins: $r0, $r1, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r12, $r2355 356 t2STRDi8 killed $r3, killed $r5, $sp, 12, 14 /* CC::al */, $noreg :: (store (s32) into %stack.6), (store (s32) into %stack.5)357 renamable $r3 = tLDRi renamable $r7, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i13)358 tSTRspi killed renamable $r3, $sp, 9, 14 /* CC::al */, $noreg :: (store (s32) into %stack.0)359 renamable $r3 = tLDRi renamable $r7, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i34)360 tSTRspi killed renamable $r3, $sp, 8, 14 /* CC::al */, $noreg :: (store (s32) into %stack.1)361 renamable $r3 = tLDRi renamable $r7, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i32)362 tSTRspi killed renamable $r3, $sp, 7, 14 /* CC::al */, $noreg :: (store (s32) into %stack.2)363 renamable $r3 = tLDRi renamable $r7, 3, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i30)364 t2STRDi8 $r7, killed $r3, $sp, 20, 14 /* CC::al */, $noreg :: (store (s32) into %stack.4), (store (s32) into %stack.3)365 renamable $r10 = t2LDRi12 killed renamable $r7, 16, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i28)366 367 bb.4.bb37 (align 4):368 successors: %bb.4(0x7c000000), %bb.5(0x04000000)369 liveins: $r0, $r1, $r2, $r4, $r6, $r8, $r9, $r10, $r12370 371 $r7 = tMOVr killed $r6, 14 /* CC::al */, $noreg372 renamable $r6 = tLDRspi $sp, 8, 14 /* CC::al */, $noreg :: (load (s32) from %stack.1)373 renamable $r3 = tLDRspi $sp, 7, 14 /* CC::al */, $noreg :: (load (s32) from %stack.2)374 renamable $r6, renamable $r11 = t2SMULL $r9, killed renamable $r6, 14 /* CC::al */, $noreg375 renamable $r6, renamable $r11 = t2SMLAL killed renamable $r4, killed renamable $r3, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg376 renamable $r3 = tLDRspi $sp, 6, 14 /* CC::al */, $noreg :: (load (s32) from %stack.3)377 $r5 = tMOVr killed $r9, 14 /* CC::al */, $noreg378 renamable $r6, renamable $r11 = t2SMLAL renamable $r7, killed renamable $r3, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg379 renamable $r9, renamable $r1 = t2LDR_POST killed renamable $r1, 4, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i38)380 renamable $r6, renamable $r11 = t2SMLAL killed renamable $r0, renamable $r10, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg381 renamable $r0 = tLDRspi $sp, 9, 14 /* CC::al */, $noreg :: (load (s32) from %stack.0)382 $lr = tMOVr $r8, 14 /* CC::al */, $noreg383 renamable $r6, renamable $r11 = t2SMLAL renamable $r9, killed renamable $r0, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg384 early-clobber renamable $r6, dead early-clobber renamable $r11 = MVE_ASRLr killed renamable $r6, killed renamable $r11, renamable $r2, 14 /* CC::al */, $noreg385 early-clobber renamable $r12 = t2STR_POST renamable $r6, killed renamable $r12, 4, 14 /* CC::al */, $noreg :: (store (s32) into %ir.i39)386 renamable $lr = t2LoopDec killed renamable $lr, 1387 renamable $r8 = t2SUBri killed renamable $r8, 1, 14 /* CC::al */, $noreg, $noreg388 $r0 = tMOVr $r7, 14 /* CC::al */, $noreg389 $r4 = tMOVr $r5, 14 /* CC::al */, $noreg390 t2LoopEnd killed renamable $lr, %bb.4, implicit-def dead $cpsr391 tB %bb.5, 14 /* CC::al */, $noreg392 393 bb.5.bb72:394 successors: %bb.1(0x80000000)395 liveins: $r5, $r6, $r7, $r9, $r2396 397 $r0 = tMOVr killed $r7, 14 /* CC::al */, $noreg398 $r7 = tADDrSPi $sp, 3, 14 /* CC::al */, $noreg399 $r4 = tMOVr killed $r5, 14 /* CC::al */, $noreg400 $r12, $r8 = t2LDRDi8 $sp, 4, 14 /* CC::al */, $noreg :: (load (s32) from %stack.8), (load (s32) from %stack.7)401 tLDMIA killed $r7, 14 /* CC::al */, $noreg, def $r3, def $r5, def $r7 :: (load (s32) from %stack.6), (load (s32) from %stack.5), (load (s32) from %stack.4)402 tB %bb.1, 14 /* CC::al */, $noreg403 404 bb.6.bb91:405 $sp = frame-destroy tADDspi $sp, 10, 14 /* CC::al */, $noreg406 $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc407 408...409