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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=thumbv8.1m.main -run-pass=arm-low-overhead-loops %s -o - -verify-machineinstrs | FileCheck %s3--- |4 %struct.arm_biquad_casd_df1_inst_q31 = type { ptr, ptr, i32, i32 }5 6 define hidden void @arm_biquad_cascade_df1_q31(ptr nocapture readonly %arg, ptr nocapture readonly %arg1, ptr nocapture %arg2, i32 %arg3) #0 {7 bb:8 %i = bitcast ptr %arg to ptr9 %i4 = load ptr, ptr %i, align 410 %i5 = getelementptr inbounds %struct.arm_biquad_casd_df1_inst_q31, ptr %arg, i32 0, i32 111 %i6 = load ptr, ptr %i5, align 412 %i7 = getelementptr inbounds %struct.arm_biquad_casd_df1_inst_q31, ptr %arg, i32 0, i32 213 %i8 = load i32, ptr %i7, align 414 %i9 = sub i32 31, %i815 %i10 = getelementptr inbounds %struct.arm_biquad_casd_df1_inst_q31, ptr %arg, i32 0, i32 316 %i11 = load i32, ptr %i10, align 417 br label %bb1218 19 bb12: ; preds = %bb74, %bb20 %i13 = phi ptr [ %i6, %bb ], [ %i18, %bb74 ]21 %i14 = phi ptr [ %i4, %bb ], [ %i85, %bb74 ]22 %i15 = phi ptr [ %arg1, %bb ], [ %arg2, %bb74 ]23 %i16 = phi i32 [ %i11, %bb ], [ %i89, %bb74 ]24 %i18 = getelementptr inbounds i32, ptr %i13, i32 525 %i19 = load i32, ptr %i14, align 426 %i20 = getelementptr inbounds i32, ptr %i14, i32 127 %i21 = load i32, ptr %i20, align 428 %i22 = getelementptr inbounds i32, ptr %i14, i32 229 %i23 = load i32, ptr %i22, align 430 %i24 = getelementptr inbounds i32, ptr %i14, i32 331 %i25 = load i32, ptr %i24, align 432 %i26 = call { i32, i1 } @llvm.test.start.loop.iterations.i32(i32 %arg3)33 %i26.0 = extractvalue { i32, i1 } %i26, 034 %i26.1 = extractvalue { i32, i1 } %i26, 135 br i1 %i26.1, label %bb27, label %bb7436 37 bb27: ; preds = %bb1238 %i28 = getelementptr inbounds i32, ptr %i13, i32 439 %i29 = load i32, ptr %i28, align 440 %i30 = getelementptr inbounds i32, ptr %i13, i32 341 %i31 = load i32, ptr %i30, align 442 %i32 = getelementptr inbounds i32, ptr %i13, i32 243 %i33 = load i32, ptr %i32, align 444 %i34 = getelementptr inbounds i32, ptr %i13, i32 145 %i35 = load i32, ptr %i34, align 446 %i36 = load i32, ptr %i13, align 447 br label %bb3748 49 bb37: ; preds = %bb37, %bb2750 %lsr.iv = phi i32 [ %i70, %bb37 ], [ %i26.0, %bb27 ]51 %i38 = phi ptr [ %i15, %bb27 ], [ %i51, %bb37 ]52 %i39 = phi ptr [ %arg2, %bb27 ], [ %i69, %bb37 ]53 %i40 = phi i32 [ %i25, %bb27 ], [ %i41, %bb37 ]54 %i41 = phi i32 [ %i23, %bb27 ], [ %i68, %bb37 ]55 %i42 = phi i32 [ %i21, %bb27 ], [ %i43, %bb37 ]56 %i43 = phi i32 [ %i19, %bb27 ], [ %i52, %bb37 ]57 %i45 = sext i32 %i29 to i6458 %i46 = sext i32 %i31 to i6459 %i47 = sext i32 %i33 to i6460 %i48 = sext i32 %i35 to i6461 %i49 = sext i32 %i36 to i6462 %i50 = zext i32 %i9 to i6463 %i51 = getelementptr inbounds i32, ptr %i38, i32 164 %i52 = load i32, ptr %i38, align 465 %i53 = sext i32 %i52 to i6466 %i54 = mul nsw i64 %i53, %i4967 %i55 = sext i32 %i43 to i6468 %i56 = mul nsw i64 %i55, %i4869 %i57 = sext i32 %i42 to i6470 %i58 = mul nsw i64 %i57, %i4771 %i59 = sext i32 %i41 to i6472 %i60 = mul nsw i64 %i59, %i4673 %i61 = sext i32 %i40 to i6474 %i62 = mul nsw i64 %i61, %i4575 %i63 = add i64 %i58, %i5676 %i64 = add i64 %i63, %i6077 %i65 = add i64 %i64, %i6278 %i66 = add i64 %i65, %i5479 %i67 = ashr i64 %i66, %i5080 %i68 = trunc i64 %i67 to i3281 %i69 = getelementptr inbounds i32, ptr %i39, i32 182 store i32 %i68, ptr %i39, align 483 %i70 = call i32 @llvm.loop.decrement.reg.i32(i32 %lsr.iv, i32 1)84 %i71 = icmp ne i32 %i70, 085 br i1 %i71, label %bb37, label %bb7286 87 bb72: ; preds = %bb3788 %i73 = trunc i64 %i67 to i3289 br label %bb7490 91 bb74: ; preds = %bb72, %bb1292 %i75 = phi i32 [ %i19, %bb12 ], [ %i52, %bb72 ]93 %i76 = phi i32 [ %i21, %bb12 ], [ %i43, %bb72 ]94 %i77 = phi i32 [ %i23, %bb12 ], [ %i73, %bb72 ]95 %i78 = phi i32 [ %i25, %bb12 ], [ %i41, %bb72 ]96 store i32 %i75, ptr %i14, align 497 %i79 = bitcast ptr %i14 to ptr98 %i80 = getelementptr inbounds i8, ptr %i79, i32 499 %i81 = bitcast ptr %i80 to ptr100 store i32 %i76, ptr %i81, align 4101 %i82 = bitcast ptr %i14 to ptr102 %i83 = getelementptr inbounds i8, ptr %i82, i32 8103 %i84 = bitcast ptr %i83 to ptr104 store i32 %i77, ptr %i84, align 4105 %i85 = getelementptr inbounds i32, ptr %i14, i32 4106 %i86 = bitcast ptr %i14 to ptr107 %i87 = getelementptr inbounds i8, ptr %i86, i32 12108 %i88 = bitcast ptr %i87 to ptr109 store i32 %i78, ptr %i88, align 4110 %i89 = add i32 %i16, -1111 %i90 = icmp eq i32 %i89, 0112 br i1 %i90, label %bb91, label %bb12113 114 bb91: ; preds = %bb74115 ret void116 }117 118 declare { i32, i1 } @llvm.test.start.loop.iterations.i32(i32) #1119 declare i32 @llvm.loop.decrement.reg.i32(i32, i32) #1120 121 attributes #0 = { optsize "target-cpu"="cortex-m55" }122 attributes #1 = { noduplicate nounwind "target-cpu"="cortex-m55" }123 124...125---126name: arm_biquad_cascade_df1_q31127alignment: 2128tracksRegLiveness: true129registers: []130liveins:131 - { reg: '$r0', virtual-reg: '' }132 - { reg: '$r1', virtual-reg: '' }133 - { reg: '$r2', virtual-reg: '' }134 - { reg: '$r3', virtual-reg: '' }135frameInfo:136 stackSize: 68137 offsetAdjustment: 0138 maxAlignment: 4139 savePoint: []140 restorePoint: []141fixedStack: []142stack:143 - { id: 0, name: '', type: spill-slot, offset: -40, size: 4, alignment: 4,144 stack-id: default, callee-saved-register: '', callee-saved-restored: true,145 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }146 - { id: 1, name: '', type: spill-slot, offset: -44, size: 4, alignment: 4,147 stack-id: default, callee-saved-register: '', callee-saved-restored: true,148 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }149 - { id: 2, name: '', type: spill-slot, offset: -48, size: 4, alignment: 4,150 stack-id: default, callee-saved-register: '', callee-saved-restored: true,151 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }152 - { id: 3, name: '', type: spill-slot, offset: -52, size: 4, alignment: 4,153 stack-id: default, callee-saved-register: '', callee-saved-restored: true,154 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }155 - { id: 4, name: '', type: spill-slot, offset: -56, size: 4, alignment: 4,156 stack-id: default, callee-saved-register: '', callee-saved-restored: true,157 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }158 - { id: 5, name: '', type: spill-slot, offset: -60, size: 4, alignment: 4,159 stack-id: default, callee-saved-register: '', callee-saved-restored: true,160 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }161 - { id: 6, name: '', type: spill-slot, offset: -64, size: 4, alignment: 4,162 stack-id: default, callee-saved-register: '', callee-saved-restored: true,163 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }164 - { id: 7, name: '', type: spill-slot, offset: -68, size: 4, alignment: 4,165 stack-id: default, callee-saved-register: '', callee-saved-restored: true,166 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }167 - { id: 8, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,168 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,169 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }170 - { id: 9, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,171 stack-id: default, callee-saved-register: '$r11', callee-saved-restored: true,172 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }173 - { id: 10, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,174 stack-id: default, callee-saved-register: '$r10', callee-saved-restored: true,175 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }176 - { id: 11, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4,177 stack-id: default, callee-saved-register: '$r9', callee-saved-restored: true,178 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }179 - { id: 12, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4,180 stack-id: default, callee-saved-register: '$r8', callee-saved-restored: true,181 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }182 - { id: 13, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4,183 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,184 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }185 - { id: 14, name: '', type: spill-slot, offset: -28, size: 4, alignment: 4,186 stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true,187 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }188 - { id: 15, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4,189 stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true,190 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }191 - { id: 16, name: '', type: spill-slot, offset: -36, size: 4, alignment: 4,192 stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,193 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }194callSites: []195constants: []196machineFunctionInfo: {}197body: |198 ; CHECK-LABEL: name: arm_biquad_cascade_df1_q31199 ; CHECK: bb.0.bb:200 ; CHECK-NEXT: successors: %bb.1(0x80000000)201 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $lr202 ; CHECK-NEXT: {{ $}}203 ; CHECK-NEXT: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr204 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 36205 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4206 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r11, -8207 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r10, -12208 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r9, -16209 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r8, -20210 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -24211 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r6, -28212 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r5, -32213 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r4, -36214 ; CHECK-NEXT: $sp = frame-setup tSUBspi $sp, 8, 14 /* CC::al */, $noreg215 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 68216 ; CHECK-NEXT: $r6, $r4 = t2LDRDi8 $r0, 8, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i7), (load (s32) from %ir.i10)217 ; CHECK-NEXT: $r7, $r5 = t2LDRDi8 killed $r0, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i), (load (s32) from %ir.i5)218 ; CHECK-NEXT: renamable $r0 = t2RSBri killed renamable $r6, 31, 14 /* CC::al */, $noreg, $noreg219 ; CHECK-NEXT: t2STMIA $sp, 14 /* CC::al */, $noreg, killed $r0, $r2, $r3 :: (store (s32) into %stack.7), (store (s32) into %stack.6), (store (s32) into %stack.5)220 ; CHECK-NEXT: $r12 = tMOVr killed $r2, 14 /* CC::al */, $noreg221 ; CHECK-NEXT: renamable $r2 = tLDRspi $sp, 0, 14 /* CC::al */, $noreg :: (load (s32) from %stack.7)222 ; CHECK-NEXT: {{ $}}223 ; CHECK-NEXT: bb.1.bb12 (align 4):224 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.5(0x40000000)225 ; CHECK-NEXT: liveins: $r1, $r2, $r3, $r4, $r5, $r7, $r12226 ; CHECK-NEXT: {{ $}}227 ; CHECK-NEXT: $r10, $r0 = t2LDRDi8 $r7, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i14), (load (s32) from %ir.i20)228 ; CHECK-NEXT: $r6, $r8 = t2LDRDi8 $r7, 8, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i22), (load (s32) from %ir.i24)229 ; CHECK-NEXT: $lr = t2WLS renamable $r3, %bb.5230 ; CHECK-NEXT: {{ $}}231 ; CHECK-NEXT: bb.2.bb27:232 ; CHECK-NEXT: successors: %bb.3(0x80000000)233 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r4, $r5, $r6, $r7, $r8, $r10, $r12234 ; CHECK-NEXT: {{ $}}235 ; CHECK-NEXT: renamable $r3 = tLDRi renamable $r5, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i13)236 ; CHECK-NEXT: t2STRDi8 killed $r7, killed $r4, $sp, 12, 14 /* CC::al */, $noreg :: (store (s32) into %stack.4), (store (s32) into %stack.3)237 ; CHECK-NEXT: tSTRspi killed renamable $r3, $sp, 7, 14 /* CC::al */, $noreg :: (store (s32) into %stack.0)238 ; CHECK-NEXT: renamable $r3 = tLDRi renamable $r5, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i34)239 ; CHECK-NEXT: renamable $r4 = tLDRi renamable $r5, 4, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i28)240 ; CHECK-NEXT: tSTRspi killed renamable $r3, $sp, 6, 14 /* CC::al */, $noreg :: (store (s32) into %stack.1)241 ; CHECK-NEXT: $r9, $r3 = t2LDRDi8 $r5, 8, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i32), (load (s32) from %ir.i30)242 ; CHECK-NEXT: tSTRspi killed renamable $r5, $sp, 5, 14 /* CC::al */, $noreg :: (store (s32) into %stack.2)243 ; CHECK-NEXT: {{ $}}244 ; CHECK-NEXT: bb.3.bb37 (align 4):245 ; CHECK-NEXT: successors: %bb.3(0x7c000000), %bb.4(0x04000000)246 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r6, $r8, $r9, $r10, $r12247 ; CHECK-NEXT: {{ $}}248 ; CHECK-NEXT: $r7 = tMOVr killed $r6, 14 /* CC::al */, $noreg249 ; CHECK-NEXT: renamable $r6 = tLDRspi $sp, 6, 14 /* CC::al */, $noreg :: (load (s32) from %stack.1)250 ; CHECK-NEXT: $r5 = tMOVr $r10, 14 /* CC::al */, $noreg251 ; CHECK-NEXT: renamable $r6, renamable $r11 = t2SMULL killed $r10, killed renamable $r6, 14 /* CC::al */, $noreg252 ; CHECK-NEXT: renamable $r6, renamable $r11 = t2SMLAL killed renamable $r0, renamable $r9, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg253 ; CHECK-NEXT: renamable $r10, renamable $r1 = t2LDR_POST killed renamable $r1, 4, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i38)254 ; CHECK-NEXT: renamable $r6, renamable $r11 = t2SMLAL renamable $r7, renamable $r3, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg255 ; CHECK-NEXT: renamable $r0 = tLDRspi $sp, 7, 14 /* CC::al */, $noreg :: (load (s32) from %stack.0)256 ; CHECK-NEXT: renamable $r6, renamable $r11 = t2SMLAL killed renamable $r8, renamable $r4, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg257 ; CHECK-NEXT: renamable $r6, renamable $r11 = t2SMLAL renamable $r10, killed renamable $r0, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg258 ; CHECK-NEXT: early-clobber renamable $r6, dead early-clobber renamable $r11 = MVE_ASRLr killed renamable $r6, killed renamable $r11, renamable $r2, 14 /* CC::al */, $noreg259 ; CHECK-NEXT: early-clobber renamable $r12 = t2STR_POST renamable $r6, killed renamable $r12, 4, 14 /* CC::al */, $noreg :: (store (s32) into %ir.i39)260 ; CHECK-NEXT: $r8 = tMOVr $r7, 14 /* CC::al */, $noreg261 ; CHECK-NEXT: $r0 = tMOVr $r5, 14 /* CC::al */, $noreg262 ; CHECK-NEXT: $lr = t2LEUpdate killed renamable $lr, %bb.3263 ; CHECK-NEXT: {{ $}}264 ; CHECK-NEXT: bb.4.bb72:265 ; CHECK-NEXT: successors: %bb.5(0x80000000)266 ; CHECK-NEXT: liveins: $r2, $r5, $r6, $r7, $r10267 ; CHECK-NEXT: {{ $}}268 ; CHECK-NEXT: $r0 = tMOVr killed $r5, 14 /* CC::al */, $noreg269 ; CHECK-NEXT: $r8 = tMOVr killed $r7, 14 /* CC::al */, $noreg270 ; CHECK-NEXT: $r12, $r3 = t2LDRDi8 $sp, 4, 14 /* CC::al */, $noreg :: (load (s32) from %stack.6), (load (s32) from %stack.5)271 ; CHECK-NEXT: renamable $r5 = tLDRspi $sp, 5, 14 /* CC::al */, $noreg :: (load (s32) from %stack.2)272 ; CHECK-NEXT: $r7, $r4 = t2LDRDi8 $sp, 12, 14 /* CC::al */, $noreg :: (load (s32) from %stack.4), (load (s32) from %stack.3)273 ; CHECK-NEXT: {{ $}}274 ; CHECK-NEXT: bb.5.bb74:275 ; CHECK-NEXT: successors: %bb.6(0x04000000), %bb.1(0x7c000000)276 ; CHECK-NEXT: liveins: $r0, $r3, $r4, $r5, $r6, $r7, $r8, $r10, $r12, $r2277 ; CHECK-NEXT: {{ $}}278 ; CHECK-NEXT: renamable $r5, dead $cpsr = nuw tADDi8 killed renamable $r5, 20, 14 /* CC::al */, $noreg279 ; CHECK-NEXT: t2STRDi8 killed $r10, killed $r0, $r7, 0, 14 /* CC::al */, $noreg :: (store (s32) into %ir.i14), (store (s32) into %ir.i81)280 ; CHECK-NEXT: t2STRDi8 killed $r6, killed $r8, $r7, 8, 14 /* CC::al */, $noreg :: (store (s32) into %ir.i84), (store (s32) into %ir.i88)281 ; CHECK-NEXT: renamable $r7, dead $cpsr = nuw tADDi8 killed renamable $r7, 16, 14 /* CC::al */, $noreg282 ; CHECK-NEXT: renamable $r4, $cpsr = tSUBi8 killed renamable $r4, 1, 14 /* CC::al */, $noreg283 ; CHECK-NEXT: $r1 = tMOVr $r12, 14 /* CC::al */, $noreg284 ; CHECK-NEXT: tBcc %bb.1, 1 /* CC::ne */, killed $cpsr285 ; CHECK-NEXT: {{ $}}286 ; CHECK-NEXT: bb.6.bb91:287 ; CHECK-NEXT: $sp = frame-destroy tADDspi $sp, 8, 14 /* CC::al */, $noreg288 ; CHECK-NEXT: $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc289 bb.0.bb:290 successors: %bb.1(0x80000000)291 liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $lr292 293 $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr294 frame-setup CFI_INSTRUCTION def_cfa_offset 36295 frame-setup CFI_INSTRUCTION offset $lr, -4296 frame-setup CFI_INSTRUCTION offset $r11, -8297 frame-setup CFI_INSTRUCTION offset $r10, -12298 frame-setup CFI_INSTRUCTION offset $r9, -16299 frame-setup CFI_INSTRUCTION offset $r8, -20300 frame-setup CFI_INSTRUCTION offset $r7, -24301 frame-setup CFI_INSTRUCTION offset $r6, -28302 frame-setup CFI_INSTRUCTION offset $r5, -32303 frame-setup CFI_INSTRUCTION offset $r4, -36304 $sp = frame-setup tSUBspi $sp, 8, 14 /* CC::al */, $noreg305 frame-setup CFI_INSTRUCTION def_cfa_offset 68306 $r6, $r4 = t2LDRDi8 $r0, 8, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i7), (load (s32) from %ir.i10)307 $r7, $r5 = t2LDRDi8 killed $r0, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i), (load (s32) from %ir.i5)308 renamable $r0 = t2RSBri killed renamable $r6, 31, 14 /* CC::al */, $noreg, $noreg309 t2STMIA $sp, 14 /* CC::al */, $noreg, killed $r0, $r2, $r3 :: (store (s32) into %stack.7), (store (s32) into %stack.6), (store (s32) into %stack.5)310 $r12 = tMOVr killed $r2, 14 /* CC::al */, $noreg311 renamable $r2 = tLDRspi $sp, 0, 14 /* CC::al */, $noreg :: (load (s32) from %stack.7)312 313 bb.1.bb12 (align 4):314 successors: %bb.2(0x40000000), %bb.5(0x40000000)315 liveins: $r1, $r3, $r4, $r5, $r7, $r12, $r2316 317 $r10, $r0 = t2LDRDi8 $r7, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i14), (load (s32) from %ir.i20)318 $r6, $r8 = t2LDRDi8 $r7, 8, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i22), (load (s32) from %ir.i24)319 renamable $lr = t2WhileLoopStartLR renamable $r3, %bb.5, implicit-def dead $cpsr320 tB %bb.2, 14 /* CC::al */, $noreg321 322 bb.2.bb27:323 successors: %bb.3(0x80000000)324 liveins: $lr, $r0, $r1, $r4, $r5, $r6, $r7, $r8, $r10, $r12, $r2325 326 renamable $r3 = tLDRi renamable $r5, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i13)327 t2STRDi8 killed $r7, killed $r4, $sp, 12, 14 /* CC::al */, $noreg :: (store (s32) into %stack.4), (store (s32) into %stack.3)328 tSTRspi killed renamable $r3, $sp, 7, 14 /* CC::al */, $noreg :: (store (s32) into %stack.0)329 renamable $r3 = tLDRi renamable $r5, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i34)330 renamable $r4 = tLDRi renamable $r5, 4, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i28)331 tSTRspi killed renamable $r3, $sp, 6, 14 /* CC::al */, $noreg :: (store (s32) into %stack.1)332 $r9, $r3 = t2LDRDi8 $r5, 8, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i32), (load (s32) from %ir.i30)333 tSTRspi killed renamable $r5, $sp, 5, 14 /* CC::al */, $noreg :: (store (s32) into %stack.2)334 335 bb.3.bb37 (align 4):336 successors: %bb.3(0x7c000000), %bb.4(0x04000000)337 liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r6, $r8, $r9, $r10, $r12338 339 $r7 = tMOVr killed $r6, 14 /* CC::al */, $noreg340 renamable $r6 = tLDRspi $sp, 6, 14 /* CC::al */, $noreg :: (load (s32) from %stack.1)341 $r5 = tMOVr $r10, 14 /* CC::al */, $noreg342 renamable $r6, renamable $r11 = t2SMULL killed $r10, killed renamable $r6, 14 /* CC::al */, $noreg343 renamable $r6, renamable $r11 = t2SMLAL killed renamable $r0, renamable $r9, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg344 renamable $r10, renamable $r1 = t2LDR_POST killed renamable $r1, 4, 14 /* CC::al */, $noreg :: (load (s32) from %ir.i38)345 renamable $r6, renamable $r11 = t2SMLAL renamable $r7, renamable $r3, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg346 renamable $r0 = tLDRspi $sp, 7, 14 /* CC::al */, $noreg :: (load (s32) from %stack.0)347 renamable $r6, renamable $r11 = t2SMLAL killed renamable $r8, renamable $r4, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg348 renamable $r6, renamable $r11 = t2SMLAL renamable $r10, killed renamable $r0, killed renamable $r6, killed renamable $r11, 14 /* CC::al */, $noreg349 early-clobber renamable $r6, dead early-clobber renamable $r11 = MVE_ASRLr killed renamable $r6, killed renamable $r11, renamable $r2, 14 /* CC::al */, $noreg350 early-clobber renamable $r12 = t2STR_POST renamable $r6, killed renamable $r12, 4, 14 /* CC::al */, $noreg :: (store (s32) into %ir.i39)351 $r8 = tMOVr $r7, 14 /* CC::al */, $noreg352 $r0 = tMOVr $r5, 14 /* CC::al */, $noreg353 renamable $lr = t2LoopEndDec killed renamable $lr, %bb.3, implicit-def dead $cpsr354 tB %bb.4, 14 /* CC::al */, $noreg355 356 bb.4.bb72:357 successors: %bb.5(0x80000000)358 liveins: $r5, $r6, $r7, $r10, $r2359 360 $r0 = tMOVr killed $r5, 14 /* CC::al */, $noreg361 $r8 = tMOVr killed $r7, 14 /* CC::al */, $noreg362 $r12, $r3 = t2LDRDi8 $sp, 4, 14 /* CC::al */, $noreg :: (load (s32) from %stack.6), (load (s32) from %stack.5)363 renamable $r5 = tLDRspi $sp, 5, 14 /* CC::al */, $noreg :: (load (s32) from %stack.2)364 $r7, $r4 = t2LDRDi8 $sp, 12, 14 /* CC::al */, $noreg :: (load (s32) from %stack.4), (load (s32) from %stack.3)365 366 bb.5.bb74:367 successors: %bb.6(0x04000000), %bb.1(0x7c000000)368 liveins: $r0, $r3, $r4, $r5, $r6, $r7, $r8, $r10, $r12, $r2369 370 renamable $r5, dead $cpsr = nuw tADDi8 killed renamable $r5, 20, 14 /* CC::al */, $noreg371 t2STRDi8 killed $r10, killed $r0, $r7, 0, 14 /* CC::al */, $noreg :: (store (s32) into %ir.i14), (store (s32) into %ir.i81)372 t2STRDi8 killed $r6, killed $r8, $r7, 8, 14 /* CC::al */, $noreg :: (store (s32) into %ir.i84), (store (s32) into %ir.i88)373 renamable $r7, dead $cpsr = nuw tADDi8 killed renamable $r7, 16, 14 /* CC::al */, $noreg374 renamable $r4, $cpsr = tSUBi8 killed renamable $r4, 1, 14 /* CC::al */, $noreg375 $r1 = tMOVr $r12, 14 /* CC::al */, $noreg376 tBcc %bb.1, 1 /* CC::ne */, killed $cpsr377 378 bb.6.bb91:379 $sp = frame-destroy tADDspi $sp, 8, 14 /* CC::al */, $noreg380 $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc381 382...383