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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp -run-pass=arm-low-overhead-loops %s -o - | FileCheck %s3 4--- |5 6 @arm_cmplx_conj_f32_mve.cmplx_conj_sign = internal constant [4 x float] [float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00], align 47 8 define hidden void @arm_cmplx_conj_f32_mve(ptr %pSrc, ptr %pDst, i32 %blockSize) local_unnamed_addr #0 {9 entry:10 ret void11 }12 13...14---15name: arm_cmplx_conj_f32_mve16alignment: 417tracksRegLiveness: true18registers: []19liveins:20 - { reg: '$r0', virtual-reg: '' }21 - { reg: '$r1', virtual-reg: '' }22 - { reg: '$r2', virtual-reg: '' }23frameInfo:24 stackSize: 825 offsetAdjustment: 026 maxAlignment: 427fixedStack: []28stack:29 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,30 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,31 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }32 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,33 stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,34 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }35machineFunctionInfo: {}36body: |37 ; CHECK-LABEL: name: arm_cmplx_conj_f32_mve38 ; CHECK: bb.0:39 ; CHECK-NEXT: successors: %bb.1(0x80000000)40 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r441 ; CHECK-NEXT: {{ $}}42 ; CHECK-NEXT: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp43 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 844 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -445 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r4, -846 ; CHECK-NEXT: renamable $r3, dead $cpsr = tLSLri killed renamable $r2, 1, 14 /* CC::al */, $noreg47 ; CHECK-NEXT: $r4 = t2MOVi16 target-flags(arm-lo16) @arm_cmplx_conj_f32_mve.cmplx_conj_sign, 14 /* CC::al */, $noreg48 ; CHECK-NEXT: $r4 = t2MOVTi16 killed $r4, target-flags(arm-hi16) @arm_cmplx_conj_f32_mve.cmplx_conj_sign, 14 /* CC::al */, $noreg49 ; CHECK-NEXT: renamable $q0 = nnan ninf nsz MVE_VLDRWU32 killed renamable $r4, 0, 0, $noreg, $noreg50 ; CHECK-NEXT: $lr = MVE_DLSTP_32 killed renamable $r351 ; CHECK-NEXT: {{ $}}52 ; CHECK-NEXT: bb.1 (align 4):53 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000)54 ; CHECK-NEXT: liveins: $lr, $q0, $r0, $r155 ; CHECK-NEXT: {{ $}}56 ; CHECK-NEXT: renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 0, $noreg, $noreg57 ; CHECK-NEXT: renamable $q1 = nnan ninf nsz MVE_VMULf32 killed renamable $q1, renamable $q0, 0, $noreg, $noreg, undef renamable $q158 ; CHECK-NEXT: MVE_VSTRWU32 killed renamable $q1, renamable $r1, 0, 0, killed $noreg, $noreg59 ; CHECK-NEXT: renamable $r1, dead $cpsr = nuw tADDi8 killed renamable $r1, 16, 14 /* CC::al */, $noreg60 ; CHECK-NEXT: renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14 /* CC::al */, $noreg61 ; CHECK-NEXT: $lr = MVE_LETP killed renamable $lr, %bb.162 ; CHECK-NEXT: {{ $}}63 ; CHECK-NEXT: bb.2:64 ; CHECK-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $pc65 bb.0:66 successors: %bb.1(0x80000000)67 liveins: $r0, $r1, $r2, $r4, $lr68 69 frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp70 frame-setup CFI_INSTRUCTION def_cfa_offset 871 frame-setup CFI_INSTRUCTION offset $lr, -472 frame-setup CFI_INSTRUCTION offset $r4, -873 renamable $r12 = t2MOVi 4, 14 /* CC::al */, $noreg, $noreg74 renamable $r3, dead $cpsr = tLSLri renamable $r2, 1, 14 /* CC::al */, $noreg75 tCMPi8 renamable $r3, 4, 14 /* CC::al */, $noreg, implicit-def $cpsr76 t2IT 11, 8, implicit-def $itstate77 $r12 = t2LSLri renamable $r2, 1, 11 /* CC::lt */, killed $cpsr, $noreg, implicit killed renamable $r12, implicit killed $itstate78 renamable $r2 = t2RSBrs killed renamable $r12, killed renamable $r2, 10, 14 /* CC::al */, $noreg, $noreg79 $r4 = t2MOVi16 target-flags(arm-lo16) @arm_cmplx_conj_f32_mve.cmplx_conj_sign, 14 /* CC::al */, $noreg80 renamable $r2, dead $cpsr = tADDi8 killed renamable $r2, 3, 14 /* CC::al */, $noreg81 renamable $lr = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg82 $r4 = t2MOVTi16 killed $r4, target-flags(arm-hi16) @arm_cmplx_conj_f32_mve.cmplx_conj_sign, 14 /* CC::al */, $noreg83 renamable $q0 = nnan ninf nsz MVE_VLDRWU32 killed renamable $r4, 0, 0, $noreg, $noreg84 renamable $lr = nuw nsw t2ADDrs killed renamable $lr, killed renamable $r2, 19, 14 /* CC::al */, $noreg, $noreg85 $lr = t2DoLoopStart renamable $lr86 87 bb.1 (align 4):88 successors: %bb.1(0x7c000000), %bb.2(0x04000000)89 liveins: $lr, $q0, $r0, $r1, $r390 91 renamable $vpr = MVE_VCTP32 renamable $r3, 0, $noreg, $noreg92 MVE_VPST 2, implicit $vpr93 renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 1, renamable $vpr, $noreg94 renamable $q1 = nnan ninf nsz MVE_VMULf32 killed renamable $q1, renamable $q0, 1, renamable $vpr, $noreg, undef renamable $q195 MVE_VSTRWU32 killed renamable $q1, renamable $r1, 0, 1, killed renamable $vpr, $noreg96 renamable $r3, dead $cpsr = nsw tSUBi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg97 renamable $r1, dead $cpsr = nuw tADDi8 killed renamable $r1, 16, 14 /* CC::al */, $noreg98 renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14 /* CC::al */, $noreg99 renamable $lr = t2LoopDec killed renamable $lr, 1100 t2LoopEnd renamable $lr, %bb.1, implicit-def dead $cpsr101 tB %bb.2, 14 /* CC::al */, $noreg102 103 bb.2:104 tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $pc105 106...107