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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve -tail-predication=enabled --verify-machineinstrs %s -o - | FileCheck %s3 4define dso_local i32 @vpsel_mul_reduce_add(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture readonly %c, i32 %N) {5; CHECK-LABEL: vpsel_mul_reduce_add:6; CHECK: @ %bb.0: @ %entry7; CHECK-NEXT: cmp r3, #08; CHECK-NEXT: itt eq9; CHECK-NEXT: moveq r0, #010; CHECK-NEXT: bxeq lr11; CHECK-NEXT: .LBB0_1: @ %vector.ph12; CHECK-NEXT: push {r4, lr}13; CHECK-NEXT: add.w r12, r3, #314; CHECK-NEXT: mov.w lr, #115; CHECK-NEXT: bic r12, r12, #316; CHECK-NEXT: vmov.i32 q1, #0x017; CHECK-NEXT: sub.w r12, r12, #418; CHECK-NEXT: add.w lr, lr, r12, lsr #219; CHECK-NEXT: mov.w r12, #020; CHECK-NEXT: .LBB0_2: @ %vector.body21; CHECK-NEXT: @ =>This Inner Loop Header: Depth=122; CHECK-NEXT: and r4, r12, #1523; CHECK-NEXT: vctp.32 r324; CHECK-NEXT: vmov q0, q125; CHECK-NEXT: vpstt26; CHECK-NEXT: vldrwt.u32 q1, [r2], #1627; CHECK-NEXT: vldrwt.u32 q2, [r1], #1628; CHECK-NEXT: vdup.32 q3, r429; CHECK-NEXT: add.w r12, r12, #430; CHECK-NEXT: vpt.i32 eq, q3, zr31; CHECK-NEXT: vmovt q1, q232; CHECK-NEXT: vctp.32 r333; CHECK-NEXT: vpst34; CHECK-NEXT: vldrwt.u32 q2, [r0], #1635; CHECK-NEXT: subs r3, #436; CHECK-NEXT: vmul.i32 q1, q1, q237; CHECK-NEXT: vadd.i32 q1, q1, q038; CHECK-NEXT: le lr, .LBB0_239; CHECK-NEXT: @ %bb.3: @ %middle.block40; CHECK-NEXT: vpsel q0, q1, q041; CHECK-NEXT: vaddv.u32 r0, q042; CHECK-NEXT: pop {r4, pc}43entry:44 %cmp8 = icmp eq i32 %N, 045 br i1 %cmp8, label %for.cond.cleanup, label %vector.ph46 47vector.ph: ; preds = %entry48 %n.rnd.up = add i32 %N, 349 %n.vec = and i32 %n.rnd.up, -450 br label %vector.body51 52vector.body: ; preds = %vector.body, %vector.ph53 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]54 %vec.phi = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %add, %vector.body ]55 %tmp = getelementptr inbounds i32, ptr %a, i32 %index56 %tmp1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)57 %wide.masked.load.a = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp, i32 4, <4 x i1> %tmp1, <4 x i32> undef)58 %tmp3 = getelementptr inbounds i32, ptr %b, i32 %index59 %wide.masked.load.b = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp3, i32 4, <4 x i1> %tmp1, <4 x i32> undef)60 %tmp5 = getelementptr inbounds i32, ptr %c, i32 %index61 %wide.masked.load.c = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp5, i32 4, <4 x i1> %tmp1, <4 x i32> undef)62 %rem = urem i32 %index, 1663 %rem.broadcast.splatinsert = insertelement <4 x i32> undef, i32 %rem, i32 064 %rem.broadcast.splat = shufflevector <4 x i32> %rem.broadcast.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer65 %cmp = icmp eq <4 x i32> %rem.broadcast.splat, <i32 0, i32 0, i32 0, i32 0>66 %wide.masked.load = select <4 x i1> %cmp, <4 x i32> %wide.masked.load.b, <4 x i32> %wide.masked.load.c67 %mul = mul nsw <4 x i32> %wide.masked.load, %wide.masked.load.a68 %add = add nsw <4 x i32> %mul, %vec.phi69 %index.next = add i32 %index, 470 %tmp7 = icmp eq i32 %index.next, %n.vec71 br i1 %tmp7, label %middle.block, label %vector.body72 73middle.block: ; preds = %vector.body74 %tmp8 = select <4 x i1> %tmp1, <4 x i32> %add, <4 x i32> %vec.phi75 %tmp9 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %tmp8)76 br label %for.cond.cleanup77 78for.cond.cleanup: ; preds = %middle.block, %entry79 %res.0.lcssa = phi i32 [ 0, %entry ], [ %tmp9, %middle.block ]80 ret i32 %res.0.lcssa81}82 83define dso_local i32 @vpsel_mul_reduce_add_2(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b,84; CHECK-LABEL: vpsel_mul_reduce_add_2:85; CHECK: @ %bb.0: @ %entry86; CHECK-NEXT: push {r4, r5, r7, lr}87; CHECK-NEXT: vpush {d8, d9}88; CHECK-NEXT: ldr.w r12, [sp, #32]89; CHECK-NEXT: cmp.w r12, #090; CHECK-NEXT: beq .LBB1_491; CHECK-NEXT: @ %bb.1: @ %vector.ph92; CHECK-NEXT: add.w r4, r12, #393; CHECK-NEXT: vmov.i32 q1, #0x094; CHECK-NEXT: bic r4, r4, #395; CHECK-NEXT: sub.w lr, r4, #496; CHECK-NEXT: movs r4, #197; CHECK-NEXT: add.w lr, r4, lr, lsr #298; CHECK-NEXT: movs r4, #099; CHECK-NEXT: .LBB1_2: @ %vector.body100; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1101; CHECK-NEXT: vctp.32 r12102; CHECK-NEXT: and r5, r4, #15103; CHECK-NEXT: vmov q0, q1104; CHECK-NEXT: vpsttt105; CHECK-NEXT: vldrwt.u32 q1, [r1], #16106; CHECK-NEXT: vldrwt.u32 q2, [r3], #16107; CHECK-NEXT: vldrwt.u32 q3, [r2], #16108; CHECK-NEXT: vdup.32 q4, r5109; CHECK-NEXT: adds r4, #4110; CHECK-NEXT: vpt.i32 eq, q4, zr111; CHECK-NEXT: vsubt.i32 q1, q3, q2112; CHECK-NEXT: vctp.32 r12113; CHECK-NEXT: vpst114; CHECK-NEXT: vldrwt.u32 q2, [r0], #16115; CHECK-NEXT: sub.w r12, r12, #4116; CHECK-NEXT: vmul.i32 q1, q1, q2117; CHECK-NEXT: vadd.i32 q1, q1, q0118; CHECK-NEXT: le lr, .LBB1_2119; CHECK-NEXT: @ %bb.3: @ %middle.block120; CHECK-NEXT: vpsel q0, q1, q0121; CHECK-NEXT: vaddv.u32 r0, q0122; CHECK-NEXT: vpop {d8, d9}123; CHECK-NEXT: pop {r4, r5, r7, pc}124; CHECK-NEXT: .LBB1_4:125; CHECK-NEXT: movs r0, #0126; CHECK-NEXT: vpop {d8, d9}127; CHECK-NEXT: pop {r4, r5, r7, pc}128 ptr noalias nocapture readonly %c, ptr noalias nocapture readonly %d, i32 %N) {129entry:130 %cmp8 = icmp eq i32 %N, 0131 br i1 %cmp8, label %for.cond.cleanup, label %vector.ph132 133vector.ph: ; preds = %entry134 %n.rnd.up = add i32 %N, 3135 %n.vec = and i32 %n.rnd.up, -4136 br label %vector.body137 138vector.body: ; preds = %vector.body, %vector.ph139 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]140 %vec.phi = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %add, %vector.body ]141 %tmp = getelementptr inbounds i32, ptr %a, i32 %index142 %tmp1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)143 %wide.masked.load.a = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp, i32 4, <4 x i1> %tmp1, <4 x i32> undef)144 %tmp3 = getelementptr inbounds i32, ptr %b, i32 %index145 %wide.masked.load.b = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp3, i32 4, <4 x i1> %tmp1, <4 x i32> undef)146 %tmp5 = getelementptr inbounds i32, ptr %c, i32 %index147 %wide.masked.load.c = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp5, i32 4, <4 x i1> %tmp1, <4 x i32> undef)148 %tmp7 = getelementptr inbounds i32, ptr %d, i32 %index149 %wide.masked.load.d = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp7, i32 4, <4 x i1> %tmp1, <4 x i32> undef)150 %sub = sub <4 x i32> %wide.masked.load.c, %wide.masked.load.d151 %rem = urem i32 %index, 16152 %rem.broadcast.splatinsert = insertelement <4 x i32> undef, i32 %rem, i32 0153 %rem.broadcast.splat = shufflevector <4 x i32> %rem.broadcast.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer154 %cmp = icmp eq <4 x i32> %rem.broadcast.splat, <i32 0, i32 0, i32 0, i32 0>155 %sel = select <4 x i1> %cmp, <4 x i32> %sub, <4 x i32> %wide.masked.load.b156 %mul = mul <4 x i32> %sel, %wide.masked.load.a157 %add = add <4 x i32> %mul, %vec.phi158 %index.next = add i32 %index, 4159 %cmp.exit = icmp eq i32 %index.next, %n.vec160 br i1 %cmp.exit, label %middle.block, label %vector.body161 162middle.block: ; preds = %vector.body163 %acc = select <4 x i1> %tmp1, <4 x i32> %add, <4 x i32> %vec.phi164 %reduce = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %acc)165 br label %for.cond.cleanup166 167for.cond.cleanup: ; preds = %middle.block, %entry168 %res.0.lcssa = phi i32 [ 0, %entry ], [ %reduce, %middle.block ]169 ret i32 %res.0.lcssa170}171 172define dso_local i32 @and_mul_reduce_add(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b,173; CHECK-LABEL: and_mul_reduce_add:174; CHECK: @ %bb.0: @ %entry175; CHECK-NEXT: push {r4, lr}176; CHECK-NEXT: sub sp, #8177; CHECK-NEXT: ldr.w r12, [sp, #16]178; CHECK-NEXT: cmp.w r12, #0179; CHECK-NEXT: beq .LBB2_4180; CHECK-NEXT: @ %bb.1: @ %vector.ph181; CHECK-NEXT: add.w lr, r12, #3182; CHECK-NEXT: movs r4, #1183; CHECK-NEXT: bic lr, lr, #3184; CHECK-NEXT: vmov.i32 q1, #0x0185; CHECK-NEXT: sub.w lr, lr, #4186; CHECK-NEXT: add.w r4, r4, lr, lsr #2187; CHECK-NEXT: dls lr, r4188; CHECK-NEXT: .LBB2_2: @ %vector.body189; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1190; CHECK-NEXT: vctp.32 r12191; CHECK-NEXT: vmov q0, q1192; CHECK-NEXT: vpstt193; CHECK-NEXT: vldrwt.u32 q1, [r1], #16194; CHECK-NEXT: vldrwt.u32 q2, [r0], #16195; CHECK-NEXT: vstr p0, [sp] @ 4-byte Spill196; CHECK-NEXT: sub.w r12, r12, #4197; CHECK-NEXT: vsub.i32 q1, q2, q1198; CHECK-NEXT: vpst199; CHECK-NEXT: vcmpt.i32 eq, q1, zr200; CHECK-NEXT: vstr p0, [sp, #4] @ 4-byte Spill201; CHECK-NEXT: vldr p0, [sp, #4] @ 4-byte Reload202; CHECK-NEXT: vpst203; CHECK-NEXT: vldrwt.u32 q1, [r3], #16204; CHECK-NEXT: vldr p0, [sp, #4] @ 4-byte Reload205; CHECK-NEXT: vpst206; CHECK-NEXT: vldrwt.u32 q2, [r2], #16207; CHECK-NEXT: vmul.i32 q1, q2, q1208; CHECK-NEXT: vadd.i32 q1, q1, q0209; CHECK-NEXT: le lr, .LBB2_2210; CHECK-NEXT: @ %bb.3: @ %middle.block211; CHECK-NEXT: vldr p0, [sp] @ 4-byte Reload212; CHECK-NEXT: vpsel q0, q1, q0213; CHECK-NEXT: vaddv.u32 r0, q0214; CHECK-NEXT: add sp, #8215; CHECK-NEXT: pop {r4, pc}216; CHECK-NEXT: .LBB2_4:217; CHECK-NEXT: movs r0, #0218; CHECK-NEXT: add sp, #8219; CHECK-NEXT: pop {r4, pc}220 ptr noalias nocapture readonly %c, ptr noalias nocapture readonly %d, i32 %N) {221entry:222 %cmp8 = icmp eq i32 %N, 0223 br i1 %cmp8, label %for.cond.cleanup, label %vector.ph224 225vector.ph: ; preds = %entry226 %n.rnd.up = add i32 %N, 3227 %n.vec = and i32 %n.rnd.up, -4228 br label %vector.body229 230vector.body: ; preds = %vector.body, %vector.ph231 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]232 %vec.phi = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %add, %vector.body ]233 %tmp = getelementptr inbounds i32, ptr %a, i32 %index234 %tmp1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)235 %wide.masked.load.a = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp, i32 4, <4 x i1> %tmp1, <4 x i32> undef)236 %tmp3 = getelementptr inbounds i32, ptr %b, i32 %index237 %wide.masked.load.b = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp3, i32 4, <4 x i1> %tmp1, <4 x i32> undef)238 %sub = sub <4 x i32> %wide.masked.load.a, %wide.masked.load.b239 %cmp = icmp eq <4 x i32> %sub, <i32 0, i32 0, i32 0, i32 0>240 %mask = and <4 x i1> %cmp, %tmp1241 %tmp5 = getelementptr inbounds i32, ptr %c, i32 %index242 %wide.masked.load.c = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp5, i32 4, <4 x i1> %mask, <4 x i32> undef)243 %tmp7 = getelementptr inbounds i32, ptr %d, i32 %index244 %wide.masked.load.d = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp7, i32 4, <4 x i1> %mask, <4 x i32> undef)245 %mul = mul <4 x i32> %wide.masked.load.c, %wide.masked.load.d246 %add = add <4 x i32> %mul, %vec.phi247 %index.next = add i32 %index, 4248 %cmp.exit = icmp eq i32 %index.next, %n.vec249 br i1 %cmp.exit, label %middle.block, label %vector.body250 251middle.block: ; preds = %vector.body252 %acc = select <4 x i1> %tmp1, <4 x i32> %add, <4 x i32> %vec.phi253 %reduce = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %acc)254 br label %for.cond.cleanup255 256for.cond.cleanup: ; preds = %middle.block, %entry257 %res.0.lcssa = phi i32 [ 0, %entry ], [ %reduce, %middle.block ]258 ret i32 %res.0.lcssa259}260 261define dso_local i32 @or_mul_reduce_add(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture readonly %c, ptr noalias nocapture readonly %d, i32 %N) {262; CHECK-LABEL: or_mul_reduce_add:263; CHECK: @ %bb.0: @ %entry264; CHECK-NEXT: push {r4, lr}265; CHECK-NEXT: sub sp, #4266; CHECK-NEXT: ldr.w r12, [sp, #12]267; CHECK-NEXT: cmp.w r12, #0268; CHECK-NEXT: beq .LBB3_4269; CHECK-NEXT: @ %bb.1: @ %vector.ph270; CHECK-NEXT: add.w lr, r12, #3271; CHECK-NEXT: movs r4, #1272; CHECK-NEXT: bic lr, lr, #3273; CHECK-NEXT: vmov.i32 q1, #0x0274; CHECK-NEXT: sub.w lr, lr, #4275; CHECK-NEXT: add.w r4, r4, lr, lsr #2276; CHECK-NEXT: dls lr, r4277; CHECK-NEXT: .LBB3_2: @ %vector.body278; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1279; CHECK-NEXT: vctp.32 r12280; CHECK-NEXT: vmov q0, q1281; CHECK-NEXT: vpstt282; CHECK-NEXT: vldrwt.u32 q1, [r1], #16283; CHECK-NEXT: vldrwt.u32 q2, [r0], #16284; CHECK-NEXT: vstr p0, [sp] @ 4-byte Spill285; CHECK-NEXT: vpnot286; CHECK-NEXT: vsub.i32 q1, q2, q1287; CHECK-NEXT: sub.w r12, r12, #4288; CHECK-NEXT: vpstee289; CHECK-NEXT: vcmpt.i32 ne, q1, zr290; CHECK-NEXT: vldrwe.u32 q1, [r3], #16291; CHECK-NEXT: vldrwe.u32 q2, [r2], #16292; CHECK-NEXT: vmul.i32 q1, q2, q1293; CHECK-NEXT: vadd.i32 q1, q1, q0294; CHECK-NEXT: le lr, .LBB3_2295; CHECK-NEXT: @ %bb.3: @ %middle.block296; CHECK-NEXT: vldr p0, [sp] @ 4-byte Reload297; CHECK-NEXT: vpsel q0, q1, q0298; CHECK-NEXT: vaddv.u32 r0, q0299; CHECK-NEXT: add sp, #4300; CHECK-NEXT: pop {r4, pc}301; CHECK-NEXT: .LBB3_4:302; CHECK-NEXT: movs r0, #0303; CHECK-NEXT: add sp, #4304; CHECK-NEXT: pop {r4, pc}305entry:306 %cmp8 = icmp eq i32 %N, 0307 br i1 %cmp8, label %for.cond.cleanup, label %vector.ph308 309vector.ph: ; preds = %entry310 %n.rnd.up = add i32 %N, 3311 %n.vec = and i32 %n.rnd.up, -4312 br label %vector.body313 314vector.body: ; preds = %vector.body, %vector.ph315 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]316 %vec.phi = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %add, %vector.body ]317 %tmp = getelementptr inbounds i32, ptr %a, i32 %index318 %tmp1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)319 %wide.masked.load.a = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp, i32 4, <4 x i1> %tmp1, <4 x i32> undef)320 %tmp3 = getelementptr inbounds i32, ptr %b, i32 %index321 %wide.masked.load.b = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp3, i32 4, <4 x i1> %tmp1, <4 x i32> undef)322 %sub = sub <4 x i32> %wide.masked.load.a, %wide.masked.load.b323 %cmp = icmp eq <4 x i32> %sub, <i32 0, i32 0, i32 0, i32 0>324 %mask = or <4 x i1> %cmp, %tmp1325 %tmp5 = getelementptr inbounds i32, ptr %c, i32 %index326 %wide.masked.load.c = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp5, i32 4, <4 x i1> %mask, <4 x i32> undef)327 %tmp7 = getelementptr inbounds i32, ptr %d, i32 %index328 %wide.masked.load.d = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp7, i32 4, <4 x i1> %mask, <4 x i32> undef)329 %mul = mul <4 x i32> %wide.masked.load.c, %wide.masked.load.d330 %add = add <4 x i32> %mul, %vec.phi331 %index.next = add i32 %index, 4332 %cmp.exit = icmp eq i32 %index.next, %n.vec333 br i1 %cmp.exit, label %middle.block, label %vector.body334 335middle.block: ; preds = %vector.body336 %acc = select <4 x i1> %tmp1, <4 x i32> %add, <4 x i32> %vec.phi337 %reduce = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %acc)338 br label %for.cond.cleanup339 340for.cond.cleanup: ; preds = %middle.block, %entry341 %res.0.lcssa = phi i32 [ 0, %entry ], [ %reduce, %middle.block ]342 ret i32 %res.0.lcssa343}344 345define dso_local void @continue_on_zero(ptr noalias nocapture %arg, ptr noalias nocapture readonly %arg1, i32 %arg2) {346; CHECK-LABEL: continue_on_zero:347; CHECK: @ %bb.0: @ %bb348; CHECK-NEXT: push {r7, lr}349; CHECK-NEXT: cmp r2, #0350; CHECK-NEXT: it eq351; CHECK-NEXT: popeq {r7, pc}352; CHECK-NEXT: .LBB4_1: @ %bb3353; CHECK-NEXT: dlstp.32 lr, r2354; CHECK-NEXT: .LBB4_2: @ %bb9355; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1356; CHECK-NEXT: vldrw.u32 q0, [r1], #16357; CHECK-NEXT: vpt.i32 ne, q0, zr358; CHECK-NEXT: vldrwt.u32 q1, [r0]359; CHECK-NEXT: vmul.i32 q0, q1, q0360; CHECK-NEXT: vpst361; CHECK-NEXT: vstrwt.32 q0, [r0], #16362; CHECK-NEXT: letp lr, .LBB4_2363; CHECK-NEXT: @ %bb.3: @ %bb27364; CHECK-NEXT: pop {r7, pc}365bb:366 %tmp = icmp eq i32 %arg2, 0367 br i1 %tmp, label %bb27, label %bb3368 369bb3: ; preds = %bb370 %tmp4 = add i32 %arg2, 3371 %tmp5 = and i32 %tmp4, -4372 br label %bb9373 374bb9: ; preds = %bb9, %bb3375 %tmp10 = phi i32 [ 0, %bb3 ], [ %tmp25, %bb9 ]376 %tmp14 = getelementptr inbounds i32, ptr %arg1, i32 %tmp10377 %tmp15 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %tmp10, i32 %arg2)378 %tmp17 = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp14, i32 4, <4 x i1> %tmp15, <4 x i32> undef)379 %tmp18 = icmp ne <4 x i32> %tmp17, zeroinitializer380 %tmp19 = getelementptr inbounds i32, ptr %arg, i32 %tmp10381 %tmp20 = and <4 x i1> %tmp18, %tmp15382 %tmp22 = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp19, i32 4, <4 x i1> %tmp20, <4 x i32> undef)383 %tmp23 = mul nsw <4 x i32> %tmp22, %tmp17384 call void @llvm.masked.store.v4i32.p0(<4 x i32> %tmp23, ptr %tmp19, i32 4, <4 x i1> %tmp20)385 %tmp25 = add i32 %tmp10, 4386 %tmp26 = icmp eq i32 %tmp25, %tmp5387 br i1 %tmp26, label %bb27, label %bb9388 389bb27: ; preds = %bb9, %bb390 ret void391}392 393define dso_local arm_aapcs_vfpcc void @range_test(ptr noalias nocapture %arg, ptr noalias nocapture readonly %arg1, i32 %arg2, i32 %arg3) {394; CHECK-LABEL: range_test:395; CHECK: @ %bb.0: @ %bb396; CHECK-NEXT: push {r7, lr}397; CHECK-NEXT: cmp r3, #0398; CHECK-NEXT: it eq399; CHECK-NEXT: popeq {r7, pc}400; CHECK-NEXT: .LBB5_1: @ %bb4401; CHECK-NEXT: dlstp.32 lr, r3402; CHECK-NEXT: .LBB5_2: @ %bb12403; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1404; CHECK-NEXT: vldrw.u32 q0, [r0]405; CHECK-NEXT: vpt.i32 ne, q0, zr406; CHECK-NEXT: vcmpt.s32 le, q0, r2407; CHECK-NEXT: vpst408; CHECK-NEXT: vldrwt.u32 q1, [r1], #16409; CHECK-NEXT: vmul.i32 q0, q1, q0410; CHECK-NEXT: vpst411; CHECK-NEXT: vstrwt.32 q0, [r0], #16412; CHECK-NEXT: letp lr, .LBB5_2413; CHECK-NEXT: @ %bb.3: @ %bb32414; CHECK-NEXT: pop {r7, pc}415bb:416 %tmp = icmp eq i32 %arg3, 0417 br i1 %tmp, label %bb32, label %bb4418 419bb4: ; preds = %bb420 %tmp5 = add i32 %arg3, 3421 %tmp6 = and i32 %tmp5, -4422 %tmp10 = insertelement <4 x i32> undef, i32 %arg2, i32 0423 %tmp11 = shufflevector <4 x i32> %tmp10, <4 x i32> undef, <4 x i32> zeroinitializer424 br label %bb12425 426bb12: ; preds = %bb12, %bb4427 %tmp13 = phi i32 [ 0, %bb4 ], [ %tmp30, %bb12 ]428 %tmp17 = getelementptr inbounds i32, ptr %arg, i32 %tmp13429 %tmp18= call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %tmp13, i32 %arg3)430 %tmp20 = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp17, i32 4, <4 x i1> %tmp18, <4 x i32> undef)431 %tmp21 = icmp ne <4 x i32> %tmp20, zeroinitializer432 %tmp22 = icmp sle <4 x i32> %tmp20, %tmp11433 %tmp23 = getelementptr inbounds i32, ptr %arg1, i32 %tmp13434 %tmp24 = and <4 x i1> %tmp22, %tmp21435 %tmp25 = and <4 x i1> %tmp24, %tmp18436 %tmp27 = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp23, i32 4, <4 x i1> %tmp25, <4 x i32> undef)437 %tmp28 = mul nsw <4 x i32> %tmp27, %tmp20438 call void @llvm.masked.store.v4i32.p0(<4 x i32> %tmp28, ptr %tmp17, i32 4, <4 x i1> %tmp25)439 %tmp30 = add i32 %tmp13, 4440 %tmp31 = icmp eq i32 %tmp30, %tmp6441 br i1 %tmp31, label %bb32, label %bb12442 443bb32: ; preds = %bb12, %bb444 ret void445}446 447; Function Attrs: argmemonly nounwind readonly willreturn448declare <4 x i32> @llvm.masked.load.v4i32.p0(ptr, i32 immarg, <4 x i1>, <4 x i32>)449declare void @llvm.masked.store.v4i32.p0(<4 x i32>, ptr, i32, <4 x i1>)450 451; Function Attrs: nounwind readnone willreturn452declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>)453 454declare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32, i32)455