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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp -run-pass=arm-low-overhead-loops %s -o - --verify-machineinstrs | FileCheck %s3 4--- |5 define hidden arm_aapcs_vfpcc void @cond_trip_count(ptr %0, i32 %1, ptr nocapture %2) local_unnamed_addr #1 {6 ret void7 }8 9...10---11name: cond_trip_count12alignment: 413tracksRegLiveness: true14registers: []15liveins:16 - { reg: '$r0', virtual-reg: '' }17 - { reg: '$r1', virtual-reg: '' }18 - { reg: '$r2', virtual-reg: '' }19frameInfo:20 stackSize: 821 offsetAdjustment: 022 maxAlignment: 423fixedStack: []24stack:25 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,26 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,27 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }28 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,29 stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,30 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }31callSites: []32constants:33 - id: 034 value: 'float 0.000000e+00'35 alignment: 436 isTargetSpecific: false37machineFunctionInfo: {}38body: |39 ; CHECK-LABEL: name: cond_trip_count40 ; CHECK: bb.0:41 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)42 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r443 ; CHECK-NEXT: {{ $}}44 ; CHECK-NEXT: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp45 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 846 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -447 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r4, -848 ; CHECK-NEXT: tCMPi8 renamable $r1, 2, 14 /* CC::al */, $noreg, implicit-def $cpsr49 ; CHECK-NEXT: renamable $r12 = t2MOVi 4, 14 /* CC::al */, $noreg, $noreg50 ; CHECK-NEXT: tBcc %bb.2, 2 /* CC::hs */, killed $cpsr51 ; CHECK-NEXT: {{ $}}52 ; CHECK-NEXT: bb.1:53 ; CHECK-NEXT: liveins: $r254 ; CHECK-NEXT: {{ $}}55 ; CHECK-NEXT: renamable $s0 = VLDRS %const.0, 0, 14 /* CC::al */, $noreg56 ; CHECK-NEXT: VSTRS killed renamable $s0, killed renamable $r2, 0, 14 /* CC::al */, $noreg57 ; CHECK-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $pc58 ; CHECK-NEXT: {{ $}}59 ; CHECK-NEXT: bb.2:60 ; CHECK-NEXT: successors: %bb.3(0x80000000)61 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r1262 ; CHECK-NEXT: {{ $}}63 ; CHECK-NEXT: renamable $r4, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg64 ; CHECK-NEXT: tCMPi8 renamable $r1, 4, 14 /* CC::al */, $noreg, implicit-def $cpsr65 ; CHECK-NEXT: t2IT 11, 8, implicit-def $itstate66 ; CHECK-NEXT: $r12 = tMOVr renamable $r1, 11 /* CC::lt */, killed $cpsr, implicit killed renamable $r12, implicit killed $itstate67 ; CHECK-NEXT: renamable $r3 = t2SUBrr renamable $r1, killed renamable $r12, 14 /* CC::al */, $noreg, $noreg68 ; CHECK-NEXT: renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 3, 14 /* CC::al */, $noreg69 ; CHECK-NEXT: $r12 = tMOVr $r1, 14 /* CC::al */, $noreg70 ; CHECK-NEXT: renamable $r4 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14 /* CC::al */, $noreg, $noreg71 ; CHECK-NEXT: renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, $noreg, undef renamable $q072 ; CHECK-NEXT: $r3 = tMOVr $r0, 14 /* CC::al */, $noreg73 ; CHECK-NEXT: $lr = MVE_DLSTP_32 killed renamable $r1274 ; CHECK-NEXT: {{ $}}75 ; CHECK-NEXT: bb.3:76 ; CHECK-NEXT: successors: %bb.3(0x7c000000), %bb.4(0x04000000)77 ; CHECK-NEXT: liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r478 ; CHECK-NEXT: {{ $}}79 ; CHECK-NEXT: renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r3, 0, 0, $noreg, $noreg80 ; CHECK-NEXT: renamable $q0 = nnan ninf nsz MVE_VADDf32 killed renamable $q0, killed renamable $q1, 0, killed $noreg, $noreg, killed renamable $q081 ; CHECK-NEXT: renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 16, 14 /* CC::al */, $noreg82 ; CHECK-NEXT: $lr = MVE_LETP killed renamable $lr, %bb.383 ; CHECK-NEXT: {{ $}}84 ; CHECK-NEXT: bb.4:85 ; CHECK-NEXT: successors: %bb.5(0x80000000)86 ; CHECK-NEXT: liveins: $q0, $r0, $r1, $r2, $r487 ; CHECK-NEXT: {{ $}}88 ; CHECK-NEXT: renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14 /* CC::al */, $noreg89 ; CHECK-NEXT: dead $lr = tMOVr $r4, 14 /* CC::al */, $noreg90 ; CHECK-NEXT: $r3 = tMOVr $r1, 14 /* CC::al */, $noreg91 ; CHECK-NEXT: renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14 /* CC::al */, $noreg92 ; CHECK-NEXT: renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14 /* CC::al */, $noreg, implicit killed $q093 ; CHECK-NEXT: $s2 = VMOVSR $r1, 14 /* CC::al */, $noreg94 ; CHECK-NEXT: renamable $s2 = VUITOS killed renamable $s2, 14 /* CC::al */, $noreg95 ; CHECK-NEXT: $lr = t2DLS killed $r496 ; CHECK-NEXT: renamable $s4 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14 /* CC::al */, $noreg97 ; CHECK-NEXT: renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, $noreg, undef renamable $q098 ; CHECK-NEXT: {{ $}}99 ; CHECK-NEXT: bb.5:100 ; CHECK-NEXT: successors: %bb.5(0x7c000000), %bb.6(0x04000000)101 ; CHECK-NEXT: liveins: $lr, $q0, $r0, $r1, $r2, $r3, $s4102 ; CHECK-NEXT: {{ $}}103 ; CHECK-NEXT: renamable $vpr = MVE_VCTP32 renamable $r3, 0, $noreg, $noreg104 ; CHECK-NEXT: $r4 = VMOVRS $s4, 14 /* CC::al */, $noreg105 ; CHECK-NEXT: MVE_VPST 2, implicit $vpr106 ; CHECK-NEXT: renamable $q2 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 1, renamable $vpr, $noreg107 ; CHECK-NEXT: renamable $q2 = nnan ninf nsz MVE_VSUB_qr_f32 killed renamable $q2, killed renamable $r4, 1, renamable $vpr, $noreg, undef renamable $q2108 ; CHECK-NEXT: renamable $q0 = nnan ninf nsz MVE_VFMAf32 killed renamable $q0, killed renamable $q2, killed renamable $q2, 1, killed renamable $vpr, $noreg109 ; CHECK-NEXT: renamable $r3, dead $cpsr = nsw tSUBi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg110 ; CHECK-NEXT: renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14 /* CC::al */, $noreg111 ; CHECK-NEXT: $lr = t2LEUpdate killed renamable $lr, %bb.5112 ; CHECK-NEXT: {{ $}}113 ; CHECK-NEXT: bb.6:114 ; CHECK-NEXT: liveins: $q0, $r1, $r2115 ; CHECK-NEXT: {{ $}}116 ; CHECK-NEXT: renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14 /* CC::al */, $noreg117 ; CHECK-NEXT: renamable $r0, dead $cpsr = tSUBi3 killed renamable $r1, 1, 14 /* CC::al */, $noreg118 ; CHECK-NEXT: renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14 /* CC::al */, $noreg119 ; CHECK-NEXT: renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14 /* CC::al */, $noreg, implicit killed $q0120 ; CHECK-NEXT: $s2 = VMOVSR killed $r0, 14 /* CC::al */, $noreg121 ; CHECK-NEXT: renamable $s2 = VUITOS killed renamable $s2, 14 /* CC::al */, $noreg122 ; CHECK-NEXT: renamable $s0 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14 /* CC::al */, $noreg123 ; CHECK-NEXT: VSTRS killed renamable $s0, killed renamable $r2, 0, 14 /* CC::al */, $noreg124 ; CHECK-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $pc125 ; CHECK-NEXT: {{ $}}126 ; CHECK-NEXT: bb.7 (align 4):127 ; CHECK-NEXT: CONSTPOOL_ENTRY 0, %const.0, 4128 bb.0:129 successors: %bb.1(0x40000000), %bb.2(0x40000000)130 liveins: $r0, $r1, $r2, $r4, $lr131 132 frame-setup tPUSH 14, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp133 frame-setup CFI_INSTRUCTION def_cfa_offset 8134 frame-setup CFI_INSTRUCTION offset $lr, -4135 frame-setup CFI_INSTRUCTION offset $r4, -8136 tCMPi8 renamable $r1, 4, 14, $noreg, implicit-def $cpsr137 renamable $r3 = t2MOVi 4, 14, $noreg, $noreg138 t2IT 11, 8, implicit-def $itstate139 $r3 = tMOVr renamable $r1, 11, killed $cpsr, implicit killed renamable $r3, implicit killed $itstate140 tCMPi8 renamable $r1, 2, 14, $noreg, implicit-def $cpsr141 renamable $r12 = t2MOVi 4, 14, $noreg, $noreg142 tBcc %bb.2, 2, killed $cpsr143 144 bb.1:145 liveins: $r2146 147 renamable $s0 = VLDRS %const.0, 0, 14, $noreg148 VSTRS killed renamable $s0, killed renamable $r2, 0, 14, $noreg149 tPOP_RET 14, $noreg, def $r4, def $pc150 151 bb.2:152 successors: %bb.3(0x80000000)153 liveins: $r0, $r1, $r2, $r3, $r12154 155 renamable $r3, dead $cpsr = tSUBrr renamable $r1, killed renamable $r3, 14, $noreg156 renamable $r4, dead $cpsr = tMOVi8 1, 14, $noreg157 renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 3, 14, $noreg158 tCMPi8 renamable $r1, 4, 14, $noreg, implicit-def $cpsr159 renamable $lr = nuw nsw t2ADDrs renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg160 t2IT 11, 8, implicit-def $itstate161 $r12 = tMOVr renamable $r1, 11, killed $cpsr, implicit killed renamable $r12, implicit killed $itstate162 renamable $r3 = t2SUBrr renamable $r1, killed renamable $r12, 14, $noreg, $noreg163 renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 3, 14, $noreg164 $r12 = tMOVr $r1, 14, $noreg165 renamable $r4 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg166 renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, $noreg, undef renamable $q0167 $r3 = tMOVr $r0, 14, $noreg168 $lr = t2DoLoopStart renamable $lr169 170 bb.3:171 successors: %bb.3(0x7c000000), %bb.4(0x04000000)172 liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r12173 174 renamable $vpr = MVE_VCTP32 renamable $r12, 0, $noreg, $noreg175 renamable $lr = t2LoopDec killed renamable $lr, 1176 MVE_VPST 4, implicit $vpr177 renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r3, 0, 1, renamable $vpr, $noreg178 renamable $q0 = nnan ninf nsz MVE_VADDf32 killed renamable $q0, killed renamable $q1, 1, killed renamable $vpr, $noreg, renamable $q0179 renamable $r12 = nsw t2SUBri killed renamable $r12, 4, 14, $noreg, $noreg180 renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 16, 14, $noreg181 t2LoopEnd renamable $lr, %bb.3, implicit-def dead $cpsr182 tB %bb.4, 14, $noreg183 184 bb.4:185 successors: %bb.5(0x80000000)186 liveins: $q0, $r0, $r1, $r2, $r4187 188 renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14, $noreg, implicit $fpscr_rm189 $lr = tMOVr $r4, 14, $noreg190 $r3 = tMOVr $r1, 14, $noreg191 renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14, $noreg, implicit $fpscr_rm192 renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14, $noreg, implicit $q0, implicit $fpscr_rm193 $s2 = VMOVSR $r1, 14, $noreg194 renamable $s2 = VUITOS killed renamable $s2, 14, $noreg195 $lr = t2DoLoopStart killed $r4196 renamable $s4 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14, $noreg, implicit $fpscr_rm197 renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, $noreg, undef renamable $q0198 199 bb.5:200 successors: %bb.5(0x7c000000), %bb.6(0x04000000)201 liveins: $lr, $q0, $r0, $r1, $r2, $r3, $s4202 203 renamable $vpr = MVE_VCTP32 renamable $r3, 0, $noreg, $noreg204 $r4 = VMOVRS $s4, 14, $noreg205 MVE_VPST 2, implicit $vpr206 renamable $q2 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 1, renamable $vpr, $noreg207 renamable $q2 = nnan ninf nsz MVE_VSUB_qr_f32 killed renamable $q2, killed renamable $r4, 1, renamable $vpr, $noreg, undef renamable $q2208 renamable $q0 = nnan ninf nsz MVE_VFMAf32 killed renamable $q0, killed renamable $q2, renamable $q2, 1, killed renamable $vpr, $noreg209 renamable $lr = t2LoopDec killed renamable $lr, 1210 renamable $r3, dead $cpsr = nsw tSUBi8 killed renamable $r3, 4, 14, $noreg211 renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14, $noreg212 t2LoopEnd renamable $lr, %bb.5, implicit-def dead $cpsr213 tB %bb.6, 14, $noreg214 215 bb.6:216 liveins: $q0, $r1, $r2217 218 renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14, $noreg, implicit $fpscr_rm219 renamable $r0, dead $cpsr = tSUBi3 killed renamable $r1, 1, 14, $noreg220 renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14, $noreg, implicit $fpscr_rm221 renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14, $noreg, implicit $q0, implicit $fpscr_rm222 $s2 = VMOVSR killed $r0, 14, $noreg223 renamable $s2 = VUITOS killed renamable $s2, 14, $noreg224 renamable $s0 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14, $noreg, implicit $fpscr_rm225 VSTRS killed renamable $s0, killed renamable $r2, 0, 14, $noreg226 tPOP_RET 14, $noreg, def $r4, def $pc227 228 bb.7 (align 4):229 CONSTPOOL_ENTRY 0, %const.0, 4230 231...232