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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp -run-pass=arm-low-overhead-loops %s -o - --verify-machineinstrs | FileCheck %s3 4# IT-block with 2 statements, with the last instruction not connected to the5# use-def chain of the iteration counter; make sure we don't remove the6# IT block and any of its instructions.7 8--- |9 define hidden arm_aapcs_vfpcc void @it_block_2_stmts(ptr %pSrc, ptr %pDst, i32 %blockSize) local_unnamed_addr #0 {10 entry:11 %mul = shl i32 %blockSize, 112 %0 = add i32 %mul, 313 %1 = icmp slt i32 %mul, 414 %smin = select i1 %1, i32 %mul, i32 415 %2 = sub i32 %0, %smin16 %3 = lshr i32 %2, 217 %4 = add nuw nsw i32 %3, 118 %start = call i32 @llvm.start.loop.iterations.i32(i32 %4)19 br label %do.body20 21 do.body: ; preds = %do.body, %entry22 %blkCnt.0 = phi i32 [ %mul, %entry ], [ %sub, %do.body ]23 %pDst.addr.0 = phi ptr [ %pDst, %entry ], [ %add.ptr4, %do.body ]24 %pSrc.addr.0 = phi ptr [ %pSrc, %entry ], [ %add.ptr, %do.body ]25 %5 = phi i32 [ %start, %entry ], [ %9, %do.body ]26 %6 = tail call <4 x i1> @llvm.arm.mve.vctp32(i32 %blkCnt.0)27 %7 = tail call <4 x float> @llvm.masked.load.v4f32.p0(ptr %pSrc.addr.0, i32 4, <4 x i1> %6, <4 x float> undef)28 %8 = fmul <4 x float> %7, <float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00>29 tail call void @llvm.masked.store.v4f32.p0(<4 x float> %8, ptr %pDst.addr.0, i32 4, <4 x i1> %6)30 %add.ptr = getelementptr inbounds float, ptr %pSrc.addr.0, i32 431 %add.ptr4 = getelementptr inbounds float, ptr %pDst.addr.0, i32 432 %sub = add nsw i32 %blkCnt.0, -433 %9 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %5, i32 1)34 %10 = icmp ne i32 %9, 035 br i1 %10, label %do.body, label %do.end36 37 do.end: ; preds = %do.body38 ret void39 }40 declare <4 x i1> @llvm.arm.mve.vctp32(i32) #141 declare <4 x float> @llvm.masked.load.v4f32.p0(ptr, i32 immarg, <4 x i1>, <4 x float>)42 declare void @llvm.masked.store.v4f32.p0(<4 x float>, ptr, i32 immarg, <4 x i1>)43 declare i32 @llvm.start.loop.iterations.i32(i32)44 declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32)45 46...47---48name: it_block_2_stmts49alignment: 1650exposesReturnsTwice: false51legalized: false52regBankSelected: false53selected: false54failedISel: false55tracksRegLiveness: true56hasWinCFI: false57registers: []58liveins:59 - { reg: '$r0', virtual-reg: '' }60 - { reg: '$r1', virtual-reg: '' }61 - { reg: '$r2', virtual-reg: '' }62frameInfo:63 isFrameAddressTaken: false64 isReturnAddressTaken: false65 hasStackMap: false66 hasPatchPoint: false67 stackSize: 868 offsetAdjustment: 069 maxAlignment: 470 adjustsStack: false71 hasCalls: false72 stackProtector: ''73 maxCallFrameSize: 074 cvBytesOfCalleeSavedRegisters: 075 hasOpaqueSPAdjustment: false76 hasVAStart: false77 hasMustTailInVarArgFunc: false78 localFrameSize: 079 savePoint: []80 restorePoint: []81fixedStack: []82stack:83 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,84 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,85 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }86 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,87 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,88 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }89callSites: []90constants:91 - id: 092 value: '<4 x float> <float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00>'93 alignment: 1694 isTargetSpecific: false95machineFunctionInfo: {}96body: |97 ; CHECK-LABEL: name: it_block_2_stmts98 ; CHECK: bb.0.entry:99 ; CHECK-NEXT: successors: %bb.1(0x80000000)100 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r7101 ; CHECK-NEXT: {{ $}}102 ; CHECK-NEXT: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp103 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8104 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4105 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -8106 ; CHECK-NEXT: renamable $r3, dead $cpsr = tLSLri renamable $r2, 1, 14 /* CC::al */, $noreg107 ; CHECK-NEXT: renamable $r12 = t2MOVi 4, 14 /* CC::al */, $noreg, $noreg108 ; CHECK-NEXT: tCMPi8 renamable $r3, 4, 14 /* CC::al */, $noreg, implicit-def $cpsr109 ; CHECK-NEXT: t2IT 11, 8, implicit-def $itstate110 ; CHECK-NEXT: $r12 = t2LSLri renamable $r2, 1, 11 /* CC::lt */, $cpsr, $noreg, implicit killed renamable $r12, implicit $itstate111 ; CHECK-NEXT: $r0 = t2ADDri killed renamable $r0, 42, 11 /* CC::lt */, killed $cpsr, $noreg, implicit killed renamable $r0, implicit killed $itstate112 ; CHECK-NEXT: renamable $r2 = t2RSBrs killed renamable $r12, killed renamable $r2, 10, 14 /* CC::al */, $noreg, $noreg113 ; CHECK-NEXT: dead renamable $r12 = t2ADDri killed renamable $r2, 3, 14 /* CC::al */, $noreg, $noreg114 ; CHECK-NEXT: dead renamable $r2, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg115 ; CHECK-NEXT: renamable $r2 = tLEApcrel %const.0, 14 /* CC::al */, $noreg116 ; CHECK-NEXT: renamable $q0 = MVE_VLDRWU32 killed renamable $r2, 0, 0, $noreg, $noreg :: (load (s128) from constant-pool)117 ; CHECK-NEXT: $lr = MVE_DLSTP_32 killed renamable $r3118 ; CHECK-NEXT: {{ $}}119 ; CHECK-NEXT: bb.1.do.body (align 4):120 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000)121 ; CHECK-NEXT: liveins: $lr, $q0, $r0, $r1122 ; CHECK-NEXT: {{ $}}123 ; CHECK-NEXT: renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 0, $noreg, $noreg124 ; CHECK-NEXT: renamable $q1 = nnan ninf nsz MVE_VMULf32 killed renamable $q1, renamable $q0, 0, $noreg, $noreg, undef renamable $q1125 ; CHECK-NEXT: MVE_VSTRWU32 killed renamable $q1, renamable $r1, 0, 0, killed $noreg, $noreg126 ; CHECK-NEXT: renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14 /* CC::al */, $noreg127 ; CHECK-NEXT: renamable $r1, dead $cpsr = nuw tADDi8 killed renamable $r1, 16, 14 /* CC::al */, $noreg128 ; CHECK-NEXT: $lr = MVE_LETP killed renamable $lr, %bb.1129 ; CHECK-NEXT: {{ $}}130 ; CHECK-NEXT: bb.2.do.end:131 ; CHECK-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r7, def $pc132 ; CHECK-NEXT: {{ $}}133 ; CHECK-NEXT: bb.3 (align 16):134 ; CHECK-NEXT: CONSTPOOL_ENTRY 0, %const.0, 16135 bb.0.entry:136 successors: %bb.1(0x80000000)137 liveins: $r0, $r1, $r2, $r7, $lr138 139 frame-setup tPUSH 14, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp140 frame-setup CFI_INSTRUCTION def_cfa_offset 8141 frame-setup CFI_INSTRUCTION offset $lr, -4142 frame-setup CFI_INSTRUCTION offset $r7, -8143 renamable $r3, dead $cpsr = tLSLri renamable $r2, 1, 14, $noreg144 renamable $r12 = t2MOVi 4, 14, $noreg, $noreg145 tCMPi8 renamable $r3, 4, 14, $noreg, implicit-def $cpsr146 t2IT 11, 8, implicit-def $itstate147 $r12 = t2LSLri renamable $r2, 1, 11, $cpsr, $noreg, implicit renamable $r12, implicit $itstate148 $r0 = t2ADDri renamable $r0, 42, 11, killed $cpsr, $noreg, implicit killed renamable $r0, implicit killed $itstate149 renamable $r2 = t2RSBrs killed renamable $r12, killed renamable $r2, 10, 14, $noreg, $noreg150 renamable $r12 = t2ADDri killed renamable $r2, 3, 14, $noreg, $noreg151 renamable $r2, dead $cpsr = tMOVi8 1, 14, $noreg152 renamable $lr = nuw nsw t2ADDrs killed renamable $r2, killed renamable $r12, 19, 14, $noreg, $noreg153 renamable $r2 = tLEApcrel %const.0, 14, $noreg154 renamable $q0 = MVE_VLDRWU32 killed renamable $r2, 0, 0, $noreg, $noreg :: (load (s128) from constant-pool)155 $lr = t2DoLoopStart renamable $lr156 157 bb.1.do.body (align 4):158 successors: %bb.1(0x7c000000), %bb.2(0x04000000)159 liveins: $lr, $q0, $r0, $r1, $r3160 161 renamable $vpr = MVE_VCTP32 renamable $r3, 0, $noreg, $noreg162 MVE_VPST 2, implicit $vpr163 renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 1, renamable $vpr, $noreg164 renamable $q1 = nnan ninf nsz MVE_VMULf32 killed renamable $q1, renamable $q0, 1, renamable $vpr, $noreg, undef renamable $q1165 MVE_VSTRWU32 killed renamable $q1, renamable $r1, 0, 1, killed renamable $vpr, $noreg166 renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14, $noreg167 renamable $lr = t2LoopDec killed renamable $lr, 1168 renamable $r1, dead $cpsr = nuw tADDi8 killed renamable $r1, 16, 14, $noreg169 renamable $r3, dead $cpsr = nsw tSUBi8 killed renamable $r3, 4, 14, $noreg170 t2LoopEnd renamable $lr, %bb.1, implicit-def dead $cpsr171 tB %bb.2, 14, $noreg172 173 bb.2.do.end:174 tPOP_RET 14, $noreg, def $r7, def $pc175 176 bb.3 (align 16):177 CONSTPOOL_ENTRY 0, %const.0, 16178 179...180