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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=thumbv8.1m.main -run-pass=arm-cp-islands %s -o - --verify-machineinstrs | FileCheck %s3 4--- |5 %struct.head_s = type { ptr, ptr }6 %struct.data_s = type { i16, i16 }7 8 define dso_local arm_aapcscc ptr @search(ptr readonly %list, ptr nocapture readonly %info) local_unnamed_addr {9 entry:10 %idx = getelementptr inbounds %struct.data_s, ptr %info, i32 0, i32 111 %tmp = load i16, ptr %idx, align 212 %cmp = icmp sgt i16 %tmp, -113 br i1 %cmp, label %while.cond.preheader, label %while.cond9.preheader14 15 while.cond9.preheader: ; preds = %entry16 %0 = icmp eq ptr %list, null17 br i1 %0, label %return, label %land.rhs11.lr.ph18 19 land.rhs11.lr.ph: ; preds = %while.cond9.preheader20 %data16143 = bitcast ptr %info to ptr21 %tmp1 = load i16, ptr %data16143, align 222 %conv15 = sext i16 %tmp1 to i3223 br label %land.rhs1124 25 while.cond.preheader: ; preds = %entry26 %1 = icmp eq ptr %list, null27 br i1 %1, label %return, label %land.rhs.preheader28 29 land.rhs.preheader: ; preds = %while.cond.preheader30 br label %land.rhs31 32 while.body: ; preds = %land.rhs33 %next4 = bitcast ptr %list.addr.033 to ptr34 %tmp4 = load ptr, ptr %next4, align 435 %tobool = icmp eq ptr %tmp4, null36 br i1 %tobool, label %return, label %land.rhs37 38 land.rhs: ; preds = %land.rhs.preheader, %while.body39 %list.addr.033 = phi ptr [ %tmp4, %while.body ], [ %list, %land.rhs.preheader ]40 %info2 = getelementptr inbounds %struct.head_s, ptr %list.addr.033, i32 0, i32 141 %tmp2 = load ptr, ptr %info2, align 442 %idx3 = getelementptr inbounds %struct.data_s, ptr %tmp2, i32 0, i32 143 %tmp3 = load i16, ptr %idx3, align 244 %cmp7 = icmp eq i16 %tmp3, %tmp45 br i1 %cmp7, label %return, label %while.body46 47 while.body19: ; preds = %land.rhs1148 %next205 = bitcast ptr %list.addr.136 to ptr49 %tmp8 = load ptr, ptr %next205, align 450 %tobool10 = icmp eq ptr %tmp8, null51 br i1 %tobool10, label %return, label %land.rhs1152 53 land.rhs11: ; preds = %while.body19, %land.rhs11.lr.ph54 %list.addr.136 = phi ptr [ %list, %land.rhs11.lr.ph ], [ %tmp8, %while.body19 ]55 %info12 = getelementptr inbounds %struct.head_s, ptr %list.addr.136, i32 0, i32 156 %tmp5 = load ptr, ptr %info12, align 457 %data166 = bitcast ptr %tmp5 to ptr58 %tmp6 = load i16, ptr %data166, align 259 %2 = and i16 %tmp6, 25560 %and = zext i16 %2 to i3261 %cmp16 = icmp eq i32 %and, %conv1562 br i1 %cmp16, label %return, label %while.body1963 64 return: ; preds = %land.rhs11, %while.body19, %land.rhs, %while.body, %while.cond.preheader, %while.cond9.preheader65 %retval.0 = phi ptr [ null, %while.cond.preheader ], [ null, %while.cond9.preheader ], [ null, %while.body ], [ %list.addr.033, %land.rhs ], [ null, %while.body19 ], [ %list.addr.136, %land.rhs11 ]66 ret ptr %retval.067 }68 69...70---71name: search72alignment: 273exposesReturnsTwice: false74legalized: false75regBankSelected: false76selected: false77failedISel: false78tracksRegLiveness: true79hasWinCFI: false80registers: []81liveins:82 - { reg: '$r0', virtual-reg: '' }83 - { reg: '$r1', virtual-reg: '' }84frameInfo:85 isFrameAddressTaken: false86 isReturnAddressTaken: false87 hasStackMap: false88 hasPatchPoint: false89 stackSize: 090 offsetAdjustment: 091 maxAlignment: 192 adjustsStack: false93 hasCalls: false94 stackProtector: ''95 maxCallFrameSize: 096 cvBytesOfCalleeSavedRegisters: 097 hasOpaqueSPAdjustment: false98 hasVAStart: false99 hasMustTailInVarArgFunc: false100 localFrameSize: 0101 savePoint: []102 restorePoint: []103fixedStack: []104stack: []105callSites: []106constants: []107machineFunctionInfo: {}108body: |109 ; CHECK-LABEL: name: search110 ; CHECK: bb.0.entry:111 ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.6(0x30000000)112 ; CHECK-NEXT: liveins: $r0, $r1113 ; CHECK-NEXT: {{ $}}114 ; CHECK-NEXT: renamable $r2 = t2LDRSHi12 renamable $r1, 2, 14 /* CC::al */, $noreg :: (load (s16) from %ir.idx)115 ; CHECK-NEXT: t2CMPri renamable $r2, -1, 14 /* CC::al */, $noreg, implicit-def $cpsr116 ; CHECK-NEXT: tBcc %bb.6, 13 /* CC::le */, killed $cpsr117 ; CHECK-NEXT: {{ $}}118 ; CHECK-NEXT: bb.1.while.cond.preheader:119 ; CHECK-NEXT: successors: %bb.2(0x80000000)120 ; CHECK-NEXT: liveins: $r0, $r2121 ; CHECK-NEXT: {{ $}}122 ; CHECK-NEXT: tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr123 ; CHECK-NEXT: t2IT 0, 4, implicit-def $itstate124 ; CHECK-NEXT: renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate125 ; CHECK-NEXT: tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate126 ; CHECK-NEXT: tB %bb.2, 14 /* CC::al */, $noreg127 ; CHECK-NEXT: {{ $}}128 ; CHECK-NEXT: bb.2:129 ; CHECK-NEXT: successors: %bb.3(0x80000000)130 ; CHECK-NEXT: liveins: $r0, $r2131 ; CHECK-NEXT: {{ $}}132 ; CHECK-NEXT: renamable $r1 = tUXTH killed renamable $r2, 14 /* CC::al */, $noreg133 ; CHECK-NEXT: {{ $}}134 ; CHECK-NEXT: bb.3.land.rhs:135 ; CHECK-NEXT: successors: %bb.5(0x04000000), %bb.4(0x7c000000)136 ; CHECK-NEXT: liveins: $r0, $r1137 ; CHECK-NEXT: {{ $}}138 ; CHECK-NEXT: renamable $r2 = tLDRi renamable $r0, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.info2)139 ; CHECK-NEXT: renamable $r2 = tLDRHi killed renamable $r2, 1, 14 /* CC::al */, $noreg :: (load (s16) from %ir.idx3)140 ; CHECK-NEXT: tCMPr killed renamable $r2, renamable $r1, 14 /* CC::al */, $noreg, implicit-def $cpsr141 ; CHECK-NEXT: tBcc %bb.5, 0 /* CC::eq */, killed $cpsr142 ; CHECK-NEXT: {{ $}}143 ; CHECK-NEXT: bb.4.while.body:144 ; CHECK-NEXT: successors: %bb.3(0x80000000)145 ; CHECK-NEXT: liveins: $r0, $r1146 ; CHECK-NEXT: {{ $}}147 ; CHECK-NEXT: renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.next4)148 ; CHECK-NEXT: tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr149 ; CHECK-NEXT: t2IT 0, 4, implicit-def $itstate150 ; CHECK-NEXT: renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate151 ; CHECK-NEXT: tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate152 ; CHECK-NEXT: tB %bb.3, 14 /* CC::al */, $noreg153 ; CHECK-NEXT: {{ $}}154 ; CHECK-NEXT: bb.5.return:155 ; CHECK-NEXT: liveins: $r0156 ; CHECK-NEXT: {{ $}}157 ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0158 ; CHECK-NEXT: {{ $}}159 ; CHECK-NEXT: bb.6.while.cond9.preheader:160 ; CHECK-NEXT: successors: %bb.7(0x80000000)161 ; CHECK-NEXT: liveins: $r0, $r1162 ; CHECK-NEXT: {{ $}}163 ; CHECK-NEXT: tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr164 ; CHECK-NEXT: t2IT 0, 4, implicit-def $itstate165 ; CHECK-NEXT: renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate166 ; CHECK-NEXT: tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate167 ; CHECK-NEXT: tB %bb.7, 14 /* CC::al */, $noreg168 ; CHECK-NEXT: {{ $}}169 ; CHECK-NEXT: bb.7.land.rhs11.lr.ph:170 ; CHECK-NEXT: successors: %bb.8(0x80000000)171 ; CHECK-NEXT: liveins: $r0, $r1172 ; CHECK-NEXT: {{ $}}173 ; CHECK-NEXT: renamable $r1 = t2LDRSHi12 killed renamable $r1, 0, 14 /* CC::al */, $noreg :: (load (s16) from %ir.data16143)174 ; CHECK-NEXT: {{ $}}175 ; CHECK-NEXT: bb.8.land.rhs11:176 ; CHECK-NEXT: successors: %bb.9(0x80000000)177 ; CHECK-NEXT: liveins: $r0, $r1178 ; CHECK-NEXT: {{ $}}179 ; CHECK-NEXT: renamable $r2 = tLDRi renamable $r0, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.info12)180 ; CHECK-NEXT: renamable $r2 = tLDRBi killed renamable $r2, 0, 14 /* CC::al */, $noreg :: (load (s8) from %ir.data166, align 2)181 ; CHECK-NEXT: tCMPr killed renamable $r2, renamable $r1, 14 /* CC::al */, $noreg, implicit-def $cpsr182 ; CHECK-NEXT: t2IT 0, 8, implicit-def $itstate183 ; CHECK-NEXT: tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate184 ; CHECK-NEXT: tB %bb.9, 14 /* CC::al */, $noreg185 ; CHECK-NEXT: {{ $}}186 ; CHECK-NEXT: bb.9.while.body19:187 ; CHECK-NEXT: successors: %bb.8(0x80000000)188 ; CHECK-NEXT: liveins: $r0, $r1189 ; CHECK-NEXT: {{ $}}190 ; CHECK-NEXT: renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.next205)191 ; CHECK-NEXT: tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr192 ; CHECK-NEXT: t2IT 0, 4, implicit-def $itstate193 ; CHECK-NEXT: renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate194 ; CHECK-NEXT: tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate195 ; CHECK-NEXT: tB %bb.8, 14 /* CC::al */, $noreg196 bb.0.entry:197 successors: %bb.2(0x50000000), %bb.1(0x30000000)198 liveins: $r0, $r1199 200 renamable $r2 = t2LDRSHi12 renamable $r1, 2, 14 /* CC::al */, $noreg :: (load (s16) from %ir.idx)201 t2CMPri renamable $r2, -1, 14 /* CC::al */, $noreg, implicit-def $cpsr202 t2Bcc %bb.1, 13 /* CC::le */, killed $cpsr203 204 bb.2.while.cond.preheader:205 successors: %bb.3(0x50000000)206 liveins: $r0, $r2207 208 tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr209 t2IT 0, 4, implicit-def $itstate210 renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate211 tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate212 t2B %bb.3, 14 /* CC::al */, $noreg213 214 bb.3:215 successors: %bb.4(0x80000000)216 liveins: $r0, $r2217 218 renamable $r1 = tUXTH killed renamable $r2, 14 /* CC::al */, $noreg219 220 bb.4.land.rhs:221 successors: %bb.9(0x04000000), %bb.5(0x7c000000)222 liveins: $r0, $r1223 224 renamable $r2 = tLDRi renamable $r0, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.info2)225 renamable $r2 = tLDRHi killed renamable $r2, 1, 14 /* CC::al */, $noreg :: (load (s16) from %ir.idx3)226 tCMPr killed renamable $r2, renamable $r1, 14 /* CC::al */, $noreg, implicit-def $cpsr227 t2Bcc %bb.9, 0 /* CC::eq */, killed $cpsr228 229 bb.5.while.body:230 successors: %bb.4(0x7c000000)231 liveins: $r0, $r1232 233 renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.next4)234 tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr235 t2IT 0, 4, implicit-def $itstate236 renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate237 tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate238 t2B %bb.4, 14 /* CC::al */, $noreg239 240 bb.9.return:241 liveins: $r0242 243 tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0244 245 bb.1.while.cond9.preheader:246 successors: %bb.7(0x50000000)247 liveins: $r0, $r1248 249 tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr250 t2IT 0, 4, implicit-def $itstate251 renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate252 tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate253 t2B %bb.7, 14 /* CC::al */, $noreg254 255 bb.7.land.rhs11.lr.ph:256 successors: %bb.8(0x80000000)257 liveins: $r0, $r1258 259 renamable $r1 = t2LDRSHi12 killed renamable $r1, 0, 14 /* CC::al */, $noreg :: (load (s16) from %ir.data16143)260 261 bb.8.land.rhs11:262 successors: %bb.6(0x80000000)263 liveins: $r0, $r1264 265 renamable $r2 = tLDRi renamable $r0, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.info12)266 renamable $r2 = tLDRBi killed renamable $r2, 0, 14 /* CC::al */, $noreg :: (load (s8) from %ir.data166, align 2)267 tCMPr killed renamable $r2, renamable $r1, 14 /* CC::al */, $noreg, implicit-def $cpsr268 t2IT 0, 8, implicit-def $itstate269 tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate270 t2B %bb.6, 14 /* CC::al */, $noreg271 272 bb.6.while.body19:273 successors: %bb.8(0x7c000000)274 liveins: $r0, $r1275 276 renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.next205)277 tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr278 t2IT 0, 4, implicit-def $itstate279 renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate280 tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate281 t2B %bb.8, 14 /* CC::al */, $noreg282 283...284