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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve -tail-predication=enabled %s -o - | FileCheck %s3 4define dso_local arm_aapcs_vfpcc zeroext i8 @one_loop_add_add_v16i8(ptr nocapture readonly %a, ptr nocapture readonly %b, i32 %N) local_unnamed_addr {5; CHECK-LABEL: one_loop_add_add_v16i8:6; CHECK: @ %bb.0: @ %entry7; CHECK-NEXT: push {r7, lr}8; CHECK-NEXT: cbz r2, .LBB0_49; CHECK-NEXT: @ %bb.1: @ %vector.ph10; CHECK-NEXT: vmov.i32 q0, #0x011; CHECK-NEXT: dlstp.8 lr, r212; CHECK-NEXT: .LBB0_2: @ %vector.body13; CHECK-NEXT: @ =>This Inner Loop Header: Depth=114; CHECK-NEXT: vldrb.u8 q1, [r1], #1615; CHECK-NEXT: vldrb.u8 q2, [r0], #1616; CHECK-NEXT: vadd.i8 q0, q2, q117; CHECK-NEXT: vaddv.u8 r12, q018; CHECK-NEXT: letp lr, .LBB0_219; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup20; CHECK-NEXT: uxtb.w r0, r1221; CHECK-NEXT: pop {r7, pc}22; CHECK-NEXT: .LBB0_4:23; CHECK-NEXT: mov.w r12, #024; CHECK-NEXT: uxtb.w r0, r1225; CHECK-NEXT: pop {r7, pc}26entry:27 %cmp11 = icmp eq i32 %N, 028 br i1 %cmp11, label %for.cond.cleanup, label %vector.ph29 30vector.ph: ; preds = %entry31 %n.rnd.up = add i32 %N, 1532 %n.vec = and i32 %n.rnd.up, -1633 br label %vector.body34 35vector.body: ; preds = %vector.body, %vector.ph36 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]37 %vec.phi = phi <16 x i8> [ zeroinitializer, %vector.ph ], [ %i5, %vector.body ]38 %i = getelementptr inbounds i8, ptr %a, i32 %index39 %active.lane.mask = call <16 x i1> @llvm.get.active.lane.mask.v16i1.i32(i32 %index, i32 %N)40 %i1 = bitcast ptr %i to ptr41 %wide.masked.load = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %i1, i32 1, <16 x i1> %active.lane.mask, <16 x i8> undef)42 %i2 = getelementptr inbounds i8, ptr %b, i32 %index43 %i3 = bitcast ptr %i2 to ptr44 %wide.masked.load16 = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %i3, i32 1, <16 x i1> %active.lane.mask, <16 x i8> undef)45 %i4 = add <16 x i8> %wide.masked.load, %wide.masked.load1646 %i5 = select <16 x i1> %active.lane.mask, <16 x i8> %i4, <16 x i8> %vec.phi47 %i6 = call i8 @llvm.vector.reduce.add.v16i8(<16 x i8> %i5)48 %index.next = add i32 %index, 1649 %i7 = icmp eq i32 %index.next, %n.vec50 br i1 %i7, label %middle.block, label %vector.body51 52middle.block: ; preds = %vector.body53 br label %for.cond.cleanup54 55for.cond.cleanup: ; preds = %middle.block, %entry56 %res.0.lcssa = phi i8 [ 0, %entry ], [ %i6, %middle.block ]57 ret i8 %res.0.lcssa58}59 60define dso_local arm_aapcs_vfpcc signext i16 @one_loop_add_add_v8i16(ptr nocapture readonly %a, ptr nocapture readonly %b, i32 %N) local_unnamed_addr {61; CHECK-LABEL: one_loop_add_add_v8i16:62; CHECK: @ %bb.0: @ %entry63; CHECK-NEXT: cmp r2, #064; CHECK-NEXT: ittt eq65; CHECK-NEXT: moveq r0, #066; CHECK-NEXT: sxtheq r0, r067; CHECK-NEXT: bxeq lr68; CHECK-NEXT: .LBB1_1: @ %vector.ph69; CHECK-NEXT: push {r7, lr}70; CHECK-NEXT: adds r3, r2, #771; CHECK-NEXT: vmov.i32 q1, #0x072; CHECK-NEXT: bic r3, r3, #773; CHECK-NEXT: sub.w r12, r3, #874; CHECK-NEXT: movs r3, #175; CHECK-NEXT: add.w r3, r3, r12, lsr #376; CHECK-NEXT: dls lr, r377; CHECK-NEXT: .LBB1_2: @ %vector.body78; CHECK-NEXT: @ =>This Inner Loop Header: Depth=179; CHECK-NEXT: vctp.16 r280; CHECK-NEXT: vmov q0, q181; CHECK-NEXT: vpstt82; CHECK-NEXT: vldrbt.u16 q1, [r0], #883; CHECK-NEXT: vldrbt.u16 q2, [r1], #884; CHECK-NEXT: subs r2, #885; CHECK-NEXT: vadd.i16 q1, q0, q186; CHECK-NEXT: vadd.i16 q1, q1, q287; CHECK-NEXT: le lr, .LBB1_288; CHECK-NEXT: @ %bb.3: @ %middle.block89; CHECK-NEXT: vpsel q0, q1, q090; CHECK-NEXT: vaddv.u16 r0, q091; CHECK-NEXT: pop.w {r7, lr}92; CHECK-NEXT: sxth r0, r093; CHECK-NEXT: bx lr94entry:95 %cmp12 = icmp eq i32 %N, 096 br i1 %cmp12, label %for.cond.cleanup, label %vector.ph97 98vector.ph: ; preds = %entry99 %n.rnd.up = add i32 %N, 7100 %n.vec = and i32 %n.rnd.up, -8101 br label %vector.body102 103vector.body: ; preds = %vector.body, %vector.ph104 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]105 %vec.phi = phi <8 x i16> [ zeroinitializer, %vector.ph ], [ %i7, %vector.body ]106 %i = getelementptr inbounds i8, ptr %a, i32 %index107 %active.lane.mask = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32 %index, i32 %N)108 %i1 = bitcast ptr %i to ptr109 %wide.masked.load = call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %i1, i32 1, <8 x i1> %active.lane.mask, <8 x i8> undef)110 %i2 = zext <8 x i8> %wide.masked.load to <8 x i16>111 %i3 = getelementptr inbounds i8, ptr %b, i32 %index112 %i4 = bitcast ptr %i3 to ptr113 %wide.masked.load17 = call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %i4, i32 1, <8 x i1> %active.lane.mask, <8 x i8> undef)114 %i5 = zext <8 x i8> %wide.masked.load17 to <8 x i16>115 %i6 = add <8 x i16> %vec.phi, %i2116 %i7 = add <8 x i16> %i6, %i5117 %index.next = add i32 %index, 8118 %i8 = icmp eq i32 %index.next, %n.vec119 br i1 %i8, label %middle.block, label %vector.body120 121middle.block: ; preds = %vector.body122 %i9 = select <8 x i1> %active.lane.mask, <8 x i16> %i7, <8 x i16> %vec.phi123 %i10 = call i16 @llvm.vector.reduce.add.v8i16(<8 x i16> %i9)124 br label %for.cond.cleanup125 126for.cond.cleanup: ; preds = %middle.block, %entry127 %res.0.lcssa = phi i16 [ 0, %entry ], [ %i10, %middle.block ]128 ret i16 %res.0.lcssa129}130 131define dso_local arm_aapcs_vfpcc zeroext i8 @one_loop_sub_add_v16i8(ptr nocapture readonly %a, ptr nocapture readonly %b, i32 %N) local_unnamed_addr {132; CHECK-LABEL: one_loop_sub_add_v16i8:133; CHECK: @ %bb.0: @ %entry134; CHECK-NEXT: cmp r2, #0135; CHECK-NEXT: ittt eq136; CHECK-NEXT: moveq r0, #0137; CHECK-NEXT: uxtbeq r0, r0138; CHECK-NEXT: bxeq lr139; CHECK-NEXT: .LBB2_1: @ %vector.ph140; CHECK-NEXT: push {r7, lr}141; CHECK-NEXT: add.w r3, r2, #15142; CHECK-NEXT: vmov.i32 q1, #0x0143; CHECK-NEXT: bic r3, r3, #15144; CHECK-NEXT: sub.w r12, r3, #16145; CHECK-NEXT: movs r3, #1146; CHECK-NEXT: add.w r3, r3, r12, lsr #4147; CHECK-NEXT: dls lr, r3148; CHECK-NEXT: .LBB2_2: @ %vector.body149; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1150; CHECK-NEXT: vctp.8 r2151; CHECK-NEXT: vmov q0, q1152; CHECK-NEXT: vpstt153; CHECK-NEXT: vldrbt.u8 q1, [r1], #16154; CHECK-NEXT: vldrbt.u8 q2, [r0], #16155; CHECK-NEXT: subs r2, #16156; CHECK-NEXT: vsub.i8 q1, q2, q1157; CHECK-NEXT: vadd.i8 q1, q1, q0158; CHECK-NEXT: le lr, .LBB2_2159; CHECK-NEXT: @ %bb.3: @ %middle.block160; CHECK-NEXT: vpsel q0, q1, q0161; CHECK-NEXT: vaddv.u8 r0, q0162; CHECK-NEXT: pop.w {r7, lr}163; CHECK-NEXT: uxtb r0, r0164; CHECK-NEXT: bx lr165entry:166 %cmp11 = icmp eq i32 %N, 0167 br i1 %cmp11, label %for.cond.cleanup, label %vector.ph168 169vector.ph: ; preds = %entry170 %n.rnd.up = add i32 %N, 15171 %n.vec = and i32 %n.rnd.up, -16172 br label %vector.body173 174vector.body: ; preds = %vector.body, %vector.ph175 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]176 %vec.phi = phi <16 x i8> [ zeroinitializer, %vector.ph ], [ %i5, %vector.body ]177 %i = getelementptr inbounds i8, ptr %a, i32 %index178 %active.lane.mask = call <16 x i1> @llvm.get.active.lane.mask.v16i1.i32(i32 %index, i32 %N)179 %i1 = bitcast ptr %i to ptr180 %wide.masked.load = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %i1, i32 1, <16 x i1> %active.lane.mask, <16 x i8> undef)181 %i2 = getelementptr inbounds i8, ptr %b, i32 %index182 %i3 = bitcast ptr %i2 to ptr183 %wide.masked.load16 = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %i3, i32 1, <16 x i1> %active.lane.mask, <16 x i8> undef)184 %i4 = sub <16 x i8> %wide.masked.load, %wide.masked.load16185 %i5 = add <16 x i8> %i4, %vec.phi186 %index.next = add i32 %index, 16187 %i6 = icmp eq i32 %index.next, %n.vec188 br i1 %i6, label %middle.block, label %vector.body189 190middle.block: ; preds = %vector.body191 %i7 = select <16 x i1> %active.lane.mask, <16 x i8> %i5, <16 x i8> %vec.phi192 %i8 = call i8 @llvm.vector.reduce.add.v16i8(<16 x i8> %i7)193 br label %for.cond.cleanup194 195for.cond.cleanup: ; preds = %middle.block, %entry196 %res.0.lcssa = phi i8 [ 0, %entry ], [ %i8, %middle.block ]197 ret i8 %res.0.lcssa198}199 200define dso_local arm_aapcs_vfpcc signext i16 @one_loop_sub_add_v8i16(ptr nocapture readonly %a, ptr nocapture readonly %b, i32 %N) local_unnamed_addr {201; CHECK-LABEL: one_loop_sub_add_v8i16:202; CHECK: @ %bb.0: @ %entry203; CHECK-NEXT: cmp r2, #0204; CHECK-NEXT: ittt eq205; CHECK-NEXT: moveq r0, #0206; CHECK-NEXT: sxtheq r0, r0207; CHECK-NEXT: bxeq lr208; CHECK-NEXT: .LBB3_1: @ %vector.ph209; CHECK-NEXT: push {r7, lr}210; CHECK-NEXT: adds r3, r2, #7211; CHECK-NEXT: vmov.i32 q1, #0x0212; CHECK-NEXT: bic r3, r3, #7213; CHECK-NEXT: sub.w r12, r3, #8214; CHECK-NEXT: movs r3, #1215; CHECK-NEXT: add.w r3, r3, r12, lsr #3216; CHECK-NEXT: dls lr, r3217; CHECK-NEXT: .LBB3_2: @ %vector.body218; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1219; CHECK-NEXT: vctp.16 r2220; CHECK-NEXT: vmov q0, q1221; CHECK-NEXT: vpstt222; CHECK-NEXT: vldrbt.u16 q1, [r0], #8223; CHECK-NEXT: vldrbt.u16 q2, [r1], #8224; CHECK-NEXT: subs r2, #8225; CHECK-NEXT: vsub.i16 q1, q2, q1226; CHECK-NEXT: vadd.i16 q1, q1, q0227; CHECK-NEXT: le lr, .LBB3_2228; CHECK-NEXT: @ %bb.3: @ %middle.block229; CHECK-NEXT: vpsel q0, q1, q0230; CHECK-NEXT: vaddv.u16 r0, q0231; CHECK-NEXT: pop.w {r7, lr}232; CHECK-NEXT: sxth r0, r0233; CHECK-NEXT: bx lr234entry:235 %cmp12 = icmp eq i32 %N, 0236 br i1 %cmp12, label %for.cond.cleanup, label %vector.ph237 238vector.ph: ; preds = %entry239 %n.rnd.up = add i32 %N, 7240 %n.vec = and i32 %n.rnd.up, -8241 br label %vector.body242 243vector.body: ; preds = %vector.body, %vector.ph244 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]245 %vec.phi = phi <8 x i16> [ zeroinitializer, %vector.ph ], [ %i7, %vector.body ]246 %i = getelementptr inbounds i8, ptr %a, i32 %index247 %active.lane.mask = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32 %index, i32 %N)248 %i1 = bitcast ptr %i to ptr249 %wide.masked.load = call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %i1, i32 1, <8 x i1> %active.lane.mask, <8 x i8> undef)250 %i2 = zext <8 x i8> %wide.masked.load to <8 x i16>251 %i3 = getelementptr inbounds i8, ptr %b, i32 %index252 %i4 = bitcast ptr %i3 to ptr253 %wide.masked.load17 = call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %i4, i32 1, <8 x i1> %active.lane.mask, <8 x i8> undef)254 %i5 = zext <8 x i8> %wide.masked.load17 to <8 x i16>255 %i6 = sub <8 x i16> %i5, %i2256 %i7 = add <8 x i16> %i6, %vec.phi257 %index.next = add i32 %index, 8258 %i8 = icmp eq i32 %index.next, %n.vec259 br i1 %i8, label %middle.block, label %vector.body260 261middle.block: ; preds = %vector.body262 %i9 = select <8 x i1> %active.lane.mask, <8 x i16> %i7, <8 x i16> %vec.phi263 %i10 = call i16 @llvm.vector.reduce.add.v8i16(<8 x i16> %i9)264 br label %for.cond.cleanup265 266for.cond.cleanup: ; preds = %middle.block, %entry267 %res.0.lcssa = phi i16 [ 0, %entry ], [ %i10, %middle.block ]268 ret i16 %res.0.lcssa269}270 271define dso_local arm_aapcs_vfpcc zeroext i8 @one_loop_mul_add_v16i8(ptr nocapture readonly %a, ptr nocapture readonly %b, i32 %N) local_unnamed_addr {272; CHECK-LABEL: one_loop_mul_add_v16i8:273; CHECK: @ %bb.0: @ %entry274; CHECK-NEXT: cmp r2, #0275; CHECK-NEXT: ittt eq276; CHECK-NEXT: moveq r0, #0277; CHECK-NEXT: uxtbeq r0, r0278; CHECK-NEXT: bxeq lr279; CHECK-NEXT: .LBB4_1: @ %vector.ph280; CHECK-NEXT: push {r7, lr}281; CHECK-NEXT: add.w r3, r2, #15282; CHECK-NEXT: vmov.i32 q1, #0x0283; CHECK-NEXT: bic r3, r3, #15284; CHECK-NEXT: sub.w r12, r3, #16285; CHECK-NEXT: movs r3, #1286; CHECK-NEXT: add.w r3, r3, r12, lsr #4287; CHECK-NEXT: dls lr, r3288; CHECK-NEXT: .LBB4_2: @ %vector.body289; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1290; CHECK-NEXT: vctp.8 r2291; CHECK-NEXT: vmov q0, q1292; CHECK-NEXT: vpstt293; CHECK-NEXT: vldrbt.u8 q1, [r0], #16294; CHECK-NEXT: vldrbt.u8 q2, [r1], #16295; CHECK-NEXT: subs r2, #16296; CHECK-NEXT: vmul.i8 q1, q2, q1297; CHECK-NEXT: vadd.i8 q1, q1, q0298; CHECK-NEXT: le lr, .LBB4_2299; CHECK-NEXT: @ %bb.3: @ %middle.block300; CHECK-NEXT: vpsel q0, q1, q0301; CHECK-NEXT: vaddv.u8 r0, q0302; CHECK-NEXT: pop.w {r7, lr}303; CHECK-NEXT: uxtb r0, r0304; CHECK-NEXT: bx lr305entry:306 %cmp10 = icmp eq i32 %N, 0307 br i1 %cmp10, label %for.cond.cleanup, label %vector.ph308 309vector.ph: ; preds = %entry310 %n.rnd.up = add i32 %N, 15311 %n.vec = and i32 %n.rnd.up, -16312 br label %vector.body313 314vector.body: ; preds = %vector.body, %vector.ph315 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]316 %vec.phi = phi <16 x i8> [ zeroinitializer, %vector.ph ], [ %i5, %vector.body ]317 %i = getelementptr inbounds i8, ptr %a, i32 %index318 %active.lane.mask = call <16 x i1> @llvm.get.active.lane.mask.v16i1.i32(i32 %index, i32 %N)319 %i1 = bitcast ptr %i to ptr320 %wide.masked.load = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %i1, i32 1, <16 x i1> %active.lane.mask, <16 x i8> undef)321 %i2 = getelementptr inbounds i8, ptr %b, i32 %index322 %i3 = bitcast ptr %i2 to ptr323 %wide.masked.load15 = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %i3, i32 1, <16 x i1> %active.lane.mask, <16 x i8> undef)324 %i4 = mul <16 x i8> %wide.masked.load15, %wide.masked.load325 %i5 = add <16 x i8> %i4, %vec.phi326 %index.next = add i32 %index, 16327 %i6 = icmp eq i32 %index.next, %n.vec328 br i1 %i6, label %middle.block, label %vector.body329 330middle.block: ; preds = %vector.body331 %i7 = select <16 x i1> %active.lane.mask, <16 x i8> %i5, <16 x i8> %vec.phi332 %i8 = call i8 @llvm.vector.reduce.add.v16i8(<16 x i8> %i7)333 br label %for.cond.cleanup334 335for.cond.cleanup: ; preds = %middle.block, %entry336 %res.0.lcssa = phi i8 [ 0, %entry ], [ %i8, %middle.block ]337 ret i8 %res.0.lcssa338}339 340define dso_local arm_aapcs_vfpcc signext i16 @one_loop_mul_add_v8i16(ptr nocapture readonly %a, ptr nocapture readonly %b, i32 %N) local_unnamed_addr {341; CHECK-LABEL: one_loop_mul_add_v8i16:342; CHECK: @ %bb.0: @ %entry343; CHECK-NEXT: cmp r2, #0344; CHECK-NEXT: ittt eq345; CHECK-NEXT: moveq r0, #0346; CHECK-NEXT: sxtheq r0, r0347; CHECK-NEXT: bxeq lr348; CHECK-NEXT: .LBB5_1: @ %vector.ph349; CHECK-NEXT: push {r7, lr}350; CHECK-NEXT: adds r3, r2, #7351; CHECK-NEXT: vmov.i32 q1, #0x0352; CHECK-NEXT: bic r3, r3, #7353; CHECK-NEXT: sub.w r12, r3, #8354; CHECK-NEXT: movs r3, #1355; CHECK-NEXT: add.w r3, r3, r12, lsr #3356; CHECK-NEXT: dls lr, r3357; CHECK-NEXT: .LBB5_2: @ %vector.body358; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1359; CHECK-NEXT: vctp.16 r2360; CHECK-NEXT: vmov q0, q1361; CHECK-NEXT: vpstt362; CHECK-NEXT: vldrbt.u16 q1, [r0], #8363; CHECK-NEXT: vldrbt.u16 q2, [r1], #8364; CHECK-NEXT: subs r2, #8365; CHECK-NEXT: vmul.i16 q1, q2, q1366; CHECK-NEXT: vadd.i16 q1, q1, q0367; CHECK-NEXT: le lr, .LBB5_2368; CHECK-NEXT: @ %bb.3: @ %middle.block369; CHECK-NEXT: vpsel q0, q1, q0370; CHECK-NEXT: vaddv.u16 r0, q0371; CHECK-NEXT: pop.w {r7, lr}372; CHECK-NEXT: sxth r0, r0373; CHECK-NEXT: bx lr374entry:375 %cmp12 = icmp eq i32 %N, 0376 br i1 %cmp12, label %for.cond.cleanup, label %vector.ph377 378vector.ph: ; preds = %entry379 %n.rnd.up = add i32 %N, 7380 %n.vec = and i32 %n.rnd.up, -8381 br label %vector.body382 383vector.body: ; preds = %vector.body, %vector.ph384 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]385 %vec.phi = phi <8 x i16> [ zeroinitializer, %vector.ph ], [ %i7, %vector.body ]386 %i = getelementptr inbounds i8, ptr %a, i32 %index387 %active.lane.mask = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32 %index, i32 %N)388 %i1 = bitcast ptr %i to ptr389 %wide.masked.load = call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %i1, i32 1, <8 x i1> %active.lane.mask, <8 x i8> undef)390 %i2 = zext <8 x i8> %wide.masked.load to <8 x i16>391 %i3 = getelementptr inbounds i8, ptr %b, i32 %index392 %i4 = bitcast ptr %i3 to ptr393 %wide.masked.load17 = call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %i4, i32 1, <8 x i1> %active.lane.mask, <8 x i8> undef)394 %i5 = zext <8 x i8> %wide.masked.load17 to <8 x i16>395 %i6 = mul <8 x i16> %i5, %i2396 %i7 = add <8 x i16> %i6, %vec.phi397 %index.next = add i32 %index, 8398 %i8 = icmp eq i32 %index.next, %n.vec399 br i1 %i8, label %middle.block, label %vector.body400 401middle.block: ; preds = %vector.body402 %i9 = select <8 x i1> %active.lane.mask, <8 x i16> %i7, <8 x i16> %vec.phi403 %i10 = call i16 @llvm.vector.reduce.add.v8i16(<8 x i16> %i9)404 br label %for.cond.cleanup405 406for.cond.cleanup: ; preds = %middle.block, %entry407 %res.0.lcssa = phi i16 [ 0, %entry ], [ %i10, %middle.block ]408 ret i16 %res.0.lcssa409}410 411define dso_local arm_aapcs_vfpcc i32 @two_loops_mul_add_v4i32(ptr nocapture readonly %a, ptr nocapture readonly %b, i32 %N) local_unnamed_addr {412; CHECK-LABEL: two_loops_mul_add_v4i32:413; CHECK: @ %bb.0: @ %entry414; CHECK-NEXT: cmp r2, #0415; CHECK-NEXT: itt eq416; CHECK-NEXT: moveq r0, #0417; CHECK-NEXT: bxeq lr418; CHECK-NEXT: .LBB6_1: @ %vector.ph419; CHECK-NEXT: push {r4, r5, r6, r7, lr}420; CHECK-NEXT: adds r3, r2, #3421; CHECK-NEXT: vmov.i32 q1, #0x0422; CHECK-NEXT: bic r3, r3, #3423; CHECK-NEXT: mov r4, r0424; CHECK-NEXT: subs r7, r3, #4425; CHECK-NEXT: movs r3, #1426; CHECK-NEXT: mov r5, r1427; CHECK-NEXT: add.w r6, r3, r7, lsr #2428; CHECK-NEXT: mov r3, r2429; CHECK-NEXT: dls lr, r6430; CHECK-NEXT: .LBB6_2: @ %vector.body431; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1432; CHECK-NEXT: vctp.32 r3433; CHECK-NEXT: vmov q0, q1434; CHECK-NEXT: vpstt435; CHECK-NEXT: vldrbt.u32 q1, [r4], #4436; CHECK-NEXT: vldrbt.u32 q2, [r5], #4437; CHECK-NEXT: subs r3, #4438; CHECK-NEXT: vmul.i32 q1, q2, q1439; CHECK-NEXT: vadd.i32 q1, q1, q0440; CHECK-NEXT: le lr, .LBB6_2441; CHECK-NEXT: @ %bb.3: @ %middle.block442; CHECK-NEXT: vpsel q0, q1, q0443; CHECK-NEXT: vaddv.u32 r12, q0444; CHECK-NEXT: cbz r2, .LBB6_7445; CHECK-NEXT: @ %bb.4: @ %vector.ph47446; CHECK-NEXT: movs r3, #0447; CHECK-NEXT: vdup.32 q0, r3448; CHECK-NEXT: movs r3, #1449; CHECK-NEXT: vmov.32 q0[0], r12450; CHECK-NEXT: add.w r3, r3, r7, lsr #2451; CHECK-NEXT: dls lr, r3452; CHECK-NEXT: .LBB6_5: @ %vector.body46453; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1454; CHECK-NEXT: vctp.32 r2455; CHECK-NEXT: vmov q1, q0456; CHECK-NEXT: vpstt457; CHECK-NEXT: vldrbt.u32 q0, [r0], #4458; CHECK-NEXT: vldrbt.u32 q2, [r1], #4459; CHECK-NEXT: subs r2, #4460; CHECK-NEXT: vmul.i32 q0, q2, q0461; CHECK-NEXT: vadd.i32 q0, q0, q1462; CHECK-NEXT: le lr, .LBB6_5463; CHECK-NEXT: @ %bb.6: @ %middle.block44464; CHECK-NEXT: vpsel q0, q0, q1465; CHECK-NEXT: vaddv.u32 r12, q0466; CHECK-NEXT: .LBB6_7:467; CHECK-NEXT: pop.w {r4, r5, r6, r7, lr}468; CHECK-NEXT: mov r0, r12469; CHECK-NEXT: bx lr470entry:471 %cmp35 = icmp eq i32 %N, 0472 br i1 %cmp35, label %for.cond.cleanup7, label %vector.ph473 474vector.ph: ; preds = %entry475 %n.rnd.up = add i32 %N, 3476 %n.vec = and i32 %n.rnd.up, -4477 br label %vector.body478 479vector.body: ; preds = %vector.body, %vector.ph480 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]481 %vec.phi = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %i7, %vector.body ]482 %i = getelementptr inbounds i8, ptr %a, i32 %index483 %active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)484 %i1 = bitcast ptr %i to ptr485 %wide.masked.load = call <4 x i8> @llvm.masked.load.v4i8.p0(ptr %i1, i32 1, <4 x i1> %active.lane.mask, <4 x i8> undef)486 %i2 = zext <4 x i8> %wide.masked.load to <4 x i32>487 %i3 = getelementptr inbounds i8, ptr %b, i32 %index488 %i4 = bitcast ptr %i3 to ptr489 %wide.masked.load43 = call <4 x i8> @llvm.masked.load.v4i8.p0(ptr %i4, i32 1, <4 x i1> %active.lane.mask, <4 x i8> undef)490 %i5 = zext <4 x i8> %wide.masked.load43 to <4 x i32>491 %i6 = mul nuw nsw <4 x i32> %i5, %i2492 %i7 = add <4 x i32> %i6, %vec.phi493 %index.next = add i32 %index, 4494 %i8 = icmp eq i32 %index.next, %n.vec495 br i1 %i8, label %middle.block, label %vector.body496 497middle.block: ; preds = %vector.body498 %i9 = select <4 x i1> %active.lane.mask, <4 x i32> %i7, <4 x i32> %vec.phi499 %i10 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %i9)500 br i1 %cmp35, label %for.cond.cleanup7, label %vector.ph47501 502vector.ph47: ; preds = %middle.block503 %n.rnd.up48 = add i32 %N, 3504 %n.vec50 = and i32 %n.rnd.up48, -4505 %i11 = insertelement <4 x i32> <i32 undef, i32 0, i32 0, i32 0>, i32 %i10, i32 0506 br label %vector.body46507 508vector.body46: ; preds = %vector.body46, %vector.ph47509 %index51 = phi i32 [ 0, %vector.ph47 ], [ %index.next52, %vector.body46 ]510 %vec.phi60 = phi <4 x i32> [ %i11, %vector.ph47 ], [ %i19, %vector.body46 ]511 %i12 = getelementptr inbounds i8, ptr %a, i32 %index51512 %active.lane.mask61 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index51, i32 %N)513 %i13 = bitcast ptr %i12 to ptr514 %wide.masked.load62 = call <4 x i8> @llvm.masked.load.v4i8.p0(ptr %i13, i32 1, <4 x i1> %active.lane.mask61, <4 x i8> undef)515 %i14 = zext <4 x i8> %wide.masked.load62 to <4 x i32>516 %i15 = getelementptr inbounds i8, ptr %b, i32 %index51517 %i16 = bitcast ptr %i15 to ptr518 %wide.masked.load63 = call <4 x i8> @llvm.masked.load.v4i8.p0(ptr %i16, i32 1, <4 x i1> %active.lane.mask61, <4 x i8> undef)519 %i17 = zext <4 x i8> %wide.masked.load63 to <4 x i32>520 %i18 = mul nuw nsw <4 x i32> %i17, %i14521 %i19 = add <4 x i32> %i18, %vec.phi60522 %index.next52 = add i32 %index51, 4523 %i20 = icmp eq i32 %index.next52, %n.vec50524 br i1 %i20, label %middle.block44, label %vector.body46525 526middle.block44: ; preds = %vector.body46527 %i21 = select <4 x i1> %active.lane.mask61, <4 x i32> %i19, <4 x i32> %vec.phi60528 %i22 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %i21)529 br label %for.cond.cleanup7530 531for.cond.cleanup7: ; preds = %middle.block44, %middle.block, %entry532 %res.1.lcssa = phi i32 [ %i10, %middle.block ], [ 0, %entry ], [ %i22, %middle.block44 ]533 ret i32 %res.1.lcssa534}535 536define dso_local arm_aapcs_vfpcc void @two_reductions_mul_add_v8i16(ptr nocapture readonly %a, ptr nocapture readonly %b, i32 %N) local_unnamed_addr {537; CHECK-LABEL: two_reductions_mul_add_v8i16:538; CHECK: @ %bb.0: @ %entry539; CHECK-NEXT: push {r4, lr}540; CHECK-NEXT: vpush {d8, d9}541; CHECK-NEXT: cbz r2, .LBB7_4542; CHECK-NEXT: @ %bb.1: @ %vector.ph543; CHECK-NEXT: adds r3, r2, #7544; CHECK-NEXT: movs r4, #1545; CHECK-NEXT: bic r3, r3, #7546; CHECK-NEXT: vmov.i32 q1, #0x0547; CHECK-NEXT: subs r3, #8548; CHECK-NEXT: vmov.i32 q3, #0x0549; CHECK-NEXT: add.w r12, r4, r3, lsr #3550; CHECK-NEXT: mov r3, r0551; CHECK-NEXT: mov r4, r1552; CHECK-NEXT: dls lr, r12553; CHECK-NEXT: .LBB7_2: @ %vector.body554; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1555; CHECK-NEXT: vctp.16 r2556; CHECK-NEXT: vmov q0, q1557; CHECK-NEXT: vpstt558; CHECK-NEXT: vldrbt.u16 q1, [r3], #8559; CHECK-NEXT: vldrbt.u16 q4, [r4], #8560; CHECK-NEXT: vmov q2, q3561; CHECK-NEXT: subs r2, #8562; CHECK-NEXT: vsub.i16 q3, q4, q1563; CHECK-NEXT: vmul.i16 q1, q4, q1564; CHECK-NEXT: vadd.i16 q3, q3, q2565; CHECK-NEXT: vadd.i16 q1, q1, q0566; CHECK-NEXT: le lr, .LBB7_2567; CHECK-NEXT: @ %bb.3: @ %middle.block568; CHECK-NEXT: vpsel q2, q3, q2569; CHECK-NEXT: vpsel q0, q1, q0570; CHECK-NEXT: vaddv.u16 r4, q2571; CHECK-NEXT: vaddv.u16 r2, q0572; CHECK-NEXT: b .LBB7_5573; CHECK-NEXT: .LBB7_4:574; CHECK-NEXT: movs r2, #0575; CHECK-NEXT: movs r4, #0576; CHECK-NEXT: .LBB7_5: @ %for.cond.cleanup577; CHECK-NEXT: strb r2, [r0]578; CHECK-NEXT: strb r4, [r1]579; CHECK-NEXT: vpop {d8, d9}580; CHECK-NEXT: pop {r4, pc}581entry:582 %cmp12 = icmp eq i32 %N, 0583 br i1 %cmp12, label %for.cond.cleanup, label %vector.ph584 585vector.ph: ; preds = %entry586 %n.rnd.up = add i32 %N, 7587 %n.vec = and i32 %n.rnd.up, -8588 br label %vector.body589 590vector.body: ; preds = %vector.body, %vector.ph591 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]592 %vec.phi = phi <8 x i16> [ zeroinitializer, %vector.ph ], [ %i8, %vector.body ]593 %vec.phi.1 = phi <8 x i16> [ zeroinitializer, %vector.ph ], [ %i9, %vector.body ]594 %i = getelementptr inbounds i8, ptr %a, i32 %index595 %active.lane.mask = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32 %index, i32 %N)596 %i1 = bitcast ptr %i to ptr597 %wide.masked.load = call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %i1, i32 1, <8 x i1> %active.lane.mask, <8 x i8> undef)598 %i2 = zext <8 x i8> %wide.masked.load to <8 x i16>599 %i3 = getelementptr inbounds i8, ptr %b, i32 %index600 %i4 = bitcast ptr %i3 to ptr601 %wide.masked.load17 = call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %i4, i32 1, <8 x i1> %active.lane.mask, <8 x i8> undef)602 %i5 = zext <8 x i8> %wide.masked.load17 to <8 x i16>603 %i6 = mul <8 x i16> %i5, %i2604 %i7 = sub <8 x i16> %i5, %i2605 %i8 = add <8 x i16> %i6, %vec.phi606 %i9 = add <8 x i16> %i7, %vec.phi.1607 %index.next = add i32 %index, 8608 %i10 = icmp eq i32 %index.next, %n.vec609 br i1 %i10, label %middle.block, label %vector.body610 611middle.block: ; preds = %vector.body612 %i11 = select <8 x i1> %active.lane.mask, <8 x i16> %i8, <8 x i16> %vec.phi613 %i12 = call i16 @llvm.vector.reduce.add.v8i16(<8 x i16> %i11)614 %i13 = select <8 x i1> %active.lane.mask, <8 x i16> %i9, <8 x i16> %vec.phi.1615 %i14 = call i16 @llvm.vector.reduce.add.v8i16(<8 x i16> %i13)616 br label %for.cond.cleanup617 618for.cond.cleanup: ; preds = %middle.block, %entry619 %res.0.lcssa = phi i16 [ 0, %entry ], [ %i12, %middle.block ]620 %res.1.lcssa = phi i16 [ 0, %entry ], [ %i14, %middle.block ]621 %trunc.res.0 = trunc i16 %res.0.lcssa to i8622 store i8 %trunc.res.0, ptr %a623 %trunc.res.1 = trunc i16 %res.1.lcssa to i8624 store i8 %trunc.res.1, ptr %b625 ret void626}627 628%struct.date = type { i32, i32, i32, i32 }629@days = internal unnamed_addr constant [2 x [13 x i32]] [[13 x i32] [i32 0, i32 31, i32 28, i32 31, i32 30, i32 31, i32 30, i32 31, i32 31, i32 30, i32 31, i32 30, i32 31], [13 x i32] [i32 0, i32 31, i32 29, i32 31, i32 30, i32 31, i32 30, i32 31, i32 31, i32 30, i32 31, i32 30, i32 31]], align 4630define i32 @wrongop(ptr nocapture readonly %pd) {631; CHECK-LABEL: wrongop:632; CHECK: @ %bb.0: @ %entry633; CHECK-NEXT: push {r4, lr}634; CHECK-NEXT: mov r1, r0635; CHECK-NEXT: movw r12, #47184636; CHECK-NEXT: movw r3, #23593637; CHECK-NEXT: ldrd r2, lr, [r1, #4]638; CHECK-NEXT: movt r12, #1310639; CHECK-NEXT: movt r3, #49807640; CHECK-NEXT: mla r3, lr, r3, r12641; CHECK-NEXT: movw r1, #55051642; CHECK-NEXT: movw r4, #23593643; CHECK-NEXT: movt r1, #163644; CHECK-NEXT: ldr r0, [r0]645; CHECK-NEXT: movt r4, #655646; CHECK-NEXT: ror.w r12, r3, #4647; CHECK-NEXT: cmp r12, r1648; CHECK-NEXT: cset r1, lo649; CHECK-NEXT: ror.w r3, r3, #2650; CHECK-NEXT: mov.w r12, #1651; CHECK-NEXT: cmp r3, r4652; CHECK-NEXT: csel r3, r1, r12, lo653; CHECK-NEXT: lsls.w r4, lr, #30654; CHECK-NEXT: csel r1, r1, r3, ne655; CHECK-NEXT: cmp r2, #1656; CHECK-NEXT: it lt657; CHECK-NEXT: poplt {r4, pc}658; CHECK-NEXT: .LBB8_1: @ %vector.ph659; CHECK-NEXT: movw r3, :lower16:days660; CHECK-NEXT: movs r4, #52661; CHECK-NEXT: movt r3, :upper16:days662; CHECK-NEXT: smlabb r1, r1, r4, r3663; CHECK-NEXT: movs r3, #0664; CHECK-NEXT: vdup.32 q0, r3665; CHECK-NEXT: vmov.32 q0[0], r0666; CHECK-NEXT: adds r0, r2, #3667; CHECK-NEXT: bic r0, r0, #3668; CHECK-NEXT: subs r0, #4669; CHECK-NEXT: add.w r0, r12, r0, lsr #2670; CHECK-NEXT: dls lr, r0671; CHECK-NEXT: .LBB8_2: @ %vector.body672; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1673; CHECK-NEXT: vctp.32 r2674; CHECK-NEXT: vmov q1, q0675; CHECK-NEXT: vpst676; CHECK-NEXT: vldrwt.u32 q0, [r1], #16677; CHECK-NEXT: subs r2, #4678; CHECK-NEXT: vadd.i32 q0, q0, q1679; CHECK-NEXT: le lr, .LBB8_2680; CHECK-NEXT: @ %bb.3: @ %middle.block681; CHECK-NEXT: vpsel q0, q0, q1682; CHECK-NEXT: vaddv.u32 r0, q0683; CHECK-NEXT: pop {r4, pc}684entry:685 %day1 = getelementptr inbounds %struct.date, ptr %pd, i32 0, i32 0686 %0 = load i32, ptr %day1, align 4687 %year = getelementptr inbounds %struct.date, ptr %pd, i32 0, i32 2688 %1 = load i32, ptr %year, align 4689 %2 = and i32 %1, 3690 %cmp = icmp ne i32 %2, 0691 %rem3 = srem i32 %1, 100692 %cmp4.not = icmp eq i32 %rem3, 0693 %or.cond = or i1 %cmp, %cmp4.not694 br i1 %or.cond, label %lor.rhs, label %lor.end695 696lor.rhs: ; preds = %entry697 %rem6 = srem i32 %1, 400698 %cmp7 = icmp eq i32 %rem6, 0699 %phi.cast = zext i1 %cmp7 to i32700 br label %lor.end701 702lor.end: ; preds = %entry, %lor.rhs703 %3 = phi i32 [ %phi.cast, %lor.rhs ], [ 1, %entry ]704 %month = getelementptr inbounds %struct.date, ptr %pd, i32 0, i32 1705 %4 = load i32, ptr %month, align 4706 %cmp820 = icmp sgt i32 %4, 0707 br i1 %cmp820, label %vector.ph, label %for.end708 709vector.ph: ; preds = %lor.end710 %n.rnd.up = add i32 %4, 3711 %n.vec = and i32 %n.rnd.up, -4712 %5 = insertelement <4 x i32> <i32 undef, i32 0, i32 0, i32 0>, i32 %0, i32 0713 br label %vector.body714 715vector.body: ; preds = %vector.body, %vector.ph716 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]717 %vec.phi = phi <4 x i32> [ %5, %vector.ph ], [ %8, %vector.body ]718 %6 = getelementptr inbounds [2 x [13 x i32]], ptr @days, i32 0, i32 %3, i32 %index719 %active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %4)720 %7 = bitcast ptr %6 to ptr721 %wide.masked.load = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr nonnull %7, i32 4, <4 x i1> %active.lane.mask, <4 x i32> undef)722 %8 = add <4 x i32> %wide.masked.load, %vec.phi723 %index.next = add i32 %index, 4724 %9 = icmp eq i32 %index.next, %n.vec725 br i1 %9, label %middle.block, label %vector.body726 727middle.block: ; preds = %vector.body728 %10 = select <4 x i1> %active.lane.mask, <4 x i32> %8, <4 x i32> %vec.phi729 %11 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %10)730 br label %for.end731 732for.end: ; preds = %middle.block, %lor.end733 %day.0.lcssa = phi i32 [ %0, %lor.end ], [ %11, %middle.block ]734 ret i32 %day.0.lcssa735}736 737declare <4 x i32> @llvm.masked.load.v4i32.p0(ptr, i32 immarg, <4 x i1>, <4 x i32>)738declare <16 x i1> @llvm.get.active.lane.mask.v16i1.i32(i32, i32)739declare <16 x i8> @llvm.masked.load.v16i8.p0(ptr, i32 immarg, <16 x i1>, <16 x i8>)740declare i8 @llvm.vector.reduce.add.v16i8(<16 x i8>)741declare <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32, i32)742declare <8 x i8> @llvm.masked.load.v8i8.p0(ptr, i32 immarg, <8 x i1>, <8 x i8>)743declare i16 @llvm.vector.reduce.add.v8i16(<8 x i16>)744declare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32, i32)745declare <4 x i8> @llvm.masked.load.v4i8.p0(ptr, i32 immarg, <4 x i1>, <4 x i8>)746declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>)747