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1# RUN: llc -mtriple=thumbv8.1m.main -run-pass=arm-low-overhead-loops --verify-machineinstrs %s -o - | FileCheck %s2# CHECK-NOT: t2DLS3# CHECK: bb.5.for.inc16:4# CHECK: $lr = t2SUBri killed renamable $lr, 1, 14 /* CC::al */, $noreg, def $cpsr5# CHECK-NOT: t2CMPri $lr6# CHECK: tBcc %bb.6, 1 /* CC::ne */7# CHECK: tB %bb.28# CHECK: bb.6.for.cond4.preheader:9 10--- |11 ; ModuleID = 'revert-non-header.ll'12 source_filename = "revert-non-header.ll"13 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"14 target triple = "thumbv8.1m.main"15 16 define void @header_not_target_unrolled_loop(ptr nocapture %v, i32 %n) {17 entry:18 %cmp56 = icmp sgt i32 %n, 119 br i1 %cmp56, label %for.cond1.preheader.preheader, label %for.end2020 21 for.cond1.preheader.preheader: ; preds = %entry22 br label %for.cond1.preheader23 24 for.cond.loopexit: ; preds = %for.inc16, %for.cond1.preheader25 %cmp = icmp sgt i32 %gap.057.in, 326 br i1 %cmp, label %for.cond1.preheader, label %for.end2027 28 for.cond1.preheader: ; preds = %for.cond1.preheader.preheader, %for.cond.loopexit29 %gap.057.in = phi i32 [ %gap.057, %for.cond.loopexit ], [ %n, %for.cond1.preheader.preheader ]30 %gap.057 = sdiv i32 %gap.057.in, 231 %cmp252 = icmp slt i32 %gap.057, %n32 %tmp = sub i32 %n, %gap.05733 %start = call i32 @llvm.start.loop.iterations.i32(i32 %tmp)34 br i1 %cmp252, label %for.cond4.preheader.preheader, label %for.cond.loopexit35 36 for.cond4.preheader.preheader: ; preds = %for.cond1.preheader37 %tmp2 = mul i32 %gap.057, -438 %tmp6 = mul i32 %gap.057, -239 %scevgep1 = getelementptr i32, ptr %v, i32 %gap.05740 %0 = shl i32 %gap.057, 241 br label %for.cond4.preheader42 43 for.cond4.preheader: ; preds = %for.inc16, %for.cond4.preheader.preheader44 %lsr.iv2 = phi ptr [ %scevgep3, %for.inc16 ], [ %scevgep1, %for.cond4.preheader.preheader ]45 %lsr.iv = phi ptr [ %v, %for.cond4.preheader.preheader ], [ %scevgep, %for.inc16 ]46 %i.053 = phi i32 [ %inc, %for.inc16 ], [ %gap.057, %for.cond4.preheader.preheader ]47 %tmp8 = phi i32 [ %start, %for.cond4.preheader.preheader ], [ %tmp16, %for.inc16 ]48 %j.048 = sub nsw i32 %i.053, %gap.05749 %cmp549 = icmp sgt i32 %j.048, -150 br i1 %cmp549, label %land.rhs.preheader, label %for.inc1651 52 land.rhs.preheader: ; preds = %for.cond4.preheader53 br label %land.rhs54 55 land.rhs: ; preds = %land.rhs.preheader, %for.body856 %lsr.iv4 = phi i32 [ %lsr.iv.next, %for.body8 ], [ 0, %land.rhs.preheader ]57 %j.051 = phi i32 [ %j.0, %for.body8 ], [ %j.048, %land.rhs.preheader ]58 %1 = bitcast ptr %lsr.iv2 to ptr59 %2 = bitcast ptr %lsr.iv to ptr60 %uglygep3 = getelementptr i8, ptr %2, i32 %lsr.iv461 %uglygep34 = bitcast ptr %uglygep3 to ptr62 %tmp9 = load i32, ptr %uglygep34, align 463 %uglygep1 = getelementptr i8, ptr %1, i32 %lsr.iv464 %uglygep12 = bitcast ptr %uglygep1 to ptr65 %tmp12 = load i32, ptr %uglygep12, align 466 %cmp7 = icmp sgt i32 %tmp9, %tmp1267 br i1 %cmp7, label %for.body8, label %for.inc1668 69 for.body8: ; preds = %land.rhs70 %3 = bitcast ptr %lsr.iv2 to ptr71 %4 = bitcast ptr %lsr.iv to ptr72 %sunkaddr = getelementptr i8, ptr %4, i32 %lsr.iv473 %5 = bitcast ptr %sunkaddr to ptr74 store i32 %tmp12, ptr %5, align 475 %uglygep = getelementptr i8, ptr %3, i32 %lsr.iv476 %uglygep6 = bitcast ptr %uglygep to ptr77 store i32 %tmp9, ptr %uglygep6, align 478 %j.0 = sub nsw i32 %j.051, %gap.05779 %lsr.iv.next = add i32 %lsr.iv4, %080 %cmp5 = icmp sgt i32 %j.0, -181 br i1 %cmp5, label %land.rhs, label %for.inc1682 83 for.inc16: ; preds = %for.body8, %land.rhs, %for.cond4.preheader84 %inc = add nsw i32 %i.053, 185 %scevgep = getelementptr i32, ptr %lsr.iv, i32 186 %tmp16 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %tmp8, i32 1)87 %tmp17 = icmp ne i32 %tmp16, 088 %scevgep3 = getelementptr i32, ptr %lsr.iv2, i32 189 br i1 %tmp17, label %for.cond4.preheader, label %for.cond.loopexit90 91 for.end20: ; preds = %for.cond.loopexit, %entry92 ret void93 }94 95 ; Function Attrs: noduplicate nounwind96 declare i32 @llvm.start.loop.iterations.i32(i32) #097 98 ; Function Attrs: noduplicate nounwind99 declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) #0100 101 ; Function Attrs: nounwind102 declare void @llvm.stackprotector(ptr, ptr) #1103 104 attributes #0 = { noduplicate nounwind }105 attributes #1 = { nounwind }106 107...108---109name: header_not_target_unrolled_loop110alignment: 2111exposesReturnsTwice: false112legalized: false113regBankSelected: false114selected: false115failedISel: false116tracksRegLiveness: true117hasWinCFI: false118registers: []119liveins:120 - { reg: '$r0', virtual-reg: '' }121 - { reg: '$r1', virtual-reg: '' }122frameInfo:123 isFrameAddressTaken: false124 isReturnAddressTaken: false125 hasStackMap: false126 hasPatchPoint: false127 stackSize: 32128 offsetAdjustment: 0129 maxAlignment: 4130 adjustsStack: false131 hasCalls: false132 stackProtector: ''133 maxCallFrameSize: 0134 cvBytesOfCalleeSavedRegisters: 0135 hasOpaqueSPAdjustment: false136 hasVAStart: false137 hasMustTailInVarArgFunc: false138 localFrameSize: 0139 savePoint: []140 restorePoint: []141fixedStack: []142stack:143 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, 144 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false, 145 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }146 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, 147 stack-id: default, callee-saved-register: '$r10', callee-saved-restored: true, 148 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }149 - { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4, 150 stack-id: default, callee-saved-register: '$r9', callee-saved-restored: true, 151 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }152 - { id: 3, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4, 153 stack-id: default, callee-saved-register: '$r8', callee-saved-restored: true, 154 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }155 - { id: 4, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4, 156 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, 157 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }158 - { id: 5, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4, 159 stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true, 160 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }161 - { id: 6, name: '', type: spill-slot, offset: -28, size: 4, alignment: 4, 162 stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true, 163 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }164 - { id: 7, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4, 165 stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true, 166 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }167callSites: []168constants: []169machineFunctionInfo: {}170body: |171 bb.0.entry:172 successors: %bb.1(0x40000000), %bb.9(0x40000000)173 liveins: $r0, $r1, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $lr174 175 $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $lr176 frame-setup CFI_INSTRUCTION def_cfa_offset 32177 frame-setup CFI_INSTRUCTION offset $lr, -4178 frame-setup CFI_INSTRUCTION offset $r10, -8179 frame-setup CFI_INSTRUCTION offset $r9, -12180 frame-setup CFI_INSTRUCTION offset $r8, -16181 frame-setup CFI_INSTRUCTION offset $r7, -20182 frame-setup CFI_INSTRUCTION offset $r6, -24183 frame-setup CFI_INSTRUCTION offset $r5, -28184 frame-setup CFI_INSTRUCTION offset $r4, -32185 tCMPi8 renamable $r1, 2, 14, $noreg, implicit-def $cpsr186 tBcc %bb.9, 11, killed $cpsr187 188 bb.1:189 successors: %bb.3(0x80000000)190 liveins: $r0, $r1191 192 $r9 = tMOVr $r1, 14, $noreg193 tB %bb.3, 14, $noreg194 195 bb.2.for.cond.loopexit:196 successors: %bb.3(0x7c000000), %bb.9(0x04000000)197 liveins: $r0, $r1, $r9, $r12198 199 t2CMPri killed renamable $r12, 4, 14, $noreg, implicit-def $cpsr200 tBcc %bb.9, 11, killed $cpsr201 202 bb.3.for.cond1.preheader:203 successors: %bb.4(0x40000000), %bb.2(0x40000000)204 liveins: $r0, $r1, $r9205 206 renamable $r2 = t2ADDrs $r9, $r9, 251, 14, $noreg, $noreg207 $r12 = tMOVr killed $r9, 14, $noreg208 renamable $lr = t2SUBrs renamable $r1, renamable $r2, 9, 14, $noreg, $noreg209 renamable $r9 = t2ASRri renamable $r2, 1, 14, $noreg, $noreg210 t2CMPrs renamable $r1, killed renamable $r2, 9, 14, $noreg, implicit-def $cpsr211 $lr = t2DoLoopStart renamable $lr212 tBcc %bb.2, 13, killed $cpsr213 214 bb.4.for.cond4.preheader.preheader:215 successors: %bb.7(0x50000000), %bb.5(0x30000000)216 liveins: $lr, $r0, $r1, $r9, $r12217 218 renamable $r3 = t2ADDrs renamable $r0, renamable $r9, 18, 14, $noreg, $noreg219 renamable $r10 = t2LSLri renamable $r9, 2, 14, $noreg, $noreg220 $r5 = tMOVr $r0, 14, $noreg221 $r8 = tMOVr $r9, 14, $noreg222 renamable $r7 = nsw t2SUBrr renamable $r8, renamable $r9, 14, $noreg, def $cpsr223 tBcc %bb.7, 5, killed $cpsr224 225 bb.5.for.inc16:226 successors: %bb.6(0x7c000000), %bb.2(0x04000000)227 liveins: $lr, $r0, $r1, $r3, $r5, $r8, $r9, $r10, $r12228 229 renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 4, 14, $noreg230 renamable $r5, dead $cpsr = tADDi8 killed renamable $r5, 4, 14, $noreg231 renamable $r8 = nsw t2ADDri killed renamable $r8, 1, 14, $noreg, $noreg232 renamable $lr = t2LoopDec killed renamable $lr, 1233 t2LoopEnd renamable $lr, %bb.6, implicit-def dead $cpsr234 tB %bb.2, 14, $noreg235 236 bb.6.for.cond4.preheader:237 successors: %bb.7(0x50000000), %bb.5(0x30000000)238 liveins: $lr, $r0, $r1, $r3, $r5, $r8, $r9, $r10, $r12239 240 renamable $r7 = nsw t2SUBrr renamable $r8, renamable $r9, 14, $noreg, def $cpsr241 tBcc %bb.5, 4, killed $cpsr242 243 bb.7.land.rhs.preheader:244 successors: %bb.8(0x80000000)245 liveins: $lr, $r0, $r1, $r3, $r5, $r7, $r8, $r9, $r10, $r12246 247 renamable $r6, dead $cpsr = tMOVi8 0, 14, $noreg248 249 bb.8.land.rhs:250 successors: %bb.5(0x07e00000), %bb.8(0x78200000)251 liveins: $lr, $r0, $r1, $r3, $r5, $r6, $r7, $r8, $r9, $r10, $r12252 253 renamable $r4 = tLDRr renamable $r3, $r6, 14, $noreg :: (load (s32) from %ir.uglygep12)254 renamable $r2 = tLDRr renamable $r5, $r6, 14, $noreg :: (load (s32) from %ir.uglygep34)255 tCMPr renamable $r2, renamable $r4, 14, $noreg, implicit-def $cpsr256 t2IT 12, 1, implicit-def $itstate257 tSTRr killed renamable $r4, renamable $r5, $r6, 12, $cpsr, implicit $itstate :: (store (s32) into %ir.5)258 tSTRr killed renamable $r2, renamable $r3, $r6, 12, $cpsr, implicit $itstate :: (store (s32) into %ir.uglygep6)259 renamable $r6 = tADDhirr killed renamable $r6, renamable $r10, 12, $cpsr, implicit $r6, implicit $itstate260 renamable $r7 = nsw t2SUBrr killed renamable $r7, renamable $r9, 12, $cpsr, $noreg, implicit $r7, implicit killed $itstate261 t2IT 12, 8, implicit-def $itstate262 t2CMPri renamable $r7, -1, 12, killed $cpsr, implicit-def $cpsr, implicit killed $itstate263 tBcc %bb.8, 12, killed $cpsr264 tB %bb.5, 14, $noreg265 266 bb.9.for.end20:267 $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $pc268 269...270