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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve -run-pass=arm-low-overhead-loops %s -o - --verify-machineinstrs | FileCheck %s3--- |4 source_filename = "skip-vpt-debug.c"5 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"6 target triple = "thumbv8.1m.main-arm-none-eabihf"7 8 define hidden void @arm_max_no_idx_f32(ptr nocapture readonly %pSrc, i32 %blockSize, ptr nocapture %pResult) local_unnamed_addr #0 !dbg !13 {9 entry:10 call void @llvm.dbg.value(metadata ptr %pSrc, metadata !24, metadata !DIExpression()), !dbg !2911 call void @llvm.dbg.value(metadata i32 %blockSize, metadata !25, metadata !DIExpression()), !dbg !2912 call void @llvm.dbg.value(metadata ptr %pResult, metadata !26, metadata !DIExpression()), !dbg !2913 call void @llvm.dbg.value(metadata float 0x3810000000000000, metadata !27, metadata !DIExpression()), !dbg !2914 %cmp.not7 = icmp eq i32 %blockSize, 0, !dbg !3015 br i1 %cmp.not7, label %while.end, label %vector.ph, !dbg !3116 17 vector.ph: ; preds = %entry18 %n.rnd.up = add i32 %blockSize, 3, !dbg !3119 %n.vec = and i32 %n.rnd.up, -4, !dbg !3120 %0 = add i32 %n.vec, -4, !dbg !3121 %1 = lshr i32 %0, 2, !dbg !3122 %2 = add nuw nsw i32 %1, 1, !dbg !3123 %3 = call i32 @llvm.start.loop.iterations.i32(i32 %2), !dbg !3124 br label %vector.body, !dbg !3125 26 vector.body: ; preds = %vector.body, %vector.ph27 %lsr.iv1 = phi ptr [ %scevgep, %vector.body ], [ %pSrc, %vector.ph ]28 %vec.phi = phi <4 x float> [ <float 0x3810000000000000, float 0x3810000000000000, float 0x3810000000000000, float 0x3810000000000000>, %vector.ph ], [ %10, %vector.body ]29 %4 = phi i32 [ %3, %vector.ph ], [ %11, %vector.body ]30 %5 = phi i32 [ %blockSize, %vector.ph ], [ %7, %vector.body ]31 %lsr.iv12 = bitcast ptr %lsr.iv1 to ptr32 %6 = call <4 x i1> @llvm.arm.mve.vctp32(i32 %5)33 %7 = sub i32 %5, 434 %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %lsr.iv12, i32 4, <4 x i1> %6, <4 x float> poison), !dbg !32, !tbaa !3435 %8 = fcmp nnan ninf nsz olt <4 x float> %vec.phi, %wide.masked.load, !dbg !3836 %9 = and <4 x i1> %6, %8, !dbg !4037 %10 = select <4 x i1> %9, <4 x float> %wide.masked.load, <4 x float> %vec.phi, !dbg !4038 %scevgep = getelementptr float, ptr %lsr.iv1, i32 439 %11 = call i32 @llvm.loop.decrement.reg.i32(i32 %4, i32 1)40 %12 = icmp ne i32 %11, 041 br i1 %12, label %vector.body, label %middle.block, !llvm.loop !4142 43 middle.block: ; preds = %vector.body44 %13 = call nnan ninf nsz float @llvm.vector.reduce.fmax.v4f32(<4 x float> %10), !dbg !3145 br label %while.end, !dbg !4546 47 while.end: ; preds = %middle.block, %entry48 %maxValue.0.lcssa = phi float [ 0x3810000000000000, %entry ], [ %13, %middle.block ], !dbg !2949 store float %maxValue.0.lcssa, ptr %pResult, align 4, !dbg !45, !tbaa !3450 ret void, !dbg !4651 }52 53 declare void @llvm.dbg.value(metadata, metadata, metadata) #154 55 declare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32, i32) #256 57 declare <4 x float> @llvm.masked.load.v4f32.p0(ptr, i32 immarg, <4 x i1>, <4 x float>) #358 59 declare float @llvm.vector.reduce.fmax.v4f32(<4 x float>) #260 61 declare i32 @llvm.start.loop.iterations.i32(i32) #462 63 declare i32 @llvm.loop.decrement.reg.i32(i32, i32) #464 65 declare <4 x i1> @llvm.arm.mve.vctp32(i32) #566 67 attributes #0 = { nofree norecurse nounwind optsize "denormal-fp-math"="preserve-sign,preserve-sign" "denormal-fp-math-f32"="ieee,ieee" "frame-pointer"="none" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="cortex-m55" "target-features"="+armv8.1-m.main,+dsp,+fp-armv8d16,+fp-armv8d16sp,+fp16,+fp64,+fullfp16,+hwdiv,+lob,+mve,+mve.fp,+ras,+thumb-mode,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp,+vfp4d16,+vfp4d16sp,-aes,-bf16,-cdecp0,-cdecp1,-cdecp2,-cdecp3,-cdecp4,-cdecp5,-cdecp6,-cdecp7,-crc,-crypto,-dotprod,-fp16fml,-hwdiv-arm,-i8mm,-sb,-sha2" }68 attributes #1 = { nofree nosync nounwind readnone speculatable willreturn }69 attributes #2 = { nofree nosync nounwind readnone willreturn }70 attributes #3 = { argmemonly nofree nosync nounwind readonly willreturn }71 attributes #4 = { noduplicate nofree nosync nounwind willreturn }72 attributes #5 = { nounwind readnone }73 74 !llvm.dbg.cu = !{!0}75 !llvm.module.flags = !{!3, !4, !5, !6, !7, !8, !9, !10, !11}76 !llvm.ident = !{!12}77 78 !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "Component: ARM Compiler 6.17.0.0 (permissive) Tool: armclang [00000000]", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)79 !1 = !DIFile(filename: "skip-vpt-debug.c", directory: "/home/vicspe01")80 !2 = !{}81 !3 = !{i32 7, !"Dwarf Version", i32 4}82 !4 = !{i32 2, !"Debug Info Version", i32 3}83 !5 = !{i32 1, !"wchar_size", i32 4}84 !6 = !{i32 1, !"static_rwdata", i32 1}85 !7 = !{i32 1, !"enumsize_buildattr", i32 2}86 !8 = !{i32 1, !"armlib_unavailable", i32 0}87 !9 = !{i32 8, !"branch-target-enforcement", i32 0}88 !10 = !{i32 8, !"sign-return-address", i32 0}89 !11 = !{i32 8, !"sign-return-address-all", i32 0}90 !12 = !{!"Component: ARM Compiler 6.17.0.0 (permissive) Tool: armclang [00000000]"}91 !13 = distinct !DISubprogram(name: "arm_max_no_idx_f32", scope: !1, file: !1, line: 5, type: !14, scopeLine: 6, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !23)92 !14 = !DISubroutineType(types: !15)93 !15 = !{null, !16, !20, !22}94 !16 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !17, size: 32)95 !17 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !18)96 !18 = !DIDerivedType(tag: DW_TAG_typedef, name: "float32_t", file: !1, line: 1, baseType: !19)97 !19 = !DIBasicType(name: "float", size: 32, encoding: DW_ATE_float)98 !20 = !DIDerivedType(tag: DW_TAG_typedef, name: "uint32_t", file: !1, line: 2, baseType: !21)99 !21 = !DIBasicType(name: "unsigned int", size: 32, encoding: DW_ATE_unsigned)100 !22 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !18, size: 32)101 !23 = !{!24, !25, !26, !27, !28}102 !24 = !DILocalVariable(name: "pSrc", arg: 1, scope: !13, file: !1, line: 5, type: !16)103 !25 = !DILocalVariable(name: "blockSize", arg: 2, scope: !13, file: !1, line: 5, type: !20)104 !26 = !DILocalVariable(name: "pResult", arg: 3, scope: !13, file: !1, line: 6, type: !22)105 !27 = !DILocalVariable(name: "maxValue", scope: !13, file: !1, line: 7, type: !18)106 !28 = !DILocalVariable(name: "newVal", scope: !13, file: !1, line: 8, type: !18)107 !29 = !DILocation(line: 0, scope: !13)108 !30 = !DILocation(line: 10, column: 20, scope: !13)109 !31 = !DILocation(line: 10, column: 3, scope: !13)110 !32 = !DILocation(line: 11, column: 14, scope: !33)111 !33 = distinct !DILexicalBlock(scope: !13, file: !1, line: 10, column: 26)112 !34 = !{!35, !35, i64 0}113 !35 = !{!"float", !36, i64 0}114 !36 = !{!"omnipotent char", !37, i64 0}115 !37 = !{!"Simple C/C++ TBAA"}116 !38 = !DILocation(line: 12, column: 18, scope: !39)117 !39 = distinct !DILexicalBlock(scope: !33, file: !1, line: 12, column: 9)118 !40 = !DILocation(line: 12, column: 9, scope: !33)119 !41 = distinct !{!41, !31, !42, !43, !44}120 !42 = !DILocation(line: 15, column: 3, scope: !13)121 !43 = !{!"llvm.loop.mustprogress"}122 !44 = !{!"llvm.loop.isvectorized", i32 1}123 !45 = !DILocation(line: 16, column: 12, scope: !13)124 !46 = !DILocation(line: 17, column: 1, scope: !13)125 126...127---128name: arm_max_no_idx_f32129alignment: 4130exposesReturnsTwice: false131legalized: false132regBankSelected: false133selected: false134failedISel: false135tracksRegLiveness: true136hasWinCFI: false137registers: []138liveins:139 - { reg: '$r0', virtual-reg: '' }140 - { reg: '$r1', virtual-reg: '' }141 - { reg: '$r2', virtual-reg: '' }142frameInfo:143 isFrameAddressTaken: false144 isReturnAddressTaken: false145 hasStackMap: false146 hasPatchPoint: false147 stackSize: 8148 offsetAdjustment: 0149 maxAlignment: 4150 adjustsStack: false151 hasCalls: false152 stackProtector: ''153 maxCallFrameSize: 0154 cvBytesOfCalleeSavedRegisters: 0155 hasOpaqueSPAdjustment: false156 hasVAStart: false157 hasMustTailInVarArgFunc: false158 localFrameSize: 0159 savePoint: []160 restorePoint: []161fixedStack: []162stack:163 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,164 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,165 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }166 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,167 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,168 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }169callSites: []170debugValueSubstitutions: []171constants:172 - id: 0173 value: float 0x3810000000000000174 alignment: 4175 isTargetSpecific: false176machineFunctionInfo: {}177body: |178 ; CHECK-LABEL: name: arm_max_no_idx_f32179 ; CHECK: bb.0.entry:180 ; CHECK-NEXT: successors: %bb.4(0x30000000), %bb.1(0x50000000)181 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r7182 ; CHECK-NEXT: {{ $}}183 ; CHECK-NEXT: DBG_VALUE $r0, $noreg, !24, !DIExpression(), debug-location !29184 ; CHECK-NEXT: DBG_VALUE $r1, $noreg, !25, !DIExpression(), debug-location !29185 ; CHECK-NEXT: DBG_VALUE $r1, $noreg, !25, !DIExpression(), debug-location !29186 ; CHECK-NEXT: DBG_VALUE $r2, $noreg, !26, !DIExpression(), debug-location !29187 ; CHECK-NEXT: DBG_VALUE $r2, $noreg, !26, !DIExpression(), debug-location !29188 ; CHECK-NEXT: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp189 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8190 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4191 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -8192 ; CHECK-NEXT: DBG_VALUE float 0x3810000000000000, $noreg, !27, !DIExpression(), debug-location !29193 ; CHECK-NEXT: DBG_VALUE $r0, $noreg, !24, !DIExpression(), debug-location !29194 ; CHECK-NEXT: tCBZ renamable $r1, %bb.4, debug-location !31195 ; CHECK-NEXT: {{ $}}196 ; CHECK-NEXT: bb.1.vector.ph:197 ; CHECK-NEXT: successors: %bb.2(0x80000000)198 ; CHECK-NEXT: liveins: $r0, $r1, $r2199 ; CHECK-NEXT: {{ $}}200 ; CHECK-NEXT: DBG_VALUE float 0x3810000000000000, $noreg, !27, !DIExpression(), debug-location !29201 ; CHECK-NEXT: DBG_VALUE $r2, $noreg, !26, !DIExpression(), debug-location !29202 ; CHECK-NEXT: DBG_VALUE $r1, $noreg, !25, !DIExpression(), debug-location !29203 ; CHECK-NEXT: DBG_VALUE $r0, $noreg, !24, !DIExpression(), debug-location !29204 ; CHECK-NEXT: renamable $q0 = MVE_VMOVimmi32 1152, 0, $noreg, $noreg, undef renamable $q0205 ; CHECK-NEXT: $lr = MVE_DLSTP_32 killed renamable $r1, debug-location !31206 ; CHECK-NEXT: {{ $}}207 ; CHECK-NEXT: bb.2.vector.body (align 4):208 ; CHECK-NEXT: successors: %bb.2(0x7c000000), %bb.3(0x04000000)209 ; CHECK-NEXT: liveins: $lr, $q0, $r0, $r2210 ; CHECK-NEXT: {{ $}}211 ; CHECK-NEXT: DBG_VALUE float 0x3810000000000000, $noreg, !27, !DIExpression(), debug-location !29212 ; CHECK-NEXT: DBG_VALUE $r2, $noreg, !26, !DIExpression(), debug-location !29213 ; CHECK-NEXT: renamable $r0, renamable $q1 = MVE_VLDRWU32_post killed renamable $r0, 16, 0, $noreg, $noreg, debug-location !32 :: (load (s128) from %ir.lsr.iv12, align 4, !tbaa !34)214 ; CHECK-NEXT: DBG_VALUE $r0, $noreg, !24, !DIExpression(DW_OP_LLVM_entry_value, 1), debug-location !29215 ; CHECK-NEXT: MVE_VPTv4f32 8, renamable $q1, renamable $q0, 12, implicit-def $vpr, debug-location !40216 ; CHECK-NEXT: renamable $q0 = MVE_VORR killed renamable $q1, killed renamable $q1, 1, killed renamable $vpr, $noreg, killed renamable $q0, debug-location !40217 ; CHECK-NEXT: DBG_VALUE $r1, $noreg, !25, !DIExpression(DW_OP_LLVM_entry_value, 1), debug-location !29218 ; CHECK-NEXT: $lr = MVE_LETP killed renamable $lr, %bb.2219 ; CHECK-NEXT: {{ $}}220 ; CHECK-NEXT: bb.3.middle.block:221 ; CHECK-NEXT: successors: %bb.5(0x80000000)222 ; CHECK-NEXT: liveins: $q0, $r2223 ; CHECK-NEXT: {{ $}}224 ; CHECK-NEXT: DBG_VALUE float 0x3810000000000000, $noreg, !27, !DIExpression(), debug-location !29225 ; CHECK-NEXT: DBG_VALUE $r2, $noreg, !26, !DIExpression(), debug-location !29226 ; CHECK-NEXT: renamable $s4 = nnan ninf nsz VFP_VMAXNMS renamable $s2, renamable $s3, debug-location !31227 ; CHECK-NEXT: renamable $s0 = nnan ninf nsz VFP_VMAXNMS killed renamable $s0, killed renamable $s1, implicit killed $q0, debug-location !31228 ; CHECK-NEXT: renamable $s0 = nnan ninf nsz VFP_VMAXNMS killed renamable $s0, killed renamable $s4, debug-location !31229 ; CHECK-NEXT: tB %bb.5, 14 /* CC::al */, $noreg230 ; CHECK-NEXT: {{ $}}231 ; CHECK-NEXT: bb.4:232 ; CHECK-NEXT: successors: %bb.5(0x80000000)233 ; CHECK-NEXT: liveins: $r2234 ; CHECK-NEXT: {{ $}}235 ; CHECK-NEXT: DBG_VALUE float 0x3810000000000000, $noreg, !27, !DIExpression(), debug-location !29236 ; CHECK-NEXT: DBG_VALUE $r2, $noreg, !26, !DIExpression(), debug-location !29237 ; CHECK-NEXT: DBG_VALUE $r1, $noreg, !25, !DIExpression(), debug-location !29238 ; CHECK-NEXT: DBG_VALUE $r0, $noreg, !24, !DIExpression(), debug-location !29239 ; CHECK-NEXT: renamable $s0 = VLDRS %const.0, 0, 14 /* CC::al */, $noreg :: (load (s32) from constant-pool)240 ; CHECK-NEXT: {{ $}}241 ; CHECK-NEXT: bb.5.while.end:242 ; CHECK-NEXT: liveins: $r2, $s0243 ; CHECK-NEXT: {{ $}}244 ; CHECK-NEXT: DBG_VALUE float 0x3810000000000000, $noreg, !27, !DIExpression(), debug-location !29245 ; CHECK-NEXT: DBG_VALUE $r2, $noreg, !26, !DIExpression(), debug-location !29246 ; CHECK-NEXT: VSTRS killed renamable $s0, killed renamable $r2, 0, 14 /* CC::al */, $noreg, debug-location !45 :: (store (s32) into %ir.pResult, !tbaa !34)247 ; CHECK-NEXT: frame-destroy tPOP_RET 14 /* CC::al */, $noreg, def $r7, def $pc, debug-location !46248 ; CHECK-NEXT: {{ $}}249 ; CHECK-NEXT: bb.6 (align 4):250 ; CHECK-NEXT: CONSTPOOL_ENTRY 0, %const.0, 4251 bb.0.entry:252 successors: %bb.4(0x30000000), %bb.1(0x50000000)253 liveins: $r0, $r1, $r2, $r7, $lr254 255 DBG_VALUE $r0, $noreg, !24, !DIExpression(), debug-location !29256 DBG_VALUE $r1, $noreg, !25, !DIExpression(), debug-location !29257 DBG_VALUE $r1, $noreg, !25, !DIExpression(), debug-location !29258 DBG_VALUE $r2, $noreg, !26, !DIExpression(), debug-location !29259 DBG_VALUE $r2, $noreg, !26, !DIExpression(), debug-location !29260 frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp261 frame-setup CFI_INSTRUCTION def_cfa_offset 8262 frame-setup CFI_INSTRUCTION offset $lr, -4263 frame-setup CFI_INSTRUCTION offset $r7, -8264 DBG_VALUE float 0x3810000000000000, $noreg, !27, !DIExpression(), debug-location !29265 DBG_VALUE $r0, $noreg, !24, !DIExpression(), debug-location !29266 tCBZ renamable $r1, %bb.4, debug-location !31267 268 bb.1.vector.ph:269 successors: %bb.2(0x80000000)270 liveins: $r0, $r1, $r2271 272 DBG_VALUE float 0x3810000000000000, $noreg, !27, !DIExpression(), debug-location !29273 DBG_VALUE $r2, $noreg, !26, !DIExpression(), debug-location !29274 DBG_VALUE $r1, $noreg, !25, !DIExpression(), debug-location !29275 DBG_VALUE $r0, $noreg, !24, !DIExpression(), debug-location !29276 renamable $r3, dead $cpsr = tADDi3 renamable $r1, 3, 14 /* CC::al */, $noreg, debug-location !31277 renamable $r3 = t2BICri killed renamable $r3, 3, 14 /* CC::al */, $noreg, $noreg, debug-location !31278 renamable $r12 = t2SUBri killed renamable $r3, 4, 14 /* CC::al */, $noreg, $noreg, debug-location !31279 renamable $r3, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg280 renamable $r3 = nuw nsw t2ADDrs killed renamable $r3, killed renamable $r12, 19, 14 /* CC::al */, $noreg, $noreg, debug-location !31281 renamable $q0 = MVE_VMOVimmi32 1152, 0, $noreg, $noreg, undef renamable $q0282 renamable $lr = t2DoLoopStartTP killed renamable $r3, renamable $r1, debug-location !31283 284 bb.2.vector.body (align 4):285 successors: %bb.2(0x7c000000), %bb.3(0x04000000)286 liveins: $lr, $q0, $r0, $r1, $r2287 288 DBG_VALUE float 0x3810000000000000, $noreg, !27, !DIExpression(), debug-location !29289 DBG_VALUE $r2, $noreg, !26, !DIExpression(), debug-location !29290 renamable $vpr = MVE_VCTP32 renamable $r1, 0, $noreg, $noreg291 MVE_VPST 2, implicit $vpr, debug-location !32292 renamable $r0, renamable $q1 = MVE_VLDRWU32_post killed renamable $r0, 16, 1, renamable $vpr, $noreg, debug-location !32 :: (load (s128) from %ir.lsr.iv12, align 4, !tbaa !34)293 DBG_VALUE $r0, $noreg, !24, !DIExpression(DW_OP_LLVM_entry_value, 1), debug-location !29294 renamable $vpr = MVE_VCMPf32 renamable $q1, renamable $q0, 12, 1, killed renamable $vpr, $noreg, debug-location !40295 renamable $q0 = MVE_VORR killed renamable $q1, renamable $q1, 1, killed renamable $vpr, $noreg, killed renamable $q0, debug-location !40296 renamable $r1, dead $cpsr = tSUBi8 killed renamable $r1, 4, 14 /* CC::al */, $noreg297 DBG_VALUE $r1, $noreg, !25, !DIExpression(DW_OP_LLVM_entry_value, 1), debug-location !29298 renamable $lr = t2LoopEndDec killed renamable $lr, %bb.2, implicit-def dead $cpsr299 tB %bb.3, 14 /* CC::al */, $noreg300 301 bb.3.middle.block:302 successors: %bb.5(0x80000000)303 liveins: $q0, $r2304 305 DBG_VALUE float 0x3810000000000000, $noreg, !27, !DIExpression(), debug-location !29306 DBG_VALUE $r2, $noreg, !26, !DIExpression(), debug-location !29307 renamable $s4 = nnan ninf nsz VFP_VMAXNMS renamable $s2, renamable $s3, debug-location !31308 renamable $s0 = nnan ninf nsz VFP_VMAXNMS killed renamable $s0, killed renamable $s1, implicit $q0, debug-location !31309 renamable $s0 = nnan ninf nsz VFP_VMAXNMS killed renamable $s0, killed renamable $s4, debug-location !31310 tB %bb.5, 14 /* CC::al */, $noreg311 312 bb.4:313 successors: %bb.5(0x80000000)314 liveins: $r2315 316 DBG_VALUE float 0x3810000000000000, $noreg, !27, !DIExpression(), debug-location !29317 DBG_VALUE $r2, $noreg, !26, !DIExpression(), debug-location !29318 DBG_VALUE $r1, $noreg, !25, !DIExpression(), debug-location !29319 DBG_VALUE $r0, $noreg, !24, !DIExpression(), debug-location !29320 renamable $s0 = VLDRS %const.0, 0, 14 /* CC::al */, $noreg :: (load (s32) from constant-pool)321 322 bb.5.while.end:323 liveins: $r2, $s0324 325 DBG_VALUE float 0x3810000000000000, $noreg, !27, !DIExpression(), debug-location !29326 DBG_VALUE $r2, $noreg, !26, !DIExpression(), debug-location !29327 VSTRS killed renamable $s0, killed renamable $r2, 0, 14 /* CC::al */, $noreg, debug-location !45 :: (store (s32) into %ir.pResult, !tbaa !34)328 frame-destroy tPOP_RET 14 /* CC::al */, $noreg, def $r7, def $pc, debug-location !46329 330 bb.6 (align 4):331 CONSTPOOL_ENTRY 0, %const.0, 4332 333...334