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1# RUN: llc -mtriple=thumbv8.1m.main %s -run-pass=arm-low-overhead-loops --verify-machineinstrs -o -2# CHECK:      bb.1.for.body.preheader:3# CHECK:        $lr = t2DLS4# CHECK-NOT:    t2LoopDec5# CHECK:      bb.6.for.inc:6# CHECK:        $lr = t2LEUpdate renamable $lr, %bb.27 8--- |9  ; ModuleID = 'switch.ll'10  source_filename = "switch.ll"11  target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"12  target triple = "thumbv8.1m.main"13  14  define dso_local arm_aapcscc i32 @search(ptr nocapture readonly %c, i32 %N) {15  entry:16    %cmp11 = icmp eq i32 %N, 017    br i1 %cmp11, label %for.cond.cleanup, label %for.body.preheader18  19  for.body.preheader:                               ; preds = %entry20    %start = call i32 @llvm.start.loop.iterations.i32(i32 %N)21    br label %for.body22  23  for.cond.cleanup:                                 ; preds = %for.inc, %entry24    %found.0.lcssa = phi i32 [ 0, %entry ], [ %found.1, %for.inc ]25    %spaces.0.lcssa = phi i32 [ 0, %entry ], [ %spaces.1, %for.inc ]26    %sub = sub nsw i32 %found.0.lcssa, %spaces.0.lcssa27    ret i32 %sub28  29  for.body:                                         ; preds = %for.inc, %for.body.preheader30    %lsr.iv1 = phi ptr [ %c, %for.body.preheader ], [ %scevgep, %for.inc ]31    %spaces.013 = phi i32 [ %spaces.1, %for.inc ], [ 0, %for.body.preheader ]32    %found.012 = phi i32 [ %found.1, %for.inc ], [ 0, %for.body.preheader ]33    %0 = phi i32 [ %start, %for.body.preheader ], [ %3, %for.inc ]34    %1 = load i8, ptr %lsr.iv1, align 135    %2 = zext i8 %1 to i3236    switch i32 %2, label %for.inc [37      i32 108, label %sw.bb38      i32 111, label %sw.bb39      i32 112, label %sw.bb40      i32 32, label %sw.bb141    ]42  43  sw.bb:                                            ; preds = %for.body, %for.body, %for.body44    %inc = add nsw i32 %found.012, 145    br label %for.inc46  47  sw.bb1:                                           ; preds = %for.body48    %inc2 = add nsw i32 %spaces.013, 149    br label %for.inc50  51  for.inc:                                          ; preds = %sw.bb1, %sw.bb, %for.body52    %found.1 = phi i32 [ %found.012, %for.body ], [ %found.012, %sw.bb1 ], [ %inc, %sw.bb ]53    %spaces.1 = phi i32 [ %spaces.013, %for.body ], [ %inc2, %sw.bb1 ], [ %spaces.013, %sw.bb ]54    %scevgep = getelementptr i8, ptr %lsr.iv1, i32 155    %3 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %0, i32 1)56    %4 = icmp ne i32 %3, 057    br i1 %4, label %for.body, label %for.cond.cleanup58  }59  60  ; Function Attrs: noduplicate nounwind61  declare i32 @llvm.start.loop.iterations.i32(i32) #062  63  ; Function Attrs: noduplicate nounwind64  declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) #065  66  ; Function Attrs: nounwind67  declare void @llvm.stackprotector(ptr, ptr) #168  69  attributes #0 = { noduplicate nounwind }70  attributes #1 = { nounwind }71 72...73---74name:            search75alignment:       276exposesReturnsTwice: false77legalized:       false78regBankSelected: false79selected:        false80failedISel:      false81tracksRegLiveness: true82hasWinCFI:       false83registers:       []84liveins:85  - { reg: '$r0', virtual-reg: '' }86  - { reg: '$r1', virtual-reg: '' }87frameInfo:88  isFrameAddressTaken: false89  isReturnAddressTaken: false90  hasStackMap:     false91  hasPatchPoint:   false92  stackSize:       893  offsetAdjustment: 094  maxAlignment:    495  adjustsStack:    false96  hasCalls:        false97  stackProtector:  ''98  maxCallFrameSize: 099  cvBytesOfCalleeSavedRegisters: 0100  hasOpaqueSPAdjustment: false101  hasVAStart:      false102  hasMustTailInVarArgFunc: false103  localFrameSize:  0104  savePoint:       []105  restorePoint:    []106fixedStack:      []107stack:108  - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, 109      stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false, 110      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }111  - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, 112      stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true, 113      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }114callSites:       []115constants:       []116machineFunctionInfo: {}117body:             |118  bb.0.entry:119    successors: %bb.7(0x30000000), %bb.1(0x50000000)120    liveins: $r0, $r1, $r4, $lr121  122    frame-setup tPUSH 14, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp123    frame-setup CFI_INSTRUCTION def_cfa_offset 8124    frame-setup CFI_INSTRUCTION offset $lr, -4125    frame-setup CFI_INSTRUCTION offset $r4, -8126    tCBZ $r1, %bb.7127  128  bb.1.for.body.preheader:129    successors: %bb.4(0x80000000)130    liveins: $r0, $r1131  132    $lr = tMOVr $r1, 14, $noreg133    $lr = t2DoLoopStart killed $r1134    renamable $r1, dead $cpsr = tMOVi8 0, 14, $noreg135    renamable $r12 = t2MOVi 1, 14, $noreg, $noreg136    renamable $r2, dead $cpsr = tMOVi8 0, 14, $noreg137    tB %bb.4, 14, $noreg138  139  bb.2.for.body:140    successors: %bb.3(0x80000000)141    liveins: $lr, $r0, $r1, $r2, $r3, $r12142  143    tCMPi8 killed renamable $r3, 32, 14, $noreg, implicit-def $cpsr144    t2IT 0, 8, implicit-def $itstate145    renamable $r1 = nsw tADDi8 $noreg, killed renamable $r1, 1, 0, killed $cpsr, implicit $r1, implicit killed $itstate146  147  bb.3.for.inc:148    successors: %bb.4(0x7c000000), %bb.8(0x04000000)149    liveins: $lr, $r0, $r1, $r2, $r12150  151    renamable $r0, dead $cpsr = tADDi8 killed renamable $r0, 1, 14, $noreg152    renamable $lr = t2LoopDec killed renamable $lr, 1153    t2LoopEnd renamable $lr, %bb.4, implicit-def dead $cpsr154    tB %bb.8, 14, $noreg155  156  bb.4.for.body:157    successors: %bb.2(0x26666665), %bb.5(0x5999999b)158    liveins: $lr, $r0, $r1, $r2, $r12159  160    renamable $r3 = tLDRBi renamable $r0, 0, 14, $noreg :: (load (s8) from %ir.lsr.iv1)161    renamable $r4 = t2SUBri renamable $r3, 108, 14, $noreg, $noreg162    tCMPi8 renamable $r4, 4, 14, $noreg, implicit-def $cpsr163    tBcc %bb.2, 8, killed $cpsr164  165  bb.5.for.body:166    successors: %bb.6(0x6db6db6e), %bb.2(0x12492492)167    liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r12168  169    renamable $r4 = t2LSLrr renamable $r12, killed renamable $r4, 14, $noreg, $noreg170    t2TSTri killed renamable $r4, 25, 14, $noreg, implicit-def $cpsr171    tBcc %bb.2, 0, killed $cpsr172  173  bb.6.sw.bb:174    successors: %bb.3(0x80000000)175    liveins: $lr, $r0, $r1, $r2, $r12176  177    renamable $r2, dead $cpsr = nsw tADDi8 killed renamable $r2, 1, 14, $noreg178    tB %bb.3, 14, $noreg179  180  bb.7:181    successors: %bb.8(0x80000000)182  183    renamable $r2, dead $cpsr = tMOVi8 0, 14, $noreg184    renamable $r1, dead $cpsr = tMOVi8 0, 14, $noreg185  186  bb.8.for.cond.cleanup:187    liveins: $r1, $r2188  189    renamable $r0, dead $cpsr = nsw tSUBrr killed renamable $r2, killed renamable $r1, 14, $noreg190    tPOP_RET 14, $noreg, def $r4, def $pc, implicit killed $r0191 192...193