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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs -tail-predication=enabled -o - %s | FileCheck %s3 4define arm_aapcs_vfpcc void @usub_sat(ptr noalias nocapture readonly %pSrcA, ptr noalias nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %blockSize) {5; CHECK-LABEL: usub_sat:6; CHECK: @ %bb.0: @ %entry7; CHECK-NEXT: .save {r7, lr}8; CHECK-NEXT: push {r7, lr}9; CHECK-NEXT: cmp r3, #010; CHECK-NEXT: it eq11; CHECK-NEXT: popeq {r7, pc}12; CHECK-NEXT: .LBB0_1: @ %vector.ph13; CHECK-NEXT: dlstp.16 lr, r314; CHECK-NEXT: .LBB0_2: @ %vector.body15; CHECK-NEXT: @ =>This Inner Loop Header: Depth=116; CHECK-NEXT: vldrh.u16 q0, [r1], #1617; CHECK-NEXT: vldrh.u16 q1, [r0], #1618; CHECK-NEXT: vqsub.u16 q0, q1, q019; CHECK-NEXT: vstrh.16 q0, [r2], #1620; CHECK-NEXT: letp lr, .LBB0_221; CHECK-NEXT: @ %bb.3: @ %while.end22; CHECK-NEXT: pop {r7, pc}23entry:24 %cmp7 = icmp eq i32 %blockSize, 025 br i1 %cmp7, label %while.end, label %vector.ph26 27vector.ph: ; preds = %entry28 %n.rnd.up = add i32 %blockSize, 729 %n.vec = and i32 %n.rnd.up, -830 br label %vector.body31 32vector.body: ; preds = %vector.body, %vector.ph33 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]34 %next.gep = getelementptr i16, ptr %pSrcA, i32 %index35 %next.gep20 = getelementptr i16, ptr %pDst, i32 %index36 %next.gep21 = getelementptr i16, ptr %pSrcB, i32 %index37 %active.lane.mask = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32 %index, i32 %blockSize)38 %wide.masked.load = call <8 x i16> @llvm.masked.load.v8i16.p0(ptr %next.gep, i32 2, <8 x i1> %active.lane.mask, <8 x i16> undef)39 %wide.masked.load24 = call <8 x i16> @llvm.masked.load.v8i16.p0(ptr %next.gep21, i32 2, <8 x i1> %active.lane.mask, <8 x i16> undef)40 %0 = call <8 x i16> @llvm.usub.sat.v8i16(<8 x i16> %wide.masked.load, <8 x i16> %wide.masked.load24)41 call void @llvm.masked.store.v8i16.p0(<8 x i16> %0, ptr %next.gep20, i32 2, <8 x i1> %active.lane.mask)42 %index.next = add i32 %index, 843 %1 = icmp eq i32 %index.next, %n.vec44 br i1 %1, label %while.end, label %vector.body45 46while.end: ; preds = %vector.body, %entry47 ret void48}49 50define arm_aapcs_vfpcc void @ssub_sat(ptr noalias nocapture readonly %pSrcA, ptr noalias nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %blockSize) {51; CHECK-LABEL: ssub_sat:52; CHECK: @ %bb.0: @ %entry53; CHECK-NEXT: .save {r7, lr}54; CHECK-NEXT: push {r7, lr}55; CHECK-NEXT: cmp r3, #056; CHECK-NEXT: it eq57; CHECK-NEXT: popeq {r7, pc}58; CHECK-NEXT: .LBB1_1: @ %vector.ph59; CHECK-NEXT: dlstp.16 lr, r360; CHECK-NEXT: .LBB1_2: @ %vector.body61; CHECK-NEXT: @ =>This Inner Loop Header: Depth=162; CHECK-NEXT: vldrh.u16 q0, [r1], #1663; CHECK-NEXT: vldrh.u16 q1, [r0], #1664; CHECK-NEXT: vqsub.s16 q0, q1, q065; CHECK-NEXT: vstrh.16 q0, [r2], #1666; CHECK-NEXT: letp lr, .LBB1_267; CHECK-NEXT: @ %bb.3: @ %while.end68; CHECK-NEXT: pop {r7, pc}69entry:70 %cmp7 = icmp eq i32 %blockSize, 071 br i1 %cmp7, label %while.end, label %vector.ph72 73vector.ph: ; preds = %entry74 %n.rnd.up = add i32 %blockSize, 775 %n.vec = and i32 %n.rnd.up, -876 br label %vector.body77 78vector.body: ; preds = %vector.body, %vector.ph79 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]80 %next.gep = getelementptr i16, ptr %pSrcA, i32 %index81 %next.gep20 = getelementptr i16, ptr %pDst, i32 %index82 %next.gep21 = getelementptr i16, ptr %pSrcB, i32 %index83 %active.lane.mask = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32 %index, i32 %blockSize)84 %wide.masked.load = call <8 x i16> @llvm.masked.load.v8i16.p0(ptr %next.gep, i32 2, <8 x i1> %active.lane.mask, <8 x i16> undef)85 %wide.masked.load24 = call <8 x i16> @llvm.masked.load.v8i16.p0(ptr %next.gep21, i32 2, <8 x i1> %active.lane.mask, <8 x i16> undef)86 %0 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> %wide.masked.load, <8 x i16> %wide.masked.load24)87 call void @llvm.masked.store.v8i16.p0(<8 x i16> %0, ptr %next.gep20, i32 2, <8 x i1> %active.lane.mask)88 %index.next = add i32 %index, 889 %1 = icmp eq i32 %index.next, %n.vec90 br i1 %1, label %while.end, label %vector.body91 92while.end: ; preds = %vector.body, %entry93 ret void94}95 96declare <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32, i32)97 98declare <8 x i16> @llvm.masked.load.v8i16.p0(ptr, i32 immarg, <8 x i1>, <8 x i16>)99 100declare <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16>, <8 x i16>)101 102declare <8 x i16> @llvm.usub.sat.v8i16(<8 x i16>, <8 x i16>)103 104declare void @llvm.masked.store.v8i16.p0(<8 x i16>, ptr, i32 immarg, <8 x i1>)105