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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve -run-pass=arm-low-overhead-loops %s -o - | FileCheck %s3 4--- |5 define dso_local arm_aapcs_vfpcc void @unrolled_and_vector(ptr nocapture %res, ptr nocapture readonly %a, ptr nocapture readonly %b, i32 %N) {6 entry:7 %cmp10 = icmp eq i32 %N, 08 br i1 %cmp10, label %for.cond.cleanup, label %vector.memcheck9 10 vector.memcheck: ; preds = %entry11 %scevgep = getelementptr i8, ptr %res, i32 %N12 %scevgep12 = getelementptr i8, ptr %a, i32 %N13 %scevgep13 = getelementptr i8, ptr %b, i32 %N14 %bound0 = icmp ugt ptr %scevgep12, %res15 %bound1 = icmp ugt ptr %scevgep, %a16 %found.conflict = and i1 %bound0, %bound117 %bound014 = icmp ugt ptr %scevgep13, %res18 %bound115 = icmp ugt ptr %scevgep, %b19 %found.conflict16 = and i1 %bound014, %bound11520 %conflict.rdx = or i1 %found.conflict, %found.conflict1621 %0 = add i32 %N, 1522 %1 = lshr i32 %0, 423 %2 = shl nuw i32 %1, 424 %3 = add i32 %2, -1625 %4 = lshr i32 %3, 426 %5 = add nuw nsw i32 %4, 127 br i1 %conflict.rdx, label %for.body.preheader, label %vector.ph28 29 for.body.preheader: ; preds = %vector.memcheck30 %6 = add i32 %N, -131 %xtraiter = and i32 %N, 332 %7 = icmp ult i32 %6, 333 %8 = add i32 %N, -434 %9 = sub i32 %8, %xtraiter35 %10 = lshr i32 %9, 236 %11 = add nuw nsw i32 %10, 137 br i1 %7, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body.preheader.new38 39 for.body.preheader.new: ; preds = %for.body.preheader40 %start1 = call i32 @llvm.start.loop.iterations.i32(i32 %11)41 br label %for.body42 43 vector.ph: ; preds = %vector.memcheck44 %start2 = call i32 @llvm.start.loop.iterations.i32(i32 %5)45 br label %vector.body46 47 vector.body: ; preds = %vector.body, %vector.ph48 %lsr.iv50 = phi ptr [ %scevgep51, %vector.body ], [ %res, %vector.ph ]49 %lsr.iv47 = phi ptr [ %scevgep48, %vector.body ], [ %b, %vector.ph ]50 %lsr.iv = phi ptr [ %scevgep45, %vector.body ], [ %a, %vector.ph ]51 %12 = phi i32 [ %start2, %vector.ph ], [ %17, %vector.body ]52 %13 = phi i32 [ %N, %vector.ph ], [ %15, %vector.body ]53 %lsr.iv5052 = bitcast ptr %lsr.iv50 to ptr54 %lsr.iv4749 = bitcast ptr %lsr.iv47 to ptr55 %lsr.iv46 = bitcast ptr %lsr.iv to ptr56 %14 = call <16 x i1> @llvm.arm.mve.vctp8(i32 %13)57 %15 = sub i32 %13, 1658 %wide.masked.load = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %lsr.iv46, i32 1, <16 x i1> %14, <16 x i8> undef)59 %wide.masked.load19 = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %lsr.iv4749, i32 1, <16 x i1> %14, <16 x i8> undef)60 %16 = add <16 x i8> %wide.masked.load19, %wide.masked.load61 call void @llvm.masked.store.v16i8.p0(<16 x i8> %16, ptr %lsr.iv5052, i32 1, <16 x i1> %14)62 %scevgep45 = getelementptr i8, ptr %lsr.iv, i32 1663 %scevgep48 = getelementptr i8, ptr %lsr.iv47, i32 1664 %scevgep51 = getelementptr i8, ptr %lsr.iv50, i32 1665 %17 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %12, i32 1)66 %18 = icmp ne i32 %17, 067 br i1 %18, label %vector.body, label %for.cond.cleanup68 69 for.cond.cleanup.loopexit.unr-lcssa: ; preds = %for.body, %for.body.preheader70 %i.011.unr = phi i32 [ 0, %for.body.preheader ], [ %inc.3, %for.body ]71 %lcmp.mod = icmp eq i32 %xtraiter, 072 br i1 %lcmp.mod, label %for.cond.cleanup, label %for.body.epil73 74 for.body.epil: ; preds = %for.cond.cleanup.loopexit.unr-lcssa75 %arrayidx.epil = getelementptr inbounds i8, ptr %a, i32 %i.011.unr76 %19 = load i8, ptr %arrayidx.epil, align 177 %arrayidx1.epil = getelementptr inbounds i8, ptr %b, i32 %i.011.unr78 %20 = load i8, ptr %arrayidx1.epil, align 179 %add.epil = add i8 %20, %1980 %arrayidx4.epil = getelementptr inbounds i8, ptr %res, i32 %i.011.unr81 store i8 %add.epil, ptr %arrayidx4.epil, align 182 %inc.epil = add nuw i32 %i.011.unr, 183 %epil.iter.cmp = icmp eq i32 %xtraiter, 184 br i1 %epil.iter.cmp, label %for.cond.cleanup, label %for.body.epil.185 86 for.cond.cleanup: ; preds = %vector.body, %for.cond.cleanup.loopexit.unr-lcssa, %for.body.epil.1, %for.body.epil, %for.body.epil.2, %entry87 ret void88 89 for.body: ; preds = %for.body, %for.body.preheader.new90 %i.011 = phi i32 [ 0, %for.body.preheader.new ], [ %inc.3, %for.body ]91 %21 = phi i32 [ %start1, %for.body.preheader.new ], [ %30, %for.body ]92 %scevgep23 = getelementptr i8, ptr %a, i32 %i.01193 %scevgep2453 = bitcast ptr %scevgep23 to ptr94 %22 = load i8, ptr %scevgep2453, align 195 %scevgep27 = getelementptr i8, ptr %b, i32 %i.01196 %scevgep2854 = bitcast ptr %scevgep27 to ptr97 %23 = load i8, ptr %scevgep2854, align 198 %add = add i8 %23, %2299 %scevgep31 = getelementptr i8, ptr %res, i32 %i.011100 %scevgep3255 = bitcast ptr %scevgep31 to ptr101 store i8 %add, ptr %scevgep3255, align 1102 %scevgep39 = getelementptr i8, ptr %a, i32 %i.011103 %scevgep40 = getelementptr i8, ptr %scevgep39, i32 1104 %24 = load i8, ptr %scevgep40, align 1105 %scevgep41 = getelementptr i8, ptr %b, i32 %i.011106 %scevgep42 = getelementptr i8, ptr %scevgep41, i32 1107 %25 = load i8, ptr %scevgep42, align 1108 %add.1 = add i8 %25, %24109 %scevgep43 = getelementptr i8, ptr %res, i32 %i.011110 %scevgep44 = getelementptr i8, ptr %scevgep43, i32 1111 store i8 %add.1, ptr %scevgep44, align 1112 %scevgep33 = getelementptr i8, ptr %a, i32 %i.011113 %scevgep34 = getelementptr i8, ptr %scevgep33, i32 2114 %26 = load i8, ptr %scevgep34, align 1115 %scevgep35 = getelementptr i8, ptr %b, i32 %i.011116 %scevgep36 = getelementptr i8, ptr %scevgep35, i32 2117 %27 = load i8, ptr %scevgep36, align 1118 %add.2 = add i8 %27, %26119 %scevgep37 = getelementptr i8, ptr %res, i32 %i.011120 %scevgep38 = getelementptr i8, ptr %scevgep37, i32 2121 store i8 %add.2, ptr %scevgep38, align 1122 %scevgep21 = getelementptr i8, ptr %a, i32 %i.011123 %scevgep22 = getelementptr i8, ptr %scevgep21, i32 3124 %28 = load i8, ptr %scevgep22, align 1125 %scevgep25 = getelementptr i8, ptr %b, i32 %i.011126 %scevgep26 = getelementptr i8, ptr %scevgep25, i32 3127 %29 = load i8, ptr %scevgep26, align 1128 %add.3 = add i8 %29, %28129 %scevgep29 = getelementptr i8, ptr %res, i32 %i.011130 %scevgep30 = getelementptr i8, ptr %scevgep29, i32 3131 store i8 %add.3, ptr %scevgep30, align 1132 %inc.3 = add nuw i32 %i.011, 4133 %30 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %21, i32 1)134 %31 = icmp ne i32 %30, 0135 br i1 %31, label %for.body, label %for.cond.cleanup.loopexit.unr-lcssa136 137 for.body.epil.1: ; preds = %for.body.epil138 %arrayidx.epil.1 = getelementptr inbounds i8, ptr %a, i32 %inc.epil139 %32 = load i8, ptr %arrayidx.epil.1, align 1140 %arrayidx1.epil.1 = getelementptr inbounds i8, ptr %b, i32 %inc.epil141 %33 = load i8, ptr %arrayidx1.epil.1, align 1142 %add.epil.1 = add i8 %33, %32143 %arrayidx4.epil.1 = getelementptr inbounds i8, ptr %res, i32 %inc.epil144 store i8 %add.epil.1, ptr %arrayidx4.epil.1, align 1145 %inc.epil.1 = add nuw i32 %i.011.unr, 2146 %epil.iter.cmp.1 = icmp eq i32 %xtraiter, 2147 br i1 %epil.iter.cmp.1, label %for.cond.cleanup, label %for.body.epil.2148 149 for.body.epil.2: ; preds = %for.body.epil.1150 %arrayidx.epil.2 = getelementptr inbounds i8, ptr %a, i32 %inc.epil.1151 %34 = load i8, ptr %arrayidx.epil.2, align 1152 %arrayidx1.epil.2 = getelementptr inbounds i8, ptr %b, i32 %inc.epil.1153 %35 = load i8, ptr %arrayidx1.epil.2, align 1154 %add.epil.2 = add i8 %35, %34155 %arrayidx4.epil.2 = getelementptr inbounds i8, ptr %res, i32 %inc.epil.1156 store i8 %add.epil.2, ptr %arrayidx4.epil.2, align 1157 br label %for.cond.cleanup158 }159 160 declare <16 x i8> @llvm.masked.load.v16i8.p0(ptr, i32 immarg, <16 x i1>, <16 x i8>) #1161 declare void @llvm.masked.store.v16i8.p0(<16 x i8>, ptr, i32 immarg, <16 x i1>) #2162 declare i32 @llvm.start.loop.iterations.i32(i32) #3163 declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) #3164 declare <16 x i1> @llvm.arm.mve.vctp8(i32) #4165 166...167---168name: unrolled_and_vector169alignment: 2170exposesReturnsTwice: false171legalized: false172regBankSelected: false173selected: false174failedISel: false175tracksRegLiveness: true176hasWinCFI: false177registers: []178liveins:179 - { reg: '$r0', virtual-reg: '' }180 - { reg: '$r1', virtual-reg: '' }181 - { reg: '$r2', virtual-reg: '' }182 - { reg: '$r3', virtual-reg: '' }183frameInfo:184 isFrameAddressTaken: false185 isReturnAddressTaken: false186 hasStackMap: false187 hasPatchPoint: false188 stackSize: 32189 offsetAdjustment: -24190 maxAlignment: 4191 adjustsStack: false192 hasCalls: false193 stackProtector: ''194 maxCallFrameSize: 0195 cvBytesOfCalleeSavedRegisters: 0196 hasOpaqueSPAdjustment: false197 hasVAStart: false198 hasMustTailInVarArgFunc: false199 localFrameSize: 0200 savePoint: []201 restorePoint: []202fixedStack: []203stack:204 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,205 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,206 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }207 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,208 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,209 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }210 - { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,211 stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true,212 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }213 - { id: 3, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4,214 stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true,215 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }216 - { id: 4, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4,217 stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,218 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }219 - { id: 5, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4,220 stack-id: default, callee-saved-register: '$r11', callee-saved-restored: true,221 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }222 - { id: 6, name: '', type: spill-slot, offset: -28, size: 4, alignment: 4,223 stack-id: default, callee-saved-register: '$r9', callee-saved-restored: true,224 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }225 - { id: 7, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4,226 stack-id: default, callee-saved-register: '$r8', callee-saved-restored: true,227 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }228callSites: []229constants: []230machineFunctionInfo: {}231body: |232 ; CHECK-LABEL: name: unrolled_and_vector233 ; CHECK: bb.0.entry:234 ; CHECK-NEXT: successors: %bb.11(0x30000000), %bb.1(0x50000000)235 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r8, $r9, $r11236 ; CHECK-NEXT: {{ $}}237 ; CHECK-NEXT: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp238 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 20239 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4240 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -8241 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r6, -12242 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r5, -16243 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r4, -20244 ; CHECK-NEXT: dead $r7 = frame-setup tADDrSPi $sp, 3, 14 /* CC::al */, $noreg245 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa $r7, 8246 ; CHECK-NEXT: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r8, killed $r9, killed $r11247 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r11, -24248 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r9, -28249 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r8, -32250 ; CHECK-NEXT: tCMPi8 renamable $r3, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr251 ; CHECK-NEXT: tBcc %bb.11, 0 /* CC::eq */, killed $cpsr252 ; CHECK-NEXT: {{ $}}253 ; CHECK-NEXT: bb.1.vector.memcheck:254 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.4(0x40000000)255 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3256 ; CHECK-NEXT: {{ $}}257 ; CHECK-NEXT: renamable $r4, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14 /* CC::al */, $noreg258 ; CHECK-NEXT: renamable $r5, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14 /* CC::al */, $noreg259 ; CHECK-NEXT: tCMPr renamable $r4, renamable $r2, 14 /* CC::al */, $noreg, implicit-def $cpsr260 ; CHECK-NEXT: renamable $lr = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg261 ; CHECK-NEXT: renamable $r12 = t2CSINC $zr, $zr, 9, implicit killed $cpsr262 ; CHECK-NEXT: tCMPr killed renamable $r5, renamable $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr263 ; CHECK-NEXT: renamable $r6 = t2CSINC $zr, $zr, 9, implicit killed $cpsr264 ; CHECK-NEXT: tCMPr killed renamable $r4, renamable $r1, 14 /* CC::al */, $noreg, implicit-def $cpsr265 ; CHECK-NEXT: renamable $r5 = t2ADDrr renamable $r1, renamable $r3, 14 /* CC::al */, $noreg, $noreg266 ; CHECK-NEXT: renamable $r4 = t2CSINC $zr, $zr, 9, implicit killed $cpsr267 ; CHECK-NEXT: tCMPr killed renamable $r5, renamable $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr268 ; CHECK-NEXT: renamable $r5 = t2CSINC $zr, $zr, 9, implicit killed $cpsr269 ; CHECK-NEXT: renamable $r5, dead $cpsr = tAND killed renamable $r5, killed renamable $r4, 14 /* CC::al */, $noreg270 ; CHECK-NEXT: dead renamable $r5, $cpsr = tLSLri killed renamable $r5, 31, 14 /* CC::al */, $noreg271 ; CHECK-NEXT: t2IT 0, 4, implicit-def $itstate272 ; CHECK-NEXT: renamable $r6 = t2ANDrr killed renamable $r6, killed renamable $r12, 0 /* CC::eq */, $cpsr, $noreg, implicit killed $r6, implicit $itstate273 ; CHECK-NEXT: dead renamable $r6 = t2LSLri killed renamable $r6, 31, 0 /* CC::eq */, killed $cpsr, def $cpsr, implicit killed $r6, implicit killed $itstate274 ; CHECK-NEXT: tBcc %bb.4, 0 /* CC::eq */, killed $cpsr275 ; CHECK-NEXT: {{ $}}276 ; CHECK-NEXT: bb.2.for.body.preheader:277 ; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.6(0x40000000)278 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r3279 ; CHECK-NEXT: {{ $}}280 ; CHECK-NEXT: renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14 /* CC::al */, $noreg281 ; CHECK-NEXT: renamable $r12 = t2ANDri renamable $r3, 3, 14 /* CC::al */, $noreg, $noreg282 ; CHECK-NEXT: tCMPi8 killed renamable $r4, 3, 14 /* CC::al */, $noreg, implicit-def $cpsr283 ; CHECK-NEXT: tBcc %bb.6, 2 /* CC::hs */, killed $cpsr284 ; CHECK-NEXT: {{ $}}285 ; CHECK-NEXT: bb.3:286 ; CHECK-NEXT: successors: %bb.8(0x80000000)287 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r12288 ; CHECK-NEXT: {{ $}}289 ; CHECK-NEXT: renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg290 ; CHECK-NEXT: tB %bb.8, 14 /* CC::al */, $noreg291 ; CHECK-NEXT: {{ $}}292 ; CHECK-NEXT: bb.4.vector.ph:293 ; CHECK-NEXT: successors: %bb.5(0x80000000)294 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3295 ; CHECK-NEXT: {{ $}}296 ; CHECK-NEXT: $lr = MVE_DLSTP_8 killed renamable $r3297 ; CHECK-NEXT: {{ $}}298 ; CHECK-NEXT: bb.5.vector.body:299 ; CHECK-NEXT: successors: %bb.5(0x7c000000), %bb.11(0x04000000)300 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2301 ; CHECK-NEXT: {{ $}}302 ; CHECK-NEXT: renamable $r1, renamable $q0 = MVE_VLDRBU8_post killed renamable $r1, 16, 0, $noreg, $noreg :: (load (s128) from %ir.lsr.iv46, align 1)303 ; CHECK-NEXT: renamable $r2, renamable $q1 = MVE_VLDRBU8_post killed renamable $r2, 16, 0, $noreg, $noreg :: (load (s128) from %ir.lsr.iv4749, align 1)304 ; CHECK-NEXT: renamable $q0 = MVE_VADDi8 killed renamable $q1, killed renamable $q0, 0, $noreg, $noreg, undef renamable $q0305 ; CHECK-NEXT: renamable $r0 = MVE_VSTRBU8_post killed renamable $q0, killed renamable $r0, 16, 0, killed $noreg, $noreg :: (store (s128) into %ir.lsr.iv5052, align 1)306 ; CHECK-NEXT: $lr = MVE_LETP killed renamable $lr, %bb.5307 ; CHECK-NEXT: tB %bb.11, 14 /* CC::al */, $noreg308 ; CHECK-NEXT: {{ $}}309 ; CHECK-NEXT: bb.6.for.body.preheader.new:310 ; CHECK-NEXT: successors: %bb.7(0x80000000)311 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r3, $r12312 ; CHECK-NEXT: {{ $}}313 ; CHECK-NEXT: renamable $r3 = t2BICri killed renamable $r3, 3, 14 /* CC::al */, $noreg, $noreg314 ; CHECK-NEXT: renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg315 ; CHECK-NEXT: renamable $lr = nuw nsw t2ADDrs killed renamable $lr, killed renamable $r3, 19, 14 /* CC::al */, $noreg, $noreg316 ; CHECK-NEXT: renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg317 ; CHECK-NEXT: {{ $}}318 ; CHECK-NEXT: bb.7.for.body:319 ; CHECK-NEXT: successors: %bb.7(0x7c000000), %bb.8(0x04000000)320 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r3, $r12321 ; CHECK-NEXT: {{ $}}322 ; CHECK-NEXT: renamable $r4 = tLDRBr renamable $r1, $r3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep2453)323 ; CHECK-NEXT: renamable $r9 = t2ADDrr renamable $r1, renamable $r3, 14 /* CC::al */, $noreg, $noreg324 ; CHECK-NEXT: renamable $r5 = tLDRBr renamable $r2, $r3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep2854)325 ; CHECK-NEXT: renamable $r6, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14 /* CC::al */, $noreg326 ; CHECK-NEXT: renamable $r4 = tADDhirr killed renamable $r4, killed renamable $r5, 14 /* CC::al */, $noreg327 ; CHECK-NEXT: tSTRBr killed renamable $r4, renamable $r0, $r3, 14 /* CC::al */, $noreg :: (store (s8) into %ir.scevgep3255)328 ; CHECK-NEXT: renamable $r8 = t2LDRBi12 renamable $r9, 1, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep40)329 ; CHECK-NEXT: renamable $r5 = tLDRBi renamable $r6, 1, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep42)330 ; CHECK-NEXT: renamable $r8 = tADDhirr killed renamable $r8, killed renamable $r5, 14 /* CC::al */, $noreg331 ; CHECK-NEXT: renamable $r5, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14 /* CC::al */, $noreg332 ; CHECK-NEXT: renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg333 ; CHECK-NEXT: t2STRBi12 killed renamable $r8, renamable $r5, 1, 14 /* CC::al */, $noreg :: (store (s8) into %ir.scevgep44)334 ; CHECK-NEXT: renamable $r8 = t2LDRBi12 renamable $r9, 2, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep34)335 ; CHECK-NEXT: renamable $r4 = tLDRBi renamable $r6, 2, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep36)336 ; CHECK-NEXT: renamable $r4 = tADDhirr killed renamable $r4, killed renamable $r8, 14 /* CC::al */, $noreg337 ; CHECK-NEXT: tSTRBi killed renamable $r4, renamable $r5, 2, 14 /* CC::al */, $noreg :: (store (s8) into %ir.scevgep38)338 ; CHECK-NEXT: renamable $r4 = t2LDRBi12 killed renamable $r9, 3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep22)339 ; CHECK-NEXT: renamable $r6 = tLDRBi killed renamable $r6, 3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep26)340 ; CHECK-NEXT: renamable $r4 = tADDhirr killed renamable $r4, killed renamable $r6, 14 /* CC::al */, $noreg341 ; CHECK-NEXT: tSTRBi killed renamable $r4, killed renamable $r5, 3, 14 /* CC::al */, $noreg :: (store (s8) into %ir.scevgep30)342 ; CHECK-NEXT: $lr = t2LEUpdate killed renamable $lr, %bb.7343 ; CHECK-NEXT: {{ $}}344 ; CHECK-NEXT: bb.8.for.cond.cleanup.loopexit.unr-lcssa:345 ; CHECK-NEXT: successors: %bb.11(0x30000000), %bb.9(0x50000000)346 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3, $r12347 ; CHECK-NEXT: {{ $}}348 ; CHECK-NEXT: t2CMPri renamable $r12, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr349 ; CHECK-NEXT: tBcc %bb.11, 0 /* CC::eq */, killed $cpsr350 ; CHECK-NEXT: {{ $}}351 ; CHECK-NEXT: bb.9.for.body.epil:352 ; CHECK-NEXT: successors: %bb.11(0x40000000), %bb.10(0x40000000)353 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3, $r12354 ; CHECK-NEXT: {{ $}}355 ; CHECK-NEXT: renamable $r6 = tLDRBr renamable $r1, $r3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.arrayidx.epil)356 ; CHECK-NEXT: t2CMPri renamable $r12, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr357 ; CHECK-NEXT: renamable $r5 = tLDRBr renamable $r2, $r3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.arrayidx1.epil)358 ; CHECK-NEXT: renamable $r6 = tADDhirr killed renamable $r6, killed renamable $r5, 14 /* CC::al */, $noreg359 ; CHECK-NEXT: tSTRBr killed renamable $r6, renamable $r0, $r3, 14 /* CC::al */, $noreg :: (store (s8) into %ir.arrayidx4.epil)360 ; CHECK-NEXT: tBcc %bb.11, 0 /* CC::eq */, killed $cpsr361 ; CHECK-NEXT: {{ $}}362 ; CHECK-NEXT: bb.10.for.body.epil.1:363 ; CHECK-NEXT: successors: %bb.11(0x40000000), %bb.12(0x40000000)364 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3, $r12365 ; CHECK-NEXT: {{ $}}366 ; CHECK-NEXT: renamable $r6, dead $cpsr = nuw tADDi3 renamable $r3, 1, 14 /* CC::al */, $noreg367 ; CHECK-NEXT: t2CMPri killed renamable $r12, 2, 14 /* CC::al */, $noreg, implicit-def $cpsr368 ; CHECK-NEXT: renamable $r5 = tLDRBr renamable $r1, $r6, 14 /* CC::al */, $noreg :: (load (s8) from %ir.arrayidx.epil.1)369 ; CHECK-NEXT: renamable $r4 = tLDRBr renamable $r2, $r6, 14 /* CC::al */, $noreg :: (load (s8) from %ir.arrayidx1.epil.1)370 ; CHECK-NEXT: renamable $r5 = tADDhirr killed renamable $r5, killed renamable $r4, 14 /* CC::al */, $noreg371 ; CHECK-NEXT: tSTRBr killed renamable $r5, renamable $r0, killed $r6, 14 /* CC::al */, $noreg :: (store (s8) into %ir.arrayidx4.epil.1)372 ; CHECK-NEXT: tBcc %bb.12, 1 /* CC::ne */, killed $cpsr373 ; CHECK-NEXT: {{ $}}374 ; CHECK-NEXT: bb.11.for.cond.cleanup:375 ; CHECK-NEXT: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r8, def $r9, def $r11376 ; CHECK-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc377 ; CHECK-NEXT: {{ $}}378 ; CHECK-NEXT: bb.12.for.body.epil.2:379 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3380 ; CHECK-NEXT: {{ $}}381 ; CHECK-NEXT: renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 2, 14 /* CC::al */, $noreg382 ; CHECK-NEXT: renamable $r1 = tLDRBr killed renamable $r1, $r3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.arrayidx.epil.2)383 ; CHECK-NEXT: renamable $r2 = tLDRBr killed renamable $r2, $r3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.arrayidx1.epil.2)384 ; CHECK-NEXT: renamable $r1 = tADDhirr killed renamable $r1, killed renamable $r2, 14 /* CC::al */, $noreg385 ; CHECK-NEXT: tSTRBr killed renamable $r1, killed renamable $r0, killed $r3, 14 /* CC::al */, $noreg :: (store (s8) into %ir.arrayidx4.epil.2)386 ; CHECK-NEXT: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r8, def $r9, def $r11387 ; CHECK-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc388 bb.0.entry:389 successors: %bb.11(0x30000000), %bb.1(0x50000000)390 liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $lr, $r8, $r9, $r11391 392 frame-setup tPUSH 14, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp393 frame-setup CFI_INSTRUCTION def_cfa_offset 20394 frame-setup CFI_INSTRUCTION offset $lr, -4395 frame-setup CFI_INSTRUCTION offset $r7, -8396 frame-setup CFI_INSTRUCTION offset $r6, -12397 frame-setup CFI_INSTRUCTION offset $r5, -16398 frame-setup CFI_INSTRUCTION offset $r4, -20399 $r7 = frame-setup tADDrSPi $sp, 3, 14, $noreg400 frame-setup CFI_INSTRUCTION def_cfa $r7, 8401 $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r8, killed $r9, killed $r11402 frame-setup CFI_INSTRUCTION offset $r11, -24403 frame-setup CFI_INSTRUCTION offset $r9, -28404 frame-setup CFI_INSTRUCTION offset $r8, -32405 tCMPi8 renamable $r3, 0, 14, $noreg, implicit-def $cpsr406 tBcc %bb.11, 0, killed $cpsr407 408 bb.1.vector.memcheck:409 successors: %bb.2(0x40000000), %bb.4(0x40000000)410 liveins: $r0, $r1, $r2, $r3411 412 renamable $r4, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14, $noreg413 renamable $r5, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14, $noreg414 tCMPr renamable $r4, renamable $r2, 14, $noreg, implicit-def $cpsr415 renamable $lr = t2MOVi 1, 14, $noreg, $noreg416 renamable $r12 = t2CSINC $zr, $zr, 9, implicit killed $cpsr417 tCMPr killed renamable $r5, renamable $r0, 14, $noreg, implicit-def $cpsr418 renamable $r6 = t2CSINC $zr, $zr, 9, implicit killed $cpsr419 tCMPr killed renamable $r4, renamable $r1, 14, $noreg, implicit-def $cpsr420 renamable $r5 = t2ADDrr renamable $r1, renamable $r3, 14, $noreg, $noreg421 renamable $r4 = t2CSINC $zr, $zr, 9, implicit killed $cpsr422 tCMPr killed renamable $r5, renamable $r0, 14, $noreg, implicit-def $cpsr423 renamable $r5 = t2CSINC $zr, $zr, 9, implicit killed $cpsr424 renamable $r5, dead $cpsr = tAND killed renamable $r5, killed renamable $r4, 14, $noreg425 dead renamable $r5, $cpsr = tLSLri killed renamable $r5, 31, 14, $noreg426 t2IT 0, 4, implicit-def $itstate427 renamable $r6 = t2ANDrr killed renamable $r6, killed renamable $r12, 0, $cpsr, $noreg, implicit $r6, implicit $itstate428 dead renamable $r6 = t2LSLri killed renamable $r6, 31, 0, killed $cpsr, def $cpsr, implicit killed $r6, implicit killed $itstate429 tBcc %bb.4, 0, killed $cpsr430 431 bb.2.for.body.preheader:432 successors: %bb.3(0x40000000), %bb.6(0x40000000)433 liveins: $lr, $r0, $r1, $r2, $r3434 435 renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14, $noreg436 renamable $r12 = t2ANDri renamable $r3, 3, 14, $noreg, $noreg437 tCMPi8 killed renamable $r4, 3, 14, $noreg, implicit-def $cpsr438 tBcc %bb.6, 2, killed $cpsr439 440 bb.3:441 successors: %bb.8(0x80000000)442 liveins: $r0, $r1, $r2, $r12443 444 renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg445 tB %bb.8, 14, $noreg446 447 bb.4.vector.ph:448 successors: %bb.5(0x80000000)449 liveins: $lr, $r0, $r1, $r2, $r3450 451 renamable $r6 = t2ADDri renamable $r3, 15, 14, $noreg, $noreg452 renamable $r6 = t2BICri killed renamable $r6, 15, 14, $noreg, $noreg453 renamable $r6, dead $cpsr = tSUBi8 killed renamable $r6, 16, 14, $noreg454 renamable $lr = nuw nsw t2ADDrs killed renamable $lr, killed renamable $r6, 35, 14, $noreg, $noreg455 $lr = t2DoLoopStart renamable $lr456 457 bb.5.vector.body:458 successors: %bb.5(0x7c000000), %bb.11(0x04000000)459 liveins: $lr, $r0, $r1, $r2, $r3460 461 renamable $vpr = MVE_VCTP8 renamable $r3, 0, $noreg, $noreg462 renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 16, 14, $noreg463 MVE_VPST 4, implicit $vpr464 renamable $r1, renamable $q0 = MVE_VLDRBU8_post killed renamable $r1, 16, 1, renamable $vpr, $noreg :: (load (s128) from %ir.lsr.iv46, align 1)465 renamable $r2, renamable $q1 = MVE_VLDRBU8_post killed renamable $r2, 16, 1, renamable $vpr, $noreg :: (load (s128) from %ir.lsr.iv4749, align 1)466 renamable $lr = t2LoopDec killed renamable $lr, 1467 renamable $q0 = MVE_VADDi8 killed renamable $q1, killed renamable $q0, 0, $noreg, $noreg, undef renamable $q0468 MVE_VPST 8, implicit $vpr469 renamable $r0 = MVE_VSTRBU8_post killed renamable $q0, killed renamable $r0, 16, 1, killed renamable $vpr, $noreg :: (store (s128) into %ir.lsr.iv5052, align 1)470 t2LoopEnd renamable $lr, %bb.5, implicit-def dead $cpsr471 tB %bb.11, 14, $noreg472 473 bb.6.for.body.preheader.new:474 successors: %bb.7(0x80000000)475 liveins: $lr, $r0, $r1, $r2, $r3, $r12476 477 renamable $r3 = t2BICri killed renamable $r3, 3, 14, $noreg, $noreg478 renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14, $noreg479 renamable $lr = nuw nsw t2ADDrs killed renamable $lr, killed renamable $r3, 19, 14, $noreg, $noreg480 renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg481 $lr = t2DoLoopStart renamable $lr482 483 bb.7.for.body:484 successors: %bb.7(0x7c000000), %bb.8(0x04000000)485 liveins: $lr, $r0, $r1, $r2, $r3, $r12486 487 renamable $r4 = tLDRBr renamable $r1, $r3, 14, $noreg :: (load (s8) from %ir.scevgep2453)488 renamable $r9 = t2ADDrr renamable $r1, renamable $r3, 14, $noreg, $noreg489 renamable $r5 = tLDRBr renamable $r2, $r3, 14, $noreg :: (load (s8) from %ir.scevgep2854)490 renamable $r6, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14, $noreg491 renamable $lr = t2LoopDec killed renamable $lr, 1492 renamable $r4 = tADDhirr killed renamable $r4, killed renamable $r5, 14, $noreg493 tSTRBr killed renamable $r4, renamable $r0, $r3, 14, $noreg :: (store (s8) into %ir.scevgep3255)494 renamable $r8 = t2LDRBi12 renamable $r9, 1, 14, $noreg :: (load (s8) from %ir.scevgep40)495 renamable $r5 = tLDRBi renamable $r6, 1, 14, $noreg :: (load (s8) from %ir.scevgep42)496 renamable $r8 = tADDhirr killed renamable $r8, killed renamable $r5, 14, $noreg497 renamable $r5, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14, $noreg498 renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 4, 14, $noreg499 t2STRBi12 killed renamable $r8, renamable $r5, 1, 14, $noreg :: (store (s8) into %ir.scevgep44)500 renamable $r8 = t2LDRBi12 renamable $r9, 2, 14, $noreg :: (load (s8) from %ir.scevgep34)501 renamable $r4 = tLDRBi renamable $r6, 2, 14, $noreg :: (load (s8) from %ir.scevgep36)502 renamable $r4 = tADDhirr killed renamable $r4, killed renamable $r8, 14, $noreg503 tSTRBi killed renamable $r4, renamable $r5, 2, 14, $noreg :: (store (s8) into %ir.scevgep38)504 renamable $r4 = t2LDRBi12 killed renamable $r9, 3, 14, $noreg :: (load (s8) from %ir.scevgep22)505 renamable $r6 = tLDRBi killed renamable $r6, 3, 14, $noreg :: (load (s8) from %ir.scevgep26)506 renamable $r4 = tADDhirr killed renamable $r4, killed renamable $r6, 14, $noreg507 tSTRBi killed renamable $r4, killed renamable $r5, 3, 14, $noreg :: (store (s8) into %ir.scevgep30)508 t2LoopEnd renamable $lr, %bb.7, implicit-def dead $cpsr509 tB %bb.8, 14, $noreg510 511 bb.8.for.cond.cleanup.loopexit.unr-lcssa:512 successors: %bb.11(0x30000000), %bb.9(0x50000000)513 liveins: $r0, $r1, $r2, $r3, $r12514 515 t2CMPri renamable $r12, 0, 14, $noreg, implicit-def $cpsr516 tBcc %bb.11, 0, killed $cpsr517 518 bb.9.for.body.epil:519 successors: %bb.11(0x40000000), %bb.10(0x40000000)520 liveins: $r0, $r1, $r2, $r3, $r12521 522 renamable $r6 = tLDRBr renamable $r1, $r3, 14, $noreg :: (load (s8) from %ir.arrayidx.epil)523 t2CMPri renamable $r12, 1, 14, $noreg, implicit-def $cpsr524 renamable $r5 = tLDRBr renamable $r2, $r3, 14, $noreg :: (load (s8) from %ir.arrayidx1.epil)525 renamable $r6 = tADDhirr killed renamable $r6, killed renamable $r5, 14, $noreg526 tSTRBr killed renamable $r6, renamable $r0, $r3, 14, $noreg :: (store (s8) into %ir.arrayidx4.epil)527 tBcc %bb.11, 0, killed $cpsr528 529 bb.10.for.body.epil.1:530 successors: %bb.11(0x40000000), %bb.12(0x40000000)531 liveins: $r0, $r1, $r2, $r3, $r12532 533 renamable $r6, dead $cpsr = nuw tADDi3 renamable $r3, 1, 14, $noreg534 t2CMPri killed renamable $r12, 2, 14, $noreg, implicit-def $cpsr535 renamable $r5 = tLDRBr renamable $r1, $r6, 14, $noreg :: (load (s8) from %ir.arrayidx.epil.1)536 renamable $r4 = tLDRBr renamable $r2, $r6, 14, $noreg :: (load (s8) from %ir.arrayidx1.epil.1)537 renamable $r5 = tADDhirr killed renamable $r5, killed renamable $r4, 14, $noreg538 tSTRBr killed renamable $r5, renamable $r0, killed $r6, 14, $noreg :: (store (s8) into %ir.arrayidx4.epil.1)539 tBcc %bb.12, 1, killed $cpsr540 541 bb.11.for.cond.cleanup:542 $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r8, def $r9, def $r11543 tPOP_RET 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc544 545 bb.12.for.body.epil.2:546 liveins: $r0, $r1, $r2, $r3547 548 renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 2, 14, $noreg549 renamable $r1 = tLDRBr killed renamable $r1, $r3, 14, $noreg :: (load (s8) from %ir.arrayidx.epil.2)550 renamable $r2 = tLDRBr killed renamable $r2, $r3, 14, $noreg :: (load (s8) from %ir.arrayidx1.epil.2)551 renamable $r1 = tADDhirr killed renamable $r1, killed renamable $r2, 14, $noreg552 tSTRBr killed renamable $r1, killed renamable $r0, killed $r3, 14, $noreg :: (store (s8) into %ir.arrayidx4.epil.2)553 $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r8, def $r9, def $r11554 tPOP_RET 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc555 556...557