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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=thumbv8.1m.main -run-pass=arm-low-overhead-loops -verify-machineinstrs %s -o - | FileCheck %s3# Check that subs isn't used during the revert because there's a cpsr use after it.4 5--- |6 define i32 @do_copy(i32 %n, ptr nocapture %p, ptr nocapture readonly %q) {7 entry:8 %scevgep = getelementptr i32, ptr %q, i32 -19 %scevgep3 = getelementptr i32, ptr %p, i32 -110 %start = call i32 @llvm.start.loop.iterations.i32(i32 %n)11 %limit = lshr i32 %n, 112 br label %while.body13 14 while.body: ; preds = %while.body, %entry15 %lsr.iv4 = phi ptr [ %scevgep5, %while.body ], [ %scevgep3, %entry ]16 %lsr.iv = phi ptr [ %scevgep1, %while.body ], [ %scevgep, %entry ]17 %tmp = phi i32 [ %start, %entry ], [ %tmp2, %while.body ]18 %scevgep7 = getelementptr i32, ptr %lsr.iv, i32 119 %scevgep4 = getelementptr i32, ptr %lsr.iv4, i32 120 %tmp1 = load i32, ptr %scevgep7, align 421 %tmp2 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %tmp, i32 1)22 %half = lshr i32 %tmp1, 123 %cmp = icmp ult i32 %tmp, %limit24 %res = select i1 %cmp, i32 %tmp1, i32 %half25 store i32 %res, ptr %scevgep4, align 426 %scevgep1 = getelementptr i32, ptr %lsr.iv, i32 127 %scevgep5 = getelementptr i32, ptr %lsr.iv4, i32 128 %tmp3 = icmp ne i32 %tmp2, 029 br i1 %tmp3, label %while.body, label %while.end30 31 while.end: ; preds = %while.body32 ret i32 033 }34 35 declare i32 @llvm.start.loop.iterations.i32(i32) #036 37 declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) #038 39 declare void @llvm.stackprotector(ptr, ptr) #140 41 attributes #0 = { noduplicate nounwind }42 attributes #1 = { nounwind }43 44...45---46name: do_copy47alignment: 248exposesReturnsTwice: false49legalized: false50regBankSelected: false51selected: false52failedISel: false53tracksRegLiveness: true54hasWinCFI: false55registers: []56liveins:57 - { reg: '$r0', virtual-reg: '' }58 - { reg: '$r1', virtual-reg: '' }59 - { reg: '$r2', virtual-reg: '' }60frameInfo:61 isFrameAddressTaken: false62 isReturnAddressTaken: false63 hasStackMap: false64 hasPatchPoint: false65 stackSize: 866 offsetAdjustment: 067 maxAlignment: 468 adjustsStack: false69 hasCalls: false70 stackProtector: ''71 maxCallFrameSize: 072 cvBytesOfCalleeSavedRegisters: 073 hasOpaqueSPAdjustment: false74 hasVAStart: false75 hasMustTailInVarArgFunc: false76 localFrameSize: 077 savePoint: []78 restorePoint: []79fixedStack: []80stack:81 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,82 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,83 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }84 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,85 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,86 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }87callSites: []88constants: []89machineFunctionInfo: {}90body: |91 ; CHECK-LABEL: name: do_copy92 ; CHECK: bb.0.entry:93 ; CHECK-NEXT: successors: %bb.1(0x80000000)94 ; CHECK-NEXT: liveins: $lr, $r1, $r2, $r795 ; CHECK-NEXT: {{ $}}96 ; CHECK-NEXT: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp97 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 898 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -499 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -8100 ; CHECK-NEXT: renamable $r0, dead $cpsr = tSUBi3 killed renamable $r1, 4, 14 /* CC::al */, $noreg101 ; CHECK-NEXT: renamable $r1, dead $cpsr = tSUBi3 killed renamable $r2, 4, 14 /* CC::al */, $noreg102 ; CHECK-NEXT: dead $lr = tMOVr renamable $r0, 14 /* CC::al */, $noreg103 ; CHECK-NEXT: renamable $r2 = t2LSRri renamable $r0, 1, 14 /* CC::al */, $noreg, $noreg104 ; CHECK-NEXT: $lr = tMOVr $r0, 14 /* CC::al */, $noreg105 ; CHECK-NEXT: {{ $}}106 ; CHECK-NEXT: bb.1.while.body:107 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000)108 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2109 ; CHECK-NEXT: {{ $}}110 ; CHECK-NEXT: renamable $r3, renamable $r1 = t2LDR_PRE killed renamable $r1, 4, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep7)111 ; CHECK-NEXT: tCMPhir renamable $lr, renamable $r2, 14 /* CC::al */, $noreg, implicit-def $cpsr112 ; CHECK-NEXT: renamable $lr = t2SUBri killed renamable $lr, 1, 14 /* CC::al */, $noreg, $noreg113 ; CHECK-NEXT: t2IT 2, 8, implicit-def $itstate114 ; CHECK-NEXT: renamable $r3 = tLSRri $noreg, killed renamable $r3, 1, 2 /* CC::hs */, killed $cpsr, implicit killed renamable $r3, implicit killed $itstate115 ; CHECK-NEXT: early-clobber renamable $r0 = t2STR_PRE killed renamable $r3, killed renamable $r0, 4, 14 /* CC::al */, $noreg :: (store (s32) into %ir.scevgep4)116 ; CHECK-NEXT: renamable $lr = tMOVr killed $lr, 14 /* CC::al */, $noreg117 ; CHECK-NEXT: t2CMPri renamable $lr, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr118 ; CHECK-NEXT: tBcc %bb.1, 1 /* CC::ne */, killed $cpsr119 ; CHECK-NEXT: tB %bb.2, 14 /* CC::al */, $noreg120 ; CHECK-NEXT: {{ $}}121 ; CHECK-NEXT: bb.2.while.end:122 ; CHECK-NEXT: $r0, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg123 ; CHECK-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r7, def $pc, implicit killed $r0124 bb.0.entry:125 successors: %bb.1(0x80000000)126 liveins: $r0, $r1, $r2, $r7, $lr127 128 frame-setup tPUSH 14, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp129 frame-setup CFI_INSTRUCTION def_cfa_offset 8130 frame-setup CFI_INSTRUCTION offset $lr, -4131 frame-setup CFI_INSTRUCTION offset $r7, -8132 renamable $r0, dead $cpsr = tSUBi3 killed renamable $r1, 4, 14, $noreg133 renamable $r1, dead $cpsr = tSUBi3 killed renamable $r2, 4, 14, $noreg134 $lr = t2DoLoopStart renamable $r0135 renamable $r2 = t2LSRri renamable $r0, 1, 14, $noreg, $noreg136 $lr = tMOVr $r0, 14, $noreg137 138 bb.1.while.body:139 successors: %bb.1(0x7c000000), %bb.2(0x04000000)140 liveins: $lr, $r0, $r1, $r2141 142 renamable $r3, renamable $r1 = t2LDR_PRE killed renamable $r1, 4, 14, $noreg :: (load (s32) from %ir.scevgep7)143 tCMPhir renamable $lr, renamable $r2, 14, $noreg, implicit-def $cpsr144 renamable $lr = t2LoopDec killed renamable $lr, 1145 t2IT 2, 8, implicit-def $itstate146 renamable $r3 = tLSRri $noreg, killed renamable $r3, 1, 2, killed $cpsr, implicit renamable $r3, implicit killed $itstate147 early-clobber renamable $r0 = t2STR_PRE killed renamable $r3, killed renamable $r0, 4, 14, $noreg :: (store (s32) into %ir.scevgep4)148 renamable $lr = tMOVr $lr, 14, $noreg149 t2LoopEnd renamable $lr, %bb.1, implicit-def dead $cpsr150 tB %bb.2, 14, $noreg151 152 bb.2.while.end:153 $r0, dead $cpsr = tMOVi8 0, 14, $noreg154 tPOP_RET 14, $noreg, def $r7, def $pc, implicit killed $r0155 156...157