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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=thumbv6m-none-eabi < %s | FileCheck %s --check-prefix=CHECKT13; RUN: llc -verify-machineinstrs -mtriple=thumbv7m-none-eabi < %s | FileCheck %s --check-prefixes=CHECKT2,CHECKT2V74; RUN: llc -verify-machineinstrs -mtriple=thumbv8.1m.main-none-eabi < %s | FileCheck %s --check-prefixes=CHECKT2,CHECKT2V85 6declare i64 @llvm.abs.i64(i64, i1 immarg)7 8define i64 @neg_abs64(i64 %x) {9; CHECKT1-LABEL: neg_abs64:10; CHECKT1: @ %bb.0:11; CHECKT1-NEXT: asrs r2, r1, #3112; CHECKT1-NEXT: eors r1, r213; CHECKT1-NEXT: eors r0, r214; CHECKT1-NEXT: subs r0, r2, r015; CHECKT1-NEXT: sbcs r2, r116; CHECKT1-NEXT: mov r1, r217; CHECKT1-NEXT: bx lr18;19; CHECKT2-LABEL: neg_abs64:20; CHECKT2: @ %bb.0:21; CHECKT2-NEXT: eor.w r0, r0, r1, asr #3122; CHECKT2-NEXT: eor.w r2, r1, r1, asr #3123; CHECKT2-NEXT: asrs r3, r1, #3124; CHECKT2-NEXT: rsbs r0, r0, r1, asr #3125; CHECKT2-NEXT: sbc.w r1, r3, r226; CHECKT2-NEXT: bx lr27 %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)28 %neg = sub nsw i64 0, %abs29 ret i64 %neg30}31 32declare i32 @llvm.abs.i32(i32, i1 immarg)33 34define i32 @neg_abs32(i32 %x) {35; CHECKT1-LABEL: neg_abs32:36; CHECKT1: @ %bb.0:37; CHECKT1-NEXT: asrs r1, r0, #3138; CHECKT1-NEXT: eors r0, r139; CHECKT1-NEXT: subs r0, r1, r040; CHECKT1-NEXT: bx lr41;42; CHECKT2V7-LABEL: neg_abs32:43; CHECKT2V7: @ %bb.0:44; CHECKT2V7-NEXT: cmp r0, #045; CHECKT2V7-NEXT: it pl46; CHECKT2V7-NEXT: rsbpl r0, r0, #047; CHECKT2V7-NEXT: bx lr48;49; CHECKT2V8-LABEL: neg_abs32:50; CHECKT2V8: @ %bb.0:51; CHECKT2V8-NEXT: cmp r0, #052; CHECKT2V8-NEXT: cneg r0, r0, pl53; CHECKT2V8-NEXT: bx lr54 %abs = tail call i32 @llvm.abs.i32(i32 %x, i1 true)55 %neg = sub nsw i32 0, %abs56 ret i32 %neg57}58 59declare i16 @llvm.abs.i16(i16, i1 immarg)60 61define i16 @neg_abs16(i16 %x) {62; CHECKT1-LABEL: neg_abs16:63; CHECKT1: @ %bb.0:64; CHECKT1-NEXT: sxth r1, r065; CHECKT1-NEXT: asrs r1, r1, #1566; CHECKT1-NEXT: eors r0, r167; CHECKT1-NEXT: subs r0, r1, r068; CHECKT1-NEXT: bx lr69;70; CHECKT2-LABEL: neg_abs16:71; CHECKT2: @ %bb.0:72; CHECKT2-NEXT: sxth r1, r073; CHECKT2-NEXT: eor.w r0, r0, r1, asr #1574; CHECKT2-NEXT: rsb r0, r0, r1, asr #1575; CHECKT2-NEXT: bx lr76 %abs = tail call i16 @llvm.abs.i16(i16 %x, i1 true)77 %neg = sub nsw i16 0, %abs78 ret i16 %neg79}80 81 82declare i128 @llvm.abs.i128(i128, i1 immarg)83 84define i128 @neg_abs128(i128 %x) {85; CHECKT1-LABEL: neg_abs128:86; CHECKT1: @ %bb.0:87; CHECKT1-NEXT: .save {r4, r5, r6, lr}88; CHECKT1-NEXT: push {r4, r5, r6, lr}89; CHECKT1-NEXT: asrs r4, r3, #3190; CHECKT1-NEXT: eors r3, r491; CHECKT1-NEXT: eors r2, r492; CHECKT1-NEXT: eors r1, r493; CHECKT1-NEXT: eors r0, r494; CHECKT1-NEXT: subs r0, r4, r095; CHECKT1-NEXT: mov r5, r496; CHECKT1-NEXT: sbcs r5, r197; CHECKT1-NEXT: mov r6, r498; CHECKT1-NEXT: sbcs r6, r299; CHECKT1-NEXT: sbcs r4, r3100; CHECKT1-NEXT: mov r1, r5101; CHECKT1-NEXT: mov r2, r6102; CHECKT1-NEXT: mov r3, r4103; CHECKT1-NEXT: pop {r4, r5, r6, pc}104;105; CHECKT2-LABEL: neg_abs128:106; CHECKT2: @ %bb.0:107; CHECKT2-NEXT: .save {r7, lr}108; CHECKT2-NEXT: push {r7, lr}109; CHECKT2-NEXT: eor.w r0, r0, r3, asr #31110; CHECKT2-NEXT: eor.w r1, r1, r3, asr #31111; CHECKT2-NEXT: eor.w r2, r2, r3, asr #31112; CHECKT2-NEXT: asr.w lr, r3, #31113; CHECKT2-NEXT: rsbs r0, r0, r3, asr #31114; CHECKT2-NEXT: eor.w r12, r3, r3, asr #31115; CHECKT2-NEXT: sbcs.w r1, lr, r1116; CHECKT2-NEXT: sbcs.w r2, lr, r2117; CHECKT2-NEXT: sbc.w r3, lr, r12118; CHECKT2-NEXT: pop {r7, pc}119 %abs = tail call i128 @llvm.abs.i128(i128 %x, i1 true)120 %neg = sub nsw i128 0, %abs121 ret i128 %neg122}123 124 125 126define i64 @abs64(i64 %x) {127; CHECKT1-LABEL: abs64:128; CHECKT1: @ %bb.0:129; CHECKT1-NEXT: asrs r2, r1, #31130; CHECKT1-NEXT: eors r1, r2131; CHECKT1-NEXT: eors r0, r2132; CHECKT1-NEXT: subs r0, r0, r2133; CHECKT1-NEXT: sbcs r1, r2134; CHECKT1-NEXT: bx lr135;136; CHECKT2-LABEL: abs64:137; CHECKT2: @ %bb.0:138; CHECKT2-NEXT: eor.w r0, r0, r1, asr #31139; CHECKT2-NEXT: eor.w r2, r1, r1, asr #31140; CHECKT2-NEXT: subs.w r0, r0, r1, asr #31141; CHECKT2-NEXT: sbc.w r1, r2, r1, asr #31142; CHECKT2-NEXT: bx lr143 %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)144 ret i64 %abs145}146 147define i32 @abs32(i32 %x) {148; CHECKT1-LABEL: abs32:149; CHECKT1: @ %bb.0:150; CHECKT1-NEXT: asrs r1, r0, #31151; CHECKT1-NEXT: eors r0, r1152; CHECKT1-NEXT: subs r0, r0, r1153; CHECKT1-NEXT: bx lr154;155; CHECKT2V7-LABEL: abs32:156; CHECKT2V7: @ %bb.0:157; CHECKT2V7-NEXT: cmp r0, #0158; CHECKT2V7-NEXT: it mi159; CHECKT2V7-NEXT: rsbmi r0, r0, #0160; CHECKT2V7-NEXT: bx lr161;162; CHECKT2V8-LABEL: abs32:163; CHECKT2V8: @ %bb.0:164; CHECKT2V8-NEXT: cmp r0, #0165; CHECKT2V8-NEXT: cneg r0, r0, mi166; CHECKT2V8-NEXT: bx lr167 %abs = tail call i32 @llvm.abs.i32(i32 %x, i1 true)168 ret i32 %abs169}170 171define i16 @abs16(i16 %x) {172; CHECKT1-LABEL: abs16:173; CHECKT1: @ %bb.0:174; CHECKT1-NEXT: sxth r1, r0175; CHECKT1-NEXT: asrs r1, r1, #15176; CHECKT1-NEXT: eors r0, r1177; CHECKT1-NEXT: subs r0, r0, r1178; CHECKT1-NEXT: bx lr179;180; CHECKT2V7-LABEL: abs16:181; CHECKT2V7: @ %bb.0:182; CHECKT2V7-NEXT: sxth r0, r0183; CHECKT2V7-NEXT: cmp r0, #0184; CHECKT2V7-NEXT: it mi185; CHECKT2V7-NEXT: rsbmi r0, r0, #0186; CHECKT2V7-NEXT: bx lr187;188; CHECKT2V8-LABEL: abs16:189; CHECKT2V8: @ %bb.0:190; CHECKT2V8-NEXT: sxth r0, r0191; CHECKT2V8-NEXT: cmp r0, #0192; CHECKT2V8-NEXT: cneg r0, r0, mi193; CHECKT2V8-NEXT: bx lr194 %abs = tail call i16 @llvm.abs.i16(i16 %x, i1 true)195 ret i16 %abs196}197 198define i128 @abs128(i128 %x) {199; CHECKT1-LABEL: abs128:200; CHECKT1: @ %bb.0:201; CHECKT1-NEXT: .save {r4, lr}202; CHECKT1-NEXT: push {r4, lr}203; CHECKT1-NEXT: asrs r4, r3, #31204; CHECKT1-NEXT: eors r3, r4205; CHECKT1-NEXT: eors r2, r4206; CHECKT1-NEXT: eors r1, r4207; CHECKT1-NEXT: eors r0, r4208; CHECKT1-NEXT: subs r0, r0, r4209; CHECKT1-NEXT: sbcs r1, r4210; CHECKT1-NEXT: sbcs r2, r4211; CHECKT1-NEXT: sbcs r3, r4212; CHECKT1-NEXT: pop {r4, pc}213;214; CHECKT2-LABEL: abs128:215; CHECKT2: @ %bb.0:216; CHECKT2-NEXT: eor.w r0, r0, r3, asr #31217; CHECKT2-NEXT: eor.w r1, r1, r3, asr #31218; CHECKT2-NEXT: subs.w r0, r0, r3, asr #31219; CHECKT2-NEXT: eor.w r2, r2, r3, asr #31220; CHECKT2-NEXT: sbcs.w r1, r1, r3, asr #31221; CHECKT2-NEXT: eor.w r12, r3, r3, asr #31222; CHECKT2-NEXT: sbcs.w r2, r2, r3, asr #31223; CHECKT2-NEXT: sbc.w r3, r12, r3, asr #31224; CHECKT2-NEXT: bx lr225 %abs = tail call i128 @llvm.abs.i128(i128 %x, i1 true)226 ret i128 %abs227}228 229