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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main -mattr=+cdecp0 -mattr=+cdecp1 -verify-machineinstrs -o - %s | FileCheck %s3; RUN: llc -mtriple=thumbebv8.1m.main -mattr=+cdecp0 -mattr=+cdecp1 -verify-machineinstrs -o - %s | FileCheck %s4 5declare i32 @llvm.arm.cde.cx1(i32 immarg, i32 immarg)6declare i32 @llvm.arm.cde.cx1a(i32 immarg, i32, i32 immarg)7declare { i32, i32 } @llvm.arm.cde.cx1d(i32 immarg, i32 immarg)8declare { i32, i32 } @llvm.arm.cde.cx1da(i32 immarg, i32, i32, i32 immarg)9 10declare i32 @llvm.arm.cde.cx2(i32 immarg, i32, i32 immarg)11declare i32 @llvm.arm.cde.cx2a(i32 immarg, i32, i32, i32 immarg)12declare { i32, i32 } @llvm.arm.cde.cx2d(i32 immarg, i32, i32 immarg)13declare { i32, i32 } @llvm.arm.cde.cx2da(i32 immarg, i32, i32, i32, i32 immarg)14 15declare i32 @llvm.arm.cde.cx3(i32 immarg, i32, i32, i32 immarg)16declare i32 @llvm.arm.cde.cx3a(i32 immarg, i32, i32, i32, i32 immarg)17declare { i32, i32 } @llvm.arm.cde.cx3d(i32 immarg, i32, i32, i32 immarg)18declare { i32, i32 } @llvm.arm.cde.cx3da(i32 immarg, i32, i32, i32, i32, i32 immarg)19 20define arm_aapcs_vfpcc i32 @test_cx1() {21; CHECK-LABEL: test_cx1:22; CHECK: @ %bb.0: @ %entry23; CHECK-NEXT: cx1 p0, r0, #12324; CHECK-NEXT: bx lr25entry:26 %0 = call i32 @llvm.arm.cde.cx1(i32 0, i32 123)27 ret i32 %028}29 30define arm_aapcs_vfpcc i32 @test_cx1a(i32 %acc) {31; CHECK-LABEL: test_cx1a:32; CHECK: @ %bb.0: @ %entry33; CHECK-NEXT: cx1a p0, r0, #34534; CHECK-NEXT: bx lr35entry:36 %0 = call i32 @llvm.arm.cde.cx1a(i32 0, i32 %acc, i32 345)37 ret i32 %038}39 40define arm_aapcs_vfpcc i64 @test_cx1d() {41; CHECK-LABEL: test_cx1d:42; CHECK: @ %bb.0: @ %entry43; CHECK-NEXT: cx1d p1, r0, r1, #56744; CHECK-NEXT: bx lr45entry:46 %0 = call { i32, i32 } @llvm.arm.cde.cx1d(i32 1, i32 567)47 %1 = extractvalue { i32, i32 } %0, 148 %2 = zext i32 %1 to i6449 %3 = shl i64 %2, 3250 %4 = extractvalue { i32, i32 } %0, 051 %5 = zext i32 %4 to i6452 %6 = or i64 %3, %553 ret i64 %654}55 56define arm_aapcs_vfpcc i64 @test_cx1da(i64 %acc) {57; CHECK-LABEL: test_cx1da:58; CHECK: @ %bb.0: @ %entry59; CHECK-NEXT: @ kill: def $r1 killed $r1 killed $r0_r1 def $r0_r160; CHECK-NEXT: @ kill: def $r0 killed $r0 killed $r0_r1 def $r0_r161; CHECK-NEXT: cx1da p0, r0, r1, #78962; CHECK-NEXT: bx lr63entry:64 %0 = lshr i64 %acc, 3265 %1 = trunc i64 %0 to i3266 %2 = trunc i64 %acc to i3267 %3 = call { i32, i32 } @llvm.arm.cde.cx1da(i32 0, i32 %2, i32 %1, i32 789)68 %4 = extractvalue { i32, i32 } %3, 169 %5 = zext i32 %4 to i6470 %6 = shl i64 %5, 3271 %7 = extractvalue { i32, i32 } %3, 072 %8 = zext i32 %7 to i6473 %9 = or i64 %6, %874 ret i64 %975}76 77define arm_aapcs_vfpcc i32 @test_cx2(i32 %n) {78; CHECK-LABEL: test_cx2:79; CHECK: @ %bb.0: @ %entry80; CHECK-NEXT: cx2 p0, r0, r0, #1181; CHECK-NEXT: bx lr82entry:83 %0 = call i32 @llvm.arm.cde.cx2(i32 0, i32 %n, i32 11)84 ret i32 %085}86 87define arm_aapcs_vfpcc i32 @test_cx2a(i32 %acc, i32 %n) {88; CHECK-LABEL: test_cx2a:89; CHECK: @ %bb.0: @ %entry90; CHECK-NEXT: cx2a p1, r0, r1, #2291; CHECK-NEXT: bx lr92entry:93 %0 = call i32 @llvm.arm.cde.cx2a(i32 1, i32 %acc, i32 %n, i32 22)94 ret i32 %095}96 97define arm_aapcs_vfpcc i64 @test_cx2d(i32 %n) #0 {98; CHECK-LABEL: test_cx2d:99; CHECK: @ %bb.0: @ %entry100; CHECK-NEXT: cx2d p1, r0, r1, r0, #33101; CHECK-NEXT: bx lr102entry:103 %0 = call { i32, i32 } @llvm.arm.cde.cx2d(i32 1, i32 %n, i32 33)104 %1 = extractvalue { i32, i32 } %0, 1105 %2 = zext i32 %1 to i64106 %3 = shl i64 %2, 32107 %4 = extractvalue { i32, i32 } %0, 0108 %5 = zext i32 %4 to i64109 %6 = or i64 %3, %5110 ret i64 %6111}112 113define arm_aapcs_vfpcc i64 @test_cx2da(i64 %acc, i32 %n) {114; CHECK-LABEL: test_cx2da:115; CHECK: @ %bb.0: @ %entry116; CHECK-NEXT: @ kill: def $r1 killed $r1 killed $r0_r1 def $r0_r1117; CHECK-NEXT: @ kill: def $r0 killed $r0 killed $r0_r1 def $r0_r1118; CHECK-NEXT: cx2da p0, r0, r1, r2, #44119; CHECK-NEXT: bx lr120entry:121 %0 = lshr i64 %acc, 32122 %1 = trunc i64 %0 to i32123 %2 = trunc i64 %acc to i32124 %3 = call { i32, i32 } @llvm.arm.cde.cx2da(i32 0, i32 %2, i32 %1, i32 %n, i32 44)125 %4 = extractvalue { i32, i32 } %3, 1126 %5 = zext i32 %4 to i64127 %6 = shl i64 %5, 32128 %7 = extractvalue { i32, i32 } %3, 0129 %8 = zext i32 %7 to i64130 %9 = or i64 %6, %8131 ret i64 %9132}133 134define arm_aapcs_vfpcc i32 @test_cx3(i32 %n, i32 %m) {135; CHECK-LABEL: test_cx3:136; CHECK: @ %bb.0: @ %entry137; CHECK-NEXT: cx3 p0, r0, r0, r1, #1138; CHECK-NEXT: bx lr139entry:140 %0 = call i32 @llvm.arm.cde.cx3(i32 0, i32 %n, i32 %m, i32 1)141 ret i32 %0142}143 144define arm_aapcs_vfpcc i32 @test_cx3a(i32 %acc, i32 %n, i32 %m) {145; CHECK-LABEL: test_cx3a:146; CHECK: @ %bb.0: @ %entry147; CHECK-NEXT: cx3a p1, r0, r1, r2, #2148; CHECK-NEXT: bx lr149entry:150 %0 = call i32 @llvm.arm.cde.cx3a(i32 1, i32 %acc, i32 %n, i32 %m, i32 2)151 ret i32 %0152}153 154define arm_aapcs_vfpcc i64 @test_cx3d(i32 %n, i32 %m) {155; CHECK-LABEL: test_cx3d:156; CHECK: @ %bb.0: @ %entry157; CHECK-NEXT: cx3d p1, r0, r1, r0, r1, #3158; CHECK-NEXT: bx lr159entry:160 %0 = call { i32, i32 } @llvm.arm.cde.cx3d(i32 1, i32 %n, i32 %m, i32 3)161 %1 = extractvalue { i32, i32 } %0, 1162 %2 = zext i32 %1 to i64163 %3 = shl i64 %2, 32164 %4 = extractvalue { i32, i32 } %0, 0165 %5 = zext i32 %4 to i64166 %6 = or i64 %3, %5167 ret i64 %6168}169 170define arm_aapcs_vfpcc i64 @test_cx3da(i64 %acc, i32 %n, i32 %m) {171; CHECK-LABEL: test_cx3da:172; CHECK: @ %bb.0: @ %entry173; CHECK-NEXT: @ kill: def $r1 killed $r1 killed $r0_r1 def $r0_r1174; CHECK-NEXT: @ kill: def $r0 killed $r0 killed $r0_r1 def $r0_r1175; CHECK-NEXT: cx3da p0, r0, r1, r2, r3, #4176; CHECK-NEXT: bx lr177entry:178 %0 = lshr i64 %acc, 32179 %1 = trunc i64 %0 to i32180 %2 = trunc i64 %acc to i32181 %3 = call { i32, i32 } @llvm.arm.cde.cx3da(i32 0, i32 %2, i32 %1, i32 %n, i32 %m, i32 4)182 %4 = extractvalue { i32, i32 } %3, 1183 %5 = zext i32 %4 to i64184 %6 = shl i64 %5, 32185 %7 = extractvalue { i32, i32 } %3, 0186 %8 = zext i32 %7 to i64187 %9 = or i64 %6, %8188 ret i64 %9189}190