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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc %s -mtriple=thumbv6m-arm-none-eabi -o - -asm-verbose=false | FileCheck %s --check-prefix=CHECK-V6M3; RUN: llc %s -mtriple=thumbv7m-arm-none-eabi -o - -asm-verbose=false | FileCheck %s --check-prefix=CHECK-V7M4 5define i32 @test_values(i32 %a, i32 %b) minsize optsize {6; CHECK-V6M-LABEL: test_values:7; CHECK-V6M: mov r2, r08; CHECK-V6M-NEXT: ldr r0, .LCPI0_09; CHECK-V6M-NEXT: cmp r2, #5010; CHECK-V6M-NEXT: beq .LBB0_711; CHECK-V6M-NEXT: cmp r2, #112; CHECK-V6M-NEXT: beq .LBB0_513; CHECK-V6M-NEXT: cmp r2, #3014; CHECK-V6M-NEXT: beq .LBB0_615; CHECK-V6M-NEXT: cmp r2, #016; CHECK-V6M-NEXT: bne .LBB0_817; CHECK-V6M-NEXT: adds r0, r1, r018; CHECK-V6M-NEXT: bx lr19; CHECK-V6M-NEXT: .LBB0_5:20; CHECK-V6M-NEXT: adds r0, r0, r121; CHECK-V6M-NEXT: adds r0, r0, #122; CHECK-V6M-NEXT: bx lr23; CHECK-V6M-NEXT: .LBB0_6:24; CHECK-V6M-NEXT: adds r0, r0, r125; CHECK-V6M-NEXT: adds r0, r0, #226; CHECK-V6M-NEXT: bx lr27; CHECK-V6M-NEXT: .LBB0_7:28; CHECK-V6M-NEXT: adds r0, r0, r129; CHECK-V6M-NEXT: adds r0, r0, #430; CHECK-V6M-NEXT: .LBB0_8:31; CHECK-V6M-NEXT: bx lr32; CHECK-V6M-NEXT: .p2align 233; CHECK-V6M-NEXT: .LCPI0_0:34; CHECK-V6M-NEXT: .long 53792360035;36; CHECK-V7M-LABEL: test_values:37; CHECK-V7M: mov r2, r038; CHECK-V7M-NEXT: ldr r0, .LCPI0_039; CHECK-V7M-NEXT: cmp r2, #5040; CHECK-V7M-NEXT: beq .LBB0_541; CHECK-V7M-NEXT: cmp r2, #142; CHECK-V7M-NEXT: ittt eq43; CHECK-V7M-NEXT: addeq r0, r144; CHECK-V7M-NEXT: addeq r0, #145; CHECK-V7M-NEXT: bxeq lr46; CHECK-V7M-NEXT: .LBB0_2:47; CHECK-V7M-NEXT: cmp r2, #3048; CHECK-V7M-NEXT: ittt eq49; CHECK-V7M-NEXT: addeq r0, r150; CHECK-V7M-NEXT: addeq r0, #251; CHECK-V7M-NEXT: bxeq lr52; CHECK-V7M-NEXT: .LBB0_3:53; CHECK-V7M-NEXT: cbnz r2, .LBB0_654; CHECK-V7M-NEXT: add r0, r155; CHECK-V7M-NEXT: bx lr56; CHECK-V7M-NEXT: .LBB0_5:57; CHECK-V7M-NEXT: add r0, r158; CHECK-V7M-NEXT: adds r0, #459; CHECK-V7M-NEXT: .LBB0_6:60; CHECK-V7M-NEXT: bx lr61; CHECK-V7M-NEXT: .p2align 262; CHECK-V7M-NEXT: .LCPI0_0:63; CHECK-V7M-NEXT: .long 53792360064entry:65 switch i32 %a, label %return [66 i32 0, label %sw.bb67 i32 1, label %sw.bb168 i32 30, label %sw.bb369 i32 50, label %sw.bb570 ]71 72sw.bb: ; preds = %entry73 %add = add nsw i32 %b, 53792360074 br label %return75 76sw.bb1: ; preds = %entry77 %add2 = add nsw i32 %b, 53792360178 br label %return79 80sw.bb3: ; preds = %entry81 %add4 = add nsw i32 %b, 53792360282 br label %return83 84sw.bb5: ; preds = %entry85 %add6 = add nsw i32 %b, 53792360486 br label %return87 88return: ; preds = %entry, %sw.bb5, %sw.bb3, %sw.bb1, %sw.bb89 %retval.0 = phi i32 [ %add6, %sw.bb5 ], [ %add4, %sw.bb3 ], [ %add2, %sw.bb1 ], [ %add, %sw.bb ], [ 537923600, %entry ]90 ret i32 %retval.091}92 93define i32 @test_addr(i32 %a, ptr nocapture readonly %b) {94; CHECK-V6M-LABEL: test_addr:95; CHECK-V6M: mov r2, r096; CHECK-V6M-NEXT: movs r0, #1997; CHECK-V6M-NEXT: lsls r3, r0, #498; CHECK-V6M-NEXT: movs r0, #099; CHECK-V6M-NEXT: cmp r2, #29100; CHECK-V6M-NEXT: bgt .LBB1_4101; CHECK-V6M-NEXT: cmp r2, #0102; CHECK-V6M-NEXT: beq .LBB1_8103; CHECK-V6M-NEXT: cmp r2, #1104; CHECK-V6M-NEXT: bne .LBB1_9105; CHECK-V6M-NEXT: adds r3, r3, #1106; CHECK-V6M-NEXT: b .LBB1_8107; CHECK-V6M-NEXT: .LBB1_4:108; CHECK-V6M-NEXT: cmp r2, #30109; CHECK-V6M-NEXT: beq .LBB1_7110; CHECK-V6M-NEXT: cmp r2, #50111; CHECK-V6M-NEXT: bne .LBB1_9112; CHECK-V6M-NEXT: adds r3, r3, #3113; CHECK-V6M-NEXT: b .LBB1_8114; CHECK-V6M-NEXT: .LBB1_7:115; CHECK-V6M-NEXT: adds r3, r3, #2116; CHECK-V6M-NEXT: .LBB1_8:117; CHECK-V6M-NEXT: ldrb r0, [r1, r3]118; CHECK-V6M-NEXT: .LBB1_9:119; CHECK-V6M-NEXT: bx lr120;121; CHECK-V7M-LABEL: test_addr:122; CHECK-V7M: mov r2, r0123; CHECK-V7M-NEXT: movs r0, #0124; CHECK-V7M-NEXT: cmp r2, #29125; CHECK-V7M-NEXT: bgt .LBB1_4126; CHECK-V7M-NEXT: cbz r2, .LBB1_7127; CHECK-V7M-NEXT: cmp r2, #1128; CHECK-V7M-NEXT: it ne129; CHECK-V7M-NEXT: bxne lr130; CHECK-V7M-NEXT: .LBB1_3:131; CHECK-V7M-NEXT: movw r0, #305132; CHECK-V7M-NEXT: b .LBB1_9133; CHECK-V7M-NEXT: .LBB1_4:134; CHECK-V7M-NEXT: cmp r2, #30135; CHECK-V7M-NEXT: beq .LBB1_8136; CHECK-V7M-NEXT: cmp r2, #50137; CHECK-V7M-NEXT: bne .LBB1_10138; CHECK-V7M-NEXT: movw r0, #307139; CHECK-V7M-NEXT: b .LBB1_9140; CHECK-V7M-NEXT: .LBB1_7:141; CHECK-V7M-NEXT: mov.w r0, #304142; CHECK-V7M-NEXT: b .LBB1_9143; CHECK-V7M-NEXT: .LBB1_8:144; CHECK-V7M-NEXT: mov.w r0, #306145; CHECK-V7M-NEXT: .LBB1_9:146; CHECK-V7M-NEXT: ldrb r0, [r1, r0]147; CHECK-V7M-NEXT: .LBB1_10:148; CHECK-V7M-NEXT: bx lr149entry:150 switch i32 %a, label %return [151 i32 0, label %return.sink.split152 i32 1, label %sw.bb1153 i32 30, label %sw.bb4154 i32 50, label %sw.bb7155 ]156 157sw.bb1: ; preds = %entry158 br label %return.sink.split159 160sw.bb4: ; preds = %entry161 br label %return.sink.split162 163sw.bb7: ; preds = %entry164 br label %return.sink.split165 166return.sink.split: ; preds = %entry, %sw.bb1, %sw.bb4, %sw.bb7167 %.sink = phi i32 [ 307, %sw.bb7 ], [ 306, %sw.bb4 ], [ 305, %sw.bb1 ], [ 304, %entry ]168 %arrayidx8 = getelementptr inbounds i8, ptr %b, i32 %.sink169 %0 = load i8, ptr %arrayidx8, align 1170 %phitmp = zext i8 %0 to i32171 br label %return172 173return: ; preds = %return.sink.split, %entry174 %retval.0.shrunk = phi i32 [ 0, %entry ], [ %phitmp, %return.sink.split ]175 ret i32 %retval.0.shrunk176}177 178