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1; RUN: llc < %s -mtriple=thumbv7-none-eabi -mcpu=cortex-m3 | FileCheck %s -check-prefix=CHECK -check-prefix=NONE2; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP3; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP4; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP5 6 7 8define i1 @cmp_f_false(float %a, float %b) {9; CHECK-LABEL: cmp_f_false:10; NONE: movs r0, #011; HARD: movs r0, #012 %1 = fcmp false float %a, %b13 ret i1 %114}15define i1 @cmp_f_oeq(float %a, float %b) {16; CHECK-LABEL: cmp_f_oeq:17; NONE: bl __aeabi_fcmpeq18; HARD: vcmp.f3219; HARD: moveq r0, #120 %1 = fcmp oeq float %a, %b21 ret i1 %122}23define i1 @cmp_f_ogt(float %a, float %b) {24; CHECK-LABEL: cmp_f_ogt:25; NONE: bl __aeabi_fcmpgt26; HARD: vcmp.f3227; HARD: movgt r0, #128 %1 = fcmp ogt float %a, %b29 ret i1 %130}31define i1 @cmp_f_oge(float %a, float %b) {32; CHECK-LABEL: cmp_f_oge:33; NONE: bl __aeabi_fcmpge34; HARD: vcmp.f3235; HARD: movge r0, #136 %1 = fcmp oge float %a, %b37 ret i1 %138}39define i1 @cmp_f_olt(float %a, float %b) {40; CHECK-LABEL: cmp_f_olt:41; NONE: bl __aeabi_fcmplt42; HARD: vcmp.f3243; HARD: movmi r0, #144 %1 = fcmp olt float %a, %b45 ret i1 %146}47define i1 @cmp_f_ole(float %a, float %b) {48; CHECK-LABEL: cmp_f_ole:49; NONE: bl __aeabi_fcmple50; HARD: vcmp.f3251; HARD: movls r0, #152 %1 = fcmp ole float %a, %b53 ret i1 %154}55define i1 @cmp_f_one(float %a, float %b) {56; CHECK-LABEL: cmp_f_one:57; NONE: bl __aeabi_fcmpeq58; NONE: bl __aeabi_fcmpun59; HARD: vcmp.f3260; HARD: movmi r0, #161; HARD: movgt r0, #162 %1 = fcmp one float %a, %b63 ret i1 %164}65define i1 @cmp_f_ord(float %a, float %b) {66; CHECK-LABEL: cmp_f_ord:67; NONE: bl __aeabi_fcmpun68; HARD: vcmp.f3269; HARD: movvc r0, #170 %1 = fcmp ord float %a, %b71 ret i1 %172}73define i1 @cmp_f_ueq(float %a, float %b) {74; CHECK-LABEL: cmp_f_ueq:75; NONE: bl __aeabi_fcmpeq76; NONE: bl __aeabi_fcmpun77; HARD: vcmp.f3278; HARD: moveq r0, #179; HARD: movvs r0, #180 %1 = fcmp ueq float %a, %b81 ret i1 %182}83define i1 @cmp_f_ugt(float %a, float %b) {84; CHECK-LABEL: cmp_f_ugt:85; NONE: bl __aeabi_fcmple86; NONE-NEXT: clz r0, r087; NONE-NEXT: lsrs r0, r0, #588; HARD: vcmp.f3289; HARD: movhi r0, #190 %1 = fcmp ugt float %a, %b91 ret i1 %192}93define i1 @cmp_f_uge(float %a, float %b) {94; CHECK-LABEL: cmp_f_uge:95; NONE: bl __aeabi_fcmplt96; NONE-NEXT: clz r0, r097; NONE-NEXT: lsrs r0, r0, #598; HARD: vcmp.f3299; HARD: movpl r0, #1100 %1 = fcmp uge float %a, %b101 ret i1 %1102}103define i1 @cmp_f_ult(float %a, float %b) {104; CHECK-LABEL: cmp_f_ult:105; NONE: bl __aeabi_fcmpge106; NONE-NEXT: clz r0, r0107; NONE-NEXT: lsrs r0, r0, #5108; HARD: vcmp.f32109; HARD: movlt r0, #1110 %1 = fcmp ult float %a, %b111 ret i1 %1112}113define i1 @cmp_f_ule(float %a, float %b) {114; CHECK-LABEL: cmp_f_ule:115; NONE: bl __aeabi_fcmpgt116; NONE-NEXT: clz r0, r0117; NONE-NEXT: lsrs r0, r0, #5118; HARD: vcmp.f32119; HARD: movle r0, #1120 %1 = fcmp ule float %a, %b121 ret i1 %1122}123define i1 @cmp_f_une(float %a, float %b) {124; CHECK-LABEL: cmp_f_une:125; NONE: bl __aeabi_fcmpeq126; HARD: vcmp.f32127; HARD: movne r0, #1128 %1 = fcmp une float %a, %b129 ret i1 %1130}131define i1 @cmp_f_uno(float %a, float %b) {132; CHECK-LABEL: cmp_f_uno:133; NONE: bl __aeabi_fcmpun134; HARD: vcmp.f32135; HARD: movvs r0, #1136 %1 = fcmp uno float %a, %b137 ret i1 %1138}139define i1 @cmp_f_true(float %a, float %b) {140; CHECK-LABEL: cmp_f_true:141; NONE: movs r0, #1142; HARD: movs r0, #1143 %1 = fcmp true float %a, %b144 ret i1 %1145}146 147define i1 @cmp_d_false(double %a, double %b) {148; CHECK-LABEL: cmp_d_false:149; NONE: movs r0, #0150; HARD: movs r0, #0151 %1 = fcmp false double %a, %b152 ret i1 %1153}154define i1 @cmp_d_oeq(double %a, double %b) {155; CHECK-LABEL: cmp_d_oeq:156; NONE: bl __aeabi_dcmpeq157; SP: bl __aeabi_dcmpeq158; DP: vcmp.f64159; DP: moveq r0, #1160 %1 = fcmp oeq double %a, %b161 ret i1 %1162}163define i1 @cmp_d_ogt(double %a, double %b) {164; CHECK-LABEL: cmp_d_ogt:165; NONE: bl __aeabi_dcmpgt166; SP: bl __aeabi_dcmpgt167; DP: vcmp.f64168; DP: movgt r0, #1169 %1 = fcmp ogt double %a, %b170 ret i1 %1171}172define i1 @cmp_d_oge(double %a, double %b) {173; CHECK-LABEL: cmp_d_oge:174; NONE: bl __aeabi_dcmpge175; SP: bl __aeabi_dcmpge176; DP: vcmp.f64177; DP: movge r0, #1178 %1 = fcmp oge double %a, %b179 ret i1 %1180}181define i1 @cmp_d_olt(double %a, double %b) {182; CHECK-LABEL: cmp_d_olt:183; NONE: bl __aeabi_dcmplt184; SP: bl __aeabi_dcmplt185; DP: vcmp.f64186; DP: movmi r0, #1187 %1 = fcmp olt double %a, %b188 ret i1 %1189}190define i1 @cmp_d_ole(double %a, double %b) {191; CHECK-LABEL: cmp_d_ole:192; NONE: bl __aeabi_dcmple193; SP: bl __aeabi_dcmple194; DP: vcmp.f64195; DP: movls r0, #1196 %1 = fcmp ole double %a, %b197 ret i1 %1198}199define i1 @cmp_d_one(double %a, double %b) {200; CHECK-LABEL: cmp_d_one:201; NONE: bl __aeabi_dcmpeq202; NONE: bl __aeabi_dcmpun203; SP: bl __aeabi_dcmpun204; SP: eor r8, r0, #1205; SP: bl __aeabi_dcmpeq206; SP-NEXT: clz r0, r0207; SP-NEXT: lsrs r0, r0, #5208; SP-NEXT: ands.w r0, r0, r8209 210; DP: vcmp.f64211; DP: movmi r0, #1212; DP: movgt r0, #1213 %1 = fcmp one double %a, %b214 ret i1 %1215}216define i1 @cmp_d_ord(double %a, double %b) {217; CHECK-LABEL: cmp_d_ord:218; NONE: bl __aeabi_dcmpun219; SP: bl __aeabi_dcmpun220; DP: vcmp.f64221; DP: movvc r0, #1222 %1 = fcmp ord double %a, %b223 ret i1 %1224}225define i1 @cmp_d_ugt(double %a, double %b) {226; CHECK-LABEL: cmp_d_ugt:227; NONE: bl __aeabi_dcmple228; SP: bl __aeabi_dcmple229; DP: vcmp.f64230; DP: movhi r0, #1231 %1 = fcmp ugt double %a, %b232 ret i1 %1233}234 235define i1 @cmp_d_ult(double %a, double %b) {236; CHECK-LABEL: cmp_d_ult:237; NONE: bl __aeabi_dcmpge238; SP: bl __aeabi_dcmpge239; DP: vcmp.f64240; DP: movlt r0, #1241 %1 = fcmp ult double %a, %b242 ret i1 %1243}244 245 246define i1 @cmp_d_uno(double %a, double %b) {247; CHECK-LABEL: cmp_d_uno:248; NONE: bl __aeabi_dcmpun249; SP: bl __aeabi_dcmpun250; DP: vcmp.f64251; DP: movvs r0, #1252 %1 = fcmp uno double %a, %b253 ret i1 %1254}255define i1 @cmp_d_true(double %a, double %b) {256; CHECK-LABEL: cmp_d_true:257; NONE: movs r0, #1258; HARD: movs r0, #1259 %1 = fcmp true double %a, %b260 ret i1 %1261}262define i1 @cmp_d_ueq(double %a, double %b) {263; CHECK-LABEL: cmp_d_ueq:264; NONE: bl __aeabi_dcmpeq265; NONE: bl __aeabi_dcmpun266; SP: bl __aeabi_dcmpeq267; SP: bl __aeabi_dcmpun268; DP: vcmp.f64269; DP: moveq r0, #1270; DP: movvs r0, #1271 %1 = fcmp ueq double %a, %b272 ret i1 %1273}274 275define i1 @cmp_d_uge(double %a, double %b) {276; CHECK-LABEL: cmp_d_uge:277; NONE: bl __aeabi_dcmplt278; SP: bl __aeabi_dcmplt279; DP: vcmp.f64280; DP: movpl r0, #1281 %1 = fcmp uge double %a, %b282 ret i1 %1283}284 285define i1 @cmp_d_ule(double %a, double %b) {286; CHECK-LABEL: cmp_d_ule:287; NONE: bl __aeabi_dcmpgt288; SP: bl __aeabi_dcmpgt289; DP: vcmp.f64290; DP: movle r0, #1291 %1 = fcmp ule double %a, %b292 ret i1 %1293}294 295define i1 @cmp_d_une(double %a, double %b) {296; CHECK-LABEL: cmp_d_une:297; NONE: bl __aeabi_dcmpeq298; SP: bl __aeabi_dcmpeq299; DP: vcmp.f64300; DP: movne r0, #1301 %1 = fcmp une double %a, %b302 ret i1 %1303}304