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1; RUN: llc < %s -mtriple=thumbv7-none-eabi -mcpu=cortex-m3 | FileCheck %s -check-prefix=CHECK -check-prefix=SOFT -check-prefix=NONE2; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP -check-prefix=NO-VMLA3; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m33 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP -check-prefix=NO-VMLA4; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=VFP -check-prefix=FP-ARMv8 -check-prefix=VMLA5; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 -mattr=-fp64 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP -check-prefix=FP-ARMv8 -check-prefix=VMLA6; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a7 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=NEON-A7 -check-prefix=VFP4 -check-prefix=NO-VMLA7; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a57 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=NEON-A57 -check-prefix=FP-ARMv8 -check-prefix=VMLA8 9declare float @llvm.sqrt.f32(float %Val)10define float @sqrt_f(float %a) {11; CHECK-LABEL: sqrt_f:12; SOFT: bl sqrtf13; HARD: vsqrt.f32 s0, s014 %1 = call float @llvm.sqrt.f32(float %a)15 ret float %116}17 18declare float @llvm.powi.f32.i32(float %Val, i32 %power)19define float @powi_f(float %a, i32 %b) {20; CHECK-LABEL: powi_f:21; SOFT: bl __powisf222; HARD: b __powisf223 %1 = call float @llvm.powi.f32.i32(float %a, i32 %b)24 ret float %125}26 27declare float @llvm.sin.f32(float %Val)28define float @sin_f(float %a) {29; CHECK-LABEL: sin_f:30; SOFT: bl sinf31; HARD: b sinf32 %1 = call float @llvm.sin.f32(float %a)33 ret float %134}35 36declare float @llvm.cos.f32(float %Val)37define float @cos_f(float %a) {38; CHECK-LABEL: cos_f:39; SOFT: bl cosf40; HARD: b cosf41 %1 = call float @llvm.cos.f32(float %a)42 ret float %143}44 45declare float @llvm.tan.f32(float %Val)46define float @tan_f(float %a) {47; CHECK-LABEL: tan_f:48; SOFT: bl tanf49; HARD: b tanf50 %1 = call float @llvm.tan.f32(float %a)51 ret float %152}53 54declare float @llvm.pow.f32(float %Val, float %power)55define float @pow_f(float %a, float %b) {56; CHECK-LABEL: pow_f:57; SOFT: bl powf58; HARD: b powf59 %1 = call float @llvm.pow.f32(float %a, float %b)60 ret float %161}62 63declare float @llvm.exp.f32(float %Val)64define float @exp_f(float %a) {65; CHECK-LABEL: exp_f:66; SOFT: bl expf67; HARD: b expf68 %1 = call float @llvm.exp.f32(float %a)69 ret float %170}71 72declare float @llvm.exp2.f32(float %Val)73define float @exp2_f(float %a) {74; CHECK-LABEL: exp2_f:75; SOFT: bl exp2f76; HARD: b exp2f77 %1 = call float @llvm.exp2.f32(float %a)78 ret float %179}80 81declare float @llvm.log.f32(float %Val)82define float @log_f(float %a) {83; CHECK-LABEL: log_f:84; SOFT: bl logf85; HARD: b logf86 %1 = call float @llvm.log.f32(float %a)87 ret float %188}89 90declare float @llvm.log10.f32(float %Val)91define float @log10_f(float %a) {92; CHECK-LABEL: log10_f:93; SOFT: bl log10f94; HARD: b log10f95 %1 = call float @llvm.log10.f32(float %a)96 ret float %197}98 99declare float @llvm.log2.f32(float %Val)100define float @log2_f(float %a) {101; CHECK-LABEL: log2_f:102; SOFT: bl log2f103; HARD: b log2f104 %1 = call float @llvm.log2.f32(float %a)105 ret float %1106}107 108declare float @llvm.fma.f32(float %a, float %b, float %c)109define float @fma_f(float %a, float %b, float %c) {110; CHECK-LABEL: fma_f:111; SOFT: bl fmaf112; HARD: vfma.f32113 %1 = call float @llvm.fma.f32(float %a, float %b, float %c)114 ret float %1115}116 117declare float @llvm.fabs.f32(float %Val)118define float @abs_f(float %a) {119; CHECK-LABEL: abs_f:120; SOFT: bic r0, r0, #-2147483648121; HARD: vabs.f32122 %1 = call float @llvm.fabs.f32(float %a)123 ret float %1124}125 126declare float @llvm.copysign.f32(float %Mag, float %Sgn)127define float @copysign_f(float %a, float %b) {128; CHECK-LABEL: copysign_f:129; NONE: lsrs [[REG:r[0-9]+]], r{{[0-9]+}}, #31130; NONE: bfi r{{[0-9]+}}, [[REG]], #31, #1131; SP: lsrs [[REG:r[0-9]+]], r{{[0-9]+}}, #31132; SP: bfi r{{[0-9]+}}, [[REG]], #31, #1133; VFP: lsrs [[REG:r[0-9]+]], r{{[0-9]+}}, #31134; VFP: bfi r{{[0-9]+}}, [[REG]], #31, #1135; NEON-A7: @ %bb.0:136; NEON-A7-NEXT: vmov.f32 s2, s1137; NEON-A7-NEXT: @ kill: def $s0 killed $s0 def $d0138; NEON-A7-NEXT: vmov.i32 d16, #0x80000000139; NEON-A7-NEXT: vbit d0, d1, d16140; NEON-A7-NEXT: @ kill: def $s0 killed $s0 killed $d0141; NEON-A7-NEXT: bx lr142; NEON-A57: @ %bb.0:143; NEON-A57-NEXT: vmov.f32 s2, s1144; NEON-A57-NEXT: vmov.i32 d16, #0x80000000145; NEON-A57-NEXT: @ kill: def $s0 killed $s0 def $d0146; NEON-A57-NEXT: vbit d0, d1, d16147; NEON-A57-NEXT: @ kill: def $s0 killed $s0 killed $d0148; NEON-A57-NEXT: bx lr149 %1 = call float @llvm.copysign.f32(float %a, float %b)150 ret float %1151}152 153declare float @llvm.floor.f32(float %Val)154define float @floor_f(float %a) {155; CHECK-LABEL: floor_f:156; SOFT: bl floorf157; VFP4: b floorf158; FP-ARMv8: vrintm.f32159 %1 = call float @llvm.floor.f32(float %a)160 ret float %1161}162 163declare float @llvm.ceil.f32(float %Val)164define float @ceil_f(float %a) {165; CHECK-LABEL: ceil_f:166; SOFT: bl ceilf167; VFP4: b ceilf168; FP-ARMv8: vrintp.f32169 %1 = call float @llvm.ceil.f32(float %a)170 ret float %1171}172 173declare float @llvm.trunc.f32(float %Val)174define float @trunc_f(float %a) {175; CHECK-LABEL: trunc_f:176; SOFT: bl truncf177; VFP4: b truncf178; FP-ARMv8: vrintz.f32179 %1 = call float @llvm.trunc.f32(float %a)180 ret float %1181}182 183declare float @llvm.rint.f32(float %Val)184define float @rint_f(float %a) {185; CHECK-LABEL: rint_f:186; SOFT: bl rintf187; VFP4: b rintf188; FP-ARMv8: vrintx.f32189 %1 = call float @llvm.rint.f32(float %a)190 ret float %1191}192 193declare float @llvm.nearbyint.f32(float %Val)194define float @nearbyint_f(float %a) {195; CHECK-LABEL: nearbyint_f:196; SOFT: bl nearbyintf197; VFP4: b nearbyintf198; FP-ARMv8: vrintr.f32199 %1 = call float @llvm.nearbyint.f32(float %a)200 ret float %1201}202 203declare float @llvm.round.f32(float %Val)204define float @round_f(float %a) {205; CHECK-LABEL: round_f:206; SOFT: bl roundf207; VFP4: b roundf208; FP-ARMv8: vrinta.f32209 %1 = call float @llvm.round.f32(float %a)210 ret float %1211}212 213declare float @llvm.roundeven.f32(float %Val)214define float @roundeven_f(float %a) {215; CHECK-LABEL: roundeven_f:216; SOFT: bl roundevenf217; VFP4: b roundevenf218; FP-ARMv8: vrintn.f32219 %1 = call float @llvm.roundeven.f32(float %a)220 ret float %1221}222 223declare float @llvm.fmuladd.f32(float %a, float %b, float %c)224define float @fmuladd_f(float %a, float %b, float %c) {225; CHECK-LABEL: fmuladd_f:226; SOFT: bl __aeabi_fmul227; SOFT: bl __aeabi_fadd228; VMLA: vfma.f32229; NO-VMLA: vmul.f32230; NO-VMLA: vadd.f32231 %1 = call float @llvm.fmuladd.f32(float %a, float %b, float %c)232 ret float %1233}234 235declare i16 @llvm.convert.to.fp16.f32(float %a)236define i16 @f_to_h(float %a) {237; CHECK-LABEL: f_to_h:238; SOFT: bl __aeabi_f2h239; HARD: vcvt{{[bt]}}.f16.f32240 %1 = call i16 @llvm.convert.to.fp16.f32(float %a)241 ret i16 %1242}243 244declare float @llvm.convert.from.fp16.f32(i16 %a)245define float @h_to_f(i16 %a) {246; CHECK-LABEL: h_to_f:247; SOFT: bl __aeabi_h2f248; HARD: vcvt{{[bt]}}.f32.f16249 %1 = call float @llvm.convert.from.fp16.f32(i16 %a)250 ret float %1251}252