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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -run-pass regallocfast %s -o - | FileCheck %s3# RUN: llc -passes=regallocfast %s -o - | FileCheck %s4 5# This test examines register allocation and spilling with Fast Register6# Allocator. The test uses inline assembler that requests an input variable to7# be loaded in a high register but at the same time has r12 marked as clobbered.8# The allocator initially satisfies the load request by selecting r12 but then9# needs to spill this register when it reaches the INLINEASM instruction and10# notices its clobber definition.11#12# The test checks that the compiler is able to spill a register from the hGPR13# class in Thumb2 by inserting the t2STRi12/t2LDRi12 instructions.14 15--- |16 ; ModuleID = 'test.ll'17 source_filename = "test.c"18 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"19 target triple = "thumbv7m-none-unknown-eabi"20 21 define dso_local void @constraint_h() {22 entry:23 %i = alloca i32, align 424 %0 = load i32, ptr %i, align 425 call void asm sideeffect "@ $0", "h,~{r12}"(i32 %0)26 ret void27 }28 29...30---31name: constraint_h32tracksRegLiveness: true33registers:34 - { id: 0, class: hgpr }35 - { id: 1, class: tgpr }36stack:37 - { id: 0, name: i, size: 4, alignment: 4, stack-id: default, local-offset: -4 }38body: |39 bb.0.entry:40 ; CHECK-LABEL: name: constraint_h41 ; CHECK: renamable $r0 = tLDRspi %stack.0.i, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from %ir.i)42 ; CHECK: renamable $r8 = COPY killed renamable $r043 ; CHECK: INLINEASM &"@ $0", 1 /* sideeffect attdialect */, 589833 /* reguse:GPRnopc */, killed renamable $r8, 12 /* clobber */, implicit-def dead early-clobber $r1244 ; CHECK: tBX_RET 14 /* CC::al */, $noreg45 %1:tgpr = tLDRspi %stack.0.i, 0, 14, $noreg :: (dereferenceable load (s32) from %ir.i)46 %0:hgpr = COPY %147 INLINEASM &"@ $0", 1, 589833, %0, 12, implicit-def early-clobber $r1248 tBX_RET 14, $noreg49 50...51