4145 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-MVE3; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-MVEFP4 5;6; Float to signed 32-bit -- Vector size variation7;8 9declare <1 x i32> @llvm.fptoui.sat.v1f32.v1i32 (<1 x float>)10declare <2 x i32> @llvm.fptoui.sat.v2f32.v2i32 (<2 x float>)11declare <3 x i32> @llvm.fptoui.sat.v3f32.v3i32 (<3 x float>)12declare <4 x i32> @llvm.fptoui.sat.v4f32.v4i32 (<4 x float>)13declare <5 x i32> @llvm.fptoui.sat.v5f32.v5i32 (<5 x float>)14declare <6 x i32> @llvm.fptoui.sat.v6f32.v6i32 (<6 x float>)15declare <7 x i32> @llvm.fptoui.sat.v7f32.v7i32 (<7 x float>)16declare <8 x i32> @llvm.fptoui.sat.v8f32.v8i32 (<8 x float>)17 18define arm_aapcs_vfpcc <1 x i32> @test_unsigned_v1f32_v1i32(<1 x float> %f) {19; CHECK-LABEL: test_unsigned_v1f32_v1i32:20; CHECK: @ %bb.0:21; CHECK-NEXT: vcvt.u32.f32 s0, s022; CHECK-NEXT: vmov r0, s023; CHECK-NEXT: bx lr24 %x = call <1 x i32> @llvm.fptoui.sat.v1f32.v1i32(<1 x float> %f)25 ret <1 x i32> %x26}27 28define arm_aapcs_vfpcc <2 x i32> @test_unsigned_v2f32_v2i32(<2 x float> %f) {29; CHECK-LABEL: test_unsigned_v2f32_v2i32:30; CHECK: @ %bb.0:31; CHECK-NEXT: .save {r4, r5, r7, lr}32; CHECK-NEXT: push {r4, r5, r7, lr}33; CHECK-NEXT: .vsave {d8, d9}34; CHECK-NEXT: vpush {d8, d9}35; CHECK-NEXT: vmov q4, q036; CHECK-NEXT: vmov r0, s1737; CHECK-NEXT: bl __aeabi_f2ulz38; CHECK-NEXT: mov r5, r039; CHECK-NEXT: vmov r0, s1640; CHECK-NEXT: vldr s18, .LCPI1_041; CHECK-NEXT: vcmp.f32 s17, #042; CHECK-NEXT: mov r4, r143; CHECK-NEXT: vmrs APSR_nzcv, fpscr44; CHECK-NEXT: itt lt45; CHECK-NEXT: movlt r5, #046; CHECK-NEXT: movlt r4, #047; CHECK-NEXT: vcmp.f32 s17, s1848; CHECK-NEXT: vmrs APSR_nzcv, fpscr49; CHECK-NEXT: itt gt50; CHECK-NEXT: movgt r4, #051; CHECK-NEXT: movgt.w r5, #-152; CHECK-NEXT: bl __aeabi_f2ulz53; CHECK-NEXT: vcmp.f32 s16, #054; CHECK-NEXT: vmrs APSR_nzcv, fpscr55; CHECK-NEXT: itt lt56; CHECK-NEXT: movlt r1, #057; CHECK-NEXT: movlt r0, #058; CHECK-NEXT: vcmp.f32 s16, s1859; CHECK-NEXT: vmrs APSR_nzcv, fpscr60; CHECK-NEXT: itt gt61; CHECK-NEXT: movgt.w r0, #-162; CHECK-NEXT: movgt r1, #063; CHECK-NEXT: vmov q0[2], q0[0], r0, r564; CHECK-NEXT: vmov q0[3], q0[1], r1, r465; CHECK-NEXT: vpop {d8, d9}66; CHECK-NEXT: pop {r4, r5, r7, pc}67; CHECK-NEXT: .p2align 268; CHECK-NEXT: @ %bb.1:69; CHECK-NEXT: .LCPI1_0:70; CHECK-NEXT: .long 0x4f7fffff @ float 4.29496704E+971 %x = call <2 x i32> @llvm.fptoui.sat.v2f32.v2i32(<2 x float> %f)72 ret <2 x i32> %x73}74 75define arm_aapcs_vfpcc <3 x i32> @test_unsigned_v3f32_v3i32(<3 x float> %f) {76; CHECK-MVE-LABEL: test_unsigned_v3f32_v3i32:77; CHECK-MVE: @ %bb.0:78; CHECK-MVE-NEXT: vcvt.u32.f32 s2, s279; CHECK-MVE-NEXT: vcvt.u32.f32 s0, s080; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s381; CHECK-MVE-NEXT: vcvt.u32.f32 s6, s182; CHECK-MVE-NEXT: vmov r0, s283; CHECK-MVE-NEXT: vmov r1, s084; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r085; CHECK-MVE-NEXT: vmov r0, s486; CHECK-MVE-NEXT: vmov r1, s687; CHECK-MVE-NEXT: vmov q0[3], q0[1], r1, r088; CHECK-MVE-NEXT: bx lr89;90; CHECK-MVEFP-LABEL: test_unsigned_v3f32_v3i32:91; CHECK-MVEFP: @ %bb.0:92; CHECK-MVEFP-NEXT: vcvt.u32.f32 q0, q093; CHECK-MVEFP-NEXT: bx lr94 %x = call <3 x i32> @llvm.fptoui.sat.v3f32.v3i32(<3 x float> %f)95 ret <3 x i32> %x96}97 98define arm_aapcs_vfpcc <4 x i32> @test_unsigned_v4f32_v4i32(<4 x float> %f) {99; CHECK-MVE-LABEL: test_unsigned_v4f32_v4i32:100; CHECK-MVE: @ %bb.0:101; CHECK-MVE-NEXT: vcvt.u32.f32 s2, s2102; CHECK-MVE-NEXT: vcvt.u32.f32 s0, s0103; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s3104; CHECK-MVE-NEXT: vcvt.u32.f32 s6, s1105; CHECK-MVE-NEXT: vmov r0, s2106; CHECK-MVE-NEXT: vmov r1, s0107; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r0108; CHECK-MVE-NEXT: vmov r0, s4109; CHECK-MVE-NEXT: vmov r1, s6110; CHECK-MVE-NEXT: vmov q0[3], q0[1], r1, r0111; CHECK-MVE-NEXT: bx lr112;113; CHECK-MVEFP-LABEL: test_unsigned_v4f32_v4i32:114; CHECK-MVEFP: @ %bb.0:115; CHECK-MVEFP-NEXT: vcvt.u32.f32 q0, q0116; CHECK-MVEFP-NEXT: bx lr117 %x = call <4 x i32> @llvm.fptoui.sat.v4f32.v4i32(<4 x float> %f)118 ret <4 x i32> %x119}120 121define arm_aapcs_vfpcc <5 x i32> @test_unsigned_v5f32_v5i32(<5 x float> %f) {122; CHECK-MVE-LABEL: test_unsigned_v5f32_v5i32:123; CHECK-MVE: @ %bb.0:124; CHECK-MVE-NEXT: vcvt.u32.f32 s2, s2125; CHECK-MVE-NEXT: vcvt.u32.f32 s0, s0126; CHECK-MVE-NEXT: vcvt.u32.f32 s6, s3127; CHECK-MVE-NEXT: vcvt.u32.f32 s8, s1128; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s4129; CHECK-MVE-NEXT: vmov r1, s2130; CHECK-MVE-NEXT: vmov r2, s0131; CHECK-MVE-NEXT: vmov q0[2], q0[0], r2, r1132; CHECK-MVE-NEXT: vmov r1, s6133; CHECK-MVE-NEXT: vmov r2, s8134; CHECK-MVE-NEXT: vmov q0[3], q0[1], r2, r1135; CHECK-MVE-NEXT: vstrw.32 q0, [r0]136; CHECK-MVE-NEXT: vstr s4, [r0, #16]137; CHECK-MVE-NEXT: bx lr138;139; CHECK-MVEFP-LABEL: test_unsigned_v5f32_v5i32:140; CHECK-MVEFP: @ %bb.0:141; CHECK-MVEFP-NEXT: vcvt.u32.f32 q1, q1142; CHECK-MVEFP-NEXT: vcvt.u32.f32 q0, q0143; CHECK-MVEFP-NEXT: vmov r1, s4144; CHECK-MVEFP-NEXT: str r1, [r0, #16]145; CHECK-MVEFP-NEXT: vstrw.32 q0, [r0]146; CHECK-MVEFP-NEXT: bx lr147 %x = call <5 x i32> @llvm.fptoui.sat.v5f32.v5i32(<5 x float> %f)148 ret <5 x i32> %x149}150 151define arm_aapcs_vfpcc <6 x i32> @test_unsigned_v6f32_v6i32(<6 x float> %f) {152; CHECK-MVE-LABEL: test_unsigned_v6f32_v6i32:153; CHECK-MVE: @ %bb.0:154; CHECK-MVE-NEXT: vcvt.u32.f32 s2, s2155; CHECK-MVE-NEXT: vcvt.u32.f32 s0, s0156; CHECK-MVE-NEXT: vcvt.u32.f32 s8, s3157; CHECK-MVE-NEXT: vcvt.u32.f32 s10, s1158; CHECK-MVE-NEXT: vcvt.u32.f32 s6, s5159; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s4160; CHECK-MVE-NEXT: vmov r1, s2161; CHECK-MVE-NEXT: vmov r2, s0162; CHECK-MVE-NEXT: vmov q0[2], q0[0], r2, r1163; CHECK-MVE-NEXT: vmov r1, s8164; CHECK-MVE-NEXT: vmov r2, s10165; CHECK-MVE-NEXT: vmov q0[3], q0[1], r2, r1166; CHECK-MVE-NEXT: vstr s6, [r0, #20]167; CHECK-MVE-NEXT: vstrw.32 q0, [r0]168; CHECK-MVE-NEXT: vstr s4, [r0, #16]169; CHECK-MVE-NEXT: bx lr170;171; CHECK-MVEFP-LABEL: test_unsigned_v6f32_v6i32:172; CHECK-MVEFP: @ %bb.0:173; CHECK-MVEFP-NEXT: vcvt.u32.f32 q1, q1174; CHECK-MVEFP-NEXT: vcvt.u32.f32 q0, q0175; CHECK-MVEFP-NEXT: vmov.f32 s6, s5176; CHECK-MVEFP-NEXT: vmov r2, s4177; CHECK-MVEFP-NEXT: vmov r1, s6178; CHECK-MVEFP-NEXT: strd r2, r1, [r0, #16]179; CHECK-MVEFP-NEXT: vstrw.32 q0, [r0]180; CHECK-MVEFP-NEXT: bx lr181 %x = call <6 x i32> @llvm.fptoui.sat.v6f32.v6i32(<6 x float> %f)182 ret <6 x i32> %x183}184 185define arm_aapcs_vfpcc <7 x i32> @test_unsigned_v7f32_v7i32(<7 x float> %f) {186; CHECK-MVE-LABEL: test_unsigned_v7f32_v7i32:187; CHECK-MVE: @ %bb.0:188; CHECK-MVE-NEXT: vcvt.u32.f32 s2, s2189; CHECK-MVE-NEXT: vcvt.u32.f32 s0, s0190; CHECK-MVE-NEXT: vcvt.u32.f32 s10, s3191; CHECK-MVE-NEXT: vcvt.u32.f32 s12, s1192; CHECK-MVE-NEXT: vcvt.u32.f32 s8, s5193; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s4194; CHECK-MVE-NEXT: vcvt.u32.f32 s6, s6195; CHECK-MVE-NEXT: vmov r1, s2196; CHECK-MVE-NEXT: vmov r2, s0197; CHECK-MVE-NEXT: vmov q0[2], q0[0], r2, r1198; CHECK-MVE-NEXT: vmov r1, s10199; CHECK-MVE-NEXT: vmov r2, s12200; CHECK-MVE-NEXT: vmov q0[3], q0[1], r2, r1201; CHECK-MVE-NEXT: vstr s8, [r0, #20]202; CHECK-MVE-NEXT: vstr s4, [r0, #16]203; CHECK-MVE-NEXT: vstrw.32 q0, [r0]204; CHECK-MVE-NEXT: vstr s6, [r0, #24]205; CHECK-MVE-NEXT: bx lr206;207; CHECK-MVEFP-LABEL: test_unsigned_v7f32_v7i32:208; CHECK-MVEFP: @ %bb.0:209; CHECK-MVEFP-NEXT: vcvt.u32.f32 q1, q1210; CHECK-MVEFP-NEXT: vcvt.u32.f32 q0, q0211; CHECK-MVEFP-NEXT: vmov.f32 s10, s5212; CHECK-MVEFP-NEXT: vmov r2, s4213; CHECK-MVEFP-NEXT: vmov r3, s6214; CHECK-MVEFP-NEXT: vmov r1, s10215; CHECK-MVEFP-NEXT: strd r2, r1, [r0, #16]216; CHECK-MVEFP-NEXT: str r3, [r0, #24]217; CHECK-MVEFP-NEXT: vstrw.32 q0, [r0]218; CHECK-MVEFP-NEXT: bx lr219 %x = call <7 x i32> @llvm.fptoui.sat.v7f32.v7i32(<7 x float> %f)220 ret <7 x i32> %x221}222 223define arm_aapcs_vfpcc <8 x i32> @test_unsigned_v8f32_v8i32(<8 x float> %f) {224; CHECK-MVE-LABEL: test_unsigned_v8f32_v8i32:225; CHECK-MVE: @ %bb.0:226; CHECK-MVE-NEXT: vcvt.u32.f32 s2, s2227; CHECK-MVE-NEXT: vcvt.u32.f32 s0, s0228; CHECK-MVE-NEXT: vcvt.u32.f32 s8, s3229; CHECK-MVE-NEXT: vcvt.u32.f32 s10, s1230; CHECK-MVE-NEXT: vcvt.u32.f32 s6, s6231; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s4232; CHECK-MVE-NEXT: vcvt.u32.f32 s12, s7233; CHECK-MVE-NEXT: vcvt.u32.f32 s14, s5234; CHECK-MVE-NEXT: vmov r0, s2235; CHECK-MVE-NEXT: vmov r1, s0236; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r0237; CHECK-MVE-NEXT: vmov r0, s8238; CHECK-MVE-NEXT: vmov r1, s10239; CHECK-MVE-NEXT: vmov q0[3], q0[1], r1, r0240; CHECK-MVE-NEXT: vmov r0, s6241; CHECK-MVE-NEXT: vmov r1, s4242; CHECK-MVE-NEXT: vmov q1[2], q1[0], r1, r0243; CHECK-MVE-NEXT: vmov r0, s12244; CHECK-MVE-NEXT: vmov r1, s14245; CHECK-MVE-NEXT: vmov q1[3], q1[1], r1, r0246; CHECK-MVE-NEXT: bx lr247;248; CHECK-MVEFP-LABEL: test_unsigned_v8f32_v8i32:249; CHECK-MVEFP: @ %bb.0:250; CHECK-MVEFP-NEXT: vcvt.u32.f32 q0, q0251; CHECK-MVEFP-NEXT: vcvt.u32.f32 q1, q1252; CHECK-MVEFP-NEXT: bx lr253 %x = call <8 x i32> @llvm.fptoui.sat.v8f32.v8i32(<8 x float> %f)254 ret <8 x i32> %x255}256 257;258; Double to signed 32-bit -- Vector size variation259;260 261declare <1 x i32> @llvm.fptoui.sat.v1f64.v1i32 (<1 x double>)262declare <2 x i32> @llvm.fptoui.sat.v2f64.v2i32 (<2 x double>)263declare <3 x i32> @llvm.fptoui.sat.v3f64.v3i32 (<3 x double>)264declare <4 x i32> @llvm.fptoui.sat.v4f64.v4i32 (<4 x double>)265declare <5 x i32> @llvm.fptoui.sat.v5f64.v5i32 (<5 x double>)266declare <6 x i32> @llvm.fptoui.sat.v6f64.v6i32 (<6 x double>)267 268define arm_aapcs_vfpcc <1 x i32> @test_unsigned_v1f64_v1i32(<1 x double> %f) {269; CHECK-LABEL: test_unsigned_v1f64_v1i32:270; CHECK: @ %bb.0:271; CHECK-NEXT: .save {r4, r5, r6, lr}272; CHECK-NEXT: push {r4, r5, r6, lr}273; CHECK-NEXT: vldr d1, .LCPI8_0274; CHECK-NEXT: vmov r4, r5, d0275; CHECK-NEXT: vmov r2, r3, d1276; CHECK-NEXT: mov r0, r4277; CHECK-NEXT: mov r1, r5278; CHECK-NEXT: bl __aeabi_dcmpge279; CHECK-NEXT: mov r6, r0280; CHECK-NEXT: mov r0, r4281; CHECK-NEXT: mov r1, r5282; CHECK-NEXT: bl __aeabi_d2uiz283; CHECK-NEXT: vldr d0, .LCPI8_1284; CHECK-NEXT: cmp r6, #0285; CHECK-NEXT: csel r6, r0, r6, ne286; CHECK-NEXT: mov r0, r4287; CHECK-NEXT: vmov r2, r3, d0288; CHECK-NEXT: mov r1, r5289; CHECK-NEXT: bl __aeabi_dcmpgt290; CHECK-NEXT: cmp r0, #0291; CHECK-NEXT: it ne292; CHECK-NEXT: movne.w r6, #-1293; CHECK-NEXT: mov r0, r6294; CHECK-NEXT: pop {r4, r5, r6, pc}295; CHECK-NEXT: .p2align 3296; CHECK-NEXT: @ %bb.1:297; CHECK-NEXT: .LCPI8_0:298; CHECK-NEXT: .long 0 @ double 0299; CHECK-NEXT: .long 0300; CHECK-NEXT: .LCPI8_1:301; CHECK-NEXT: .long 4292870144 @ double 4294967295302; CHECK-NEXT: .long 1106247679303 %x = call <1 x i32> @llvm.fptoui.sat.v1f64.v1i32(<1 x double> %f)304 ret <1 x i32> %x305}306 307define arm_aapcs_vfpcc <2 x i32> @test_unsigned_v2f64_v2i32(<2 x double> %f) {308; CHECK-LABEL: test_unsigned_v2f64_v2i32:309; CHECK: @ %bb.0:310; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}311; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}312; CHECK-NEXT: .pad #4313; CHECK-NEXT: sub sp, #4314; CHECK-NEXT: .vsave {d8, d9}315; CHECK-NEXT: vpush {d8, d9}316; CHECK-NEXT: .pad #8317; CHECK-NEXT: sub sp, #8318; CHECK-NEXT: vmov q4, q0319; CHECK-NEXT: vldr d0, .LCPI9_0320; CHECK-NEXT: vmov r6, r7, d9321; CHECK-NEXT: vmov r11, r3, d0322; CHECK-NEXT: str r3, [sp, #4] @ 4-byte Spill323; CHECK-NEXT: mov r0, r6324; CHECK-NEXT: mov r1, r7325; CHECK-NEXT: mov r2, r11326; CHECK-NEXT: bl __aeabi_dcmpge327; CHECK-NEXT: mov r8, r0328; CHECK-NEXT: mov r0, r6329; CHECK-NEXT: mov r1, r7330; CHECK-NEXT: bl __aeabi_d2ulz331; CHECK-NEXT: vldr d0, .LCPI9_1332; CHECK-NEXT: cmp.w r8, #0333; CHECK-NEXT: csel r9, r0, r8, ne334; CHECK-NEXT: csel r8, r1, r8, ne335; CHECK-NEXT: vmov r10, r3, d0336; CHECK-NEXT: mov r0, r6337; CHECK-NEXT: mov r1, r7338; CHECK-NEXT: vmov r5, r4, d8339; CHECK-NEXT: str r3, [sp] @ 4-byte Spill340; CHECK-NEXT: mov r2, r10341; CHECK-NEXT: bl __aeabi_dcmpgt342; CHECK-NEXT: cmp r0, #0343; CHECK-NEXT: itt ne344; CHECK-NEXT: movne.w r8, #0345; CHECK-NEXT: movne.w r9, #-1346; CHECK-NEXT: ldr r3, [sp, #4] @ 4-byte Reload347; CHECK-NEXT: mov r0, r5348; CHECK-NEXT: mov r1, r4349; CHECK-NEXT: mov r2, r11350; CHECK-NEXT: bl __aeabi_dcmpge351; CHECK-NEXT: mov r6, r0352; CHECK-NEXT: mov r0, r5353; CHECK-NEXT: mov r1, r4354; CHECK-NEXT: bl __aeabi_d2ulz355; CHECK-NEXT: ldr r3, [sp] @ 4-byte Reload356; CHECK-NEXT: cmp r6, #0357; CHECK-NEXT: csel r7, r1, r6, ne358; CHECK-NEXT: csel r6, r0, r6, ne359; CHECK-NEXT: mov r0, r5360; CHECK-NEXT: mov r1, r4361; CHECK-NEXT: mov r2, r10362; CHECK-NEXT: bl __aeabi_dcmpgt363; CHECK-NEXT: cmp r0, #0364; CHECK-NEXT: itt ne365; CHECK-NEXT: movne.w r6, #-1366; CHECK-NEXT: movne r7, #0367; CHECK-NEXT: vmov q0[2], q0[0], r6, r9368; CHECK-NEXT: vmov q0[3], q0[1], r7, r8369; CHECK-NEXT: add sp, #8370; CHECK-NEXT: vpop {d8, d9}371; CHECK-NEXT: add sp, #4372; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}373; CHECK-NEXT: .p2align 3374; CHECK-NEXT: @ %bb.1:375; CHECK-NEXT: .LCPI9_0:376; CHECK-NEXT: .long 0 @ double 0377; CHECK-NEXT: .long 0378; CHECK-NEXT: .LCPI9_1:379; CHECK-NEXT: .long 4292870144 @ double 4294967295380; CHECK-NEXT: .long 1106247679381 %x = call <2 x i32> @llvm.fptoui.sat.v2f64.v2i32(<2 x double> %f)382 ret <2 x i32> %x383}384 385define arm_aapcs_vfpcc <3 x i32> @test_unsigned_v3f64_v3i32(<3 x double> %f) {386; CHECK-LABEL: test_unsigned_v3f64_v3i32:387; CHECK: @ %bb.0:388; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}389; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}390; CHECK-NEXT: .pad #4391; CHECK-NEXT: sub sp, #4392; CHECK-NEXT: .vsave {d8, d9}393; CHECK-NEXT: vpush {d8, d9}394; CHECK-NEXT: .pad #16395; CHECK-NEXT: sub sp, #16396; CHECK-NEXT: vmov.f32 s18, s0397; CHECK-NEXT: vmov.f32 s19, s1398; CHECK-NEXT: vldr d0, .LCPI10_0399; CHECK-NEXT: vmov r8, r9, d1400; CHECK-NEXT: vmov r5, r4, d0401; CHECK-NEXT: vmov.f32 s16, s4402; CHECK-NEXT: vmov.f32 s17, s5403; CHECK-NEXT: str r5, [sp, #4] @ 4-byte Spill404; CHECK-NEXT: mov r0, r8405; CHECK-NEXT: mov r1, r9406; CHECK-NEXT: mov r2, r5407; CHECK-NEXT: mov r3, r4408; CHECK-NEXT: str r4, [sp, #8] @ 4-byte Spill409; CHECK-NEXT: bl __aeabi_dcmpge410; CHECK-NEXT: mov r10, r0411; CHECK-NEXT: mov r0, r8412; CHECK-NEXT: mov r1, r9413; CHECK-NEXT: bl __aeabi_d2ulz414; CHECK-NEXT: vldr d0, .LCPI10_1415; CHECK-NEXT: vmov r11, r1, d9416; CHECK-NEXT: cmp.w r10, #0417; CHECK-NEXT: vmov r7, r6, d8418; CHECK-NEXT: vmov r2, r3, d0419; CHECK-NEXT: csel r10, r0, r10, ne420; CHECK-NEXT: mov r0, r8421; CHECK-NEXT: str r1, [sp, #12] @ 4-byte Spill422; CHECK-NEXT: mov r1, r9423; CHECK-NEXT: mov r9, r2424; CHECK-NEXT: mov r8, r3425; CHECK-NEXT: bl __aeabi_dcmpgt426; CHECK-NEXT: cmp r0, #0427; CHECK-NEXT: mov r0, r7428; CHECK-NEXT: mov r1, r6429; CHECK-NEXT: mov r2, r5430; CHECK-NEXT: mov r3, r4431; CHECK-NEXT: it ne432; CHECK-NEXT: movne.w r10, #-1433; CHECK-NEXT: bl __aeabi_dcmpge434; CHECK-NEXT: mov r4, r0435; CHECK-NEXT: mov r0, r7436; CHECK-NEXT: mov r1, r6437; CHECK-NEXT: bl __aeabi_d2ulz438; CHECK-NEXT: cmp r4, #0439; CHECK-NEXT: mov r1, r6440; CHECK-NEXT: csel r5, r0, r4, ne441; CHECK-NEXT: mov r0, r7442; CHECK-NEXT: mov r2, r9443; CHECK-NEXT: mov r3, r8444; CHECK-NEXT: bl __aeabi_dcmpgt445; CHECK-NEXT: cmp r0, #0446; CHECK-NEXT: it ne447; CHECK-NEXT: movne.w r5, #-1448; CHECK-NEXT: ldr r6, [sp, #12] @ 4-byte Reload449; CHECK-NEXT: mov r0, r11450; CHECK-NEXT: ldrd r2, r3, [sp, #4] @ 8-byte Folded Reload451; CHECK-NEXT: mov r1, r6452; CHECK-NEXT: bl __aeabi_dcmpge453; CHECK-NEXT: mov r4, r0454; CHECK-NEXT: mov r0, r11455; CHECK-NEXT: mov r1, r6456; CHECK-NEXT: bl __aeabi_d2ulz457; CHECK-NEXT: cmp r4, #0458; CHECK-NEXT: mov r1, r6459; CHECK-NEXT: csel r4, r0, r4, ne460; CHECK-NEXT: mov r0, r11461; CHECK-NEXT: mov r2, r9462; CHECK-NEXT: mov r3, r8463; CHECK-NEXT: bl __aeabi_dcmpgt464; CHECK-NEXT: vmov.32 q0[1], r10465; CHECK-NEXT: cmp r0, #0466; CHECK-NEXT: it ne467; CHECK-NEXT: movne.w r4, #-1468; CHECK-NEXT: vmov q0[2], q0[0], r4, r5469; CHECK-NEXT: add sp, #16470; CHECK-NEXT: vpop {d8, d9}471; CHECK-NEXT: add sp, #4472; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}473; CHECK-NEXT: .p2align 3474; CHECK-NEXT: @ %bb.1:475; CHECK-NEXT: .LCPI10_0:476; CHECK-NEXT: .long 0 @ double 0477; CHECK-NEXT: .long 0478; CHECK-NEXT: .LCPI10_1:479; CHECK-NEXT: .long 4292870144 @ double 4294967295480; CHECK-NEXT: .long 1106247679481 %x = call <3 x i32> @llvm.fptoui.sat.v3f64.v3i32(<3 x double> %f)482 ret <3 x i32> %x483}484 485define arm_aapcs_vfpcc <4 x i32> @test_unsigned_v4f64_v4i32(<4 x double> %f) {486; CHECK-LABEL: test_unsigned_v4f64_v4i32:487; CHECK: @ %bb.0:488; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}489; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}490; CHECK-NEXT: .pad #4491; CHECK-NEXT: sub sp, #4492; CHECK-NEXT: .vsave {d8, d9, d10, d11}493; CHECK-NEXT: vpush {d8, d9, d10, d11}494; CHECK-NEXT: .pad #24495; CHECK-NEXT: sub sp, #24496; CHECK-NEXT: vmov q4, q0497; CHECK-NEXT: vldr d0, .LCPI11_0498; CHECK-NEXT: vmov q5, q1499; CHECK-NEXT: vmov r8, r9, d10500; CHECK-NEXT: vmov r2, r11, d0501; CHECK-NEXT: str r2, [sp, #20] @ 4-byte Spill502; CHECK-NEXT: mov r0, r8503; CHECK-NEXT: mov r1, r9504; CHECK-NEXT: mov r3, r11505; CHECK-NEXT: bl __aeabi_dcmpge506; CHECK-NEXT: mov r10, r0507; CHECK-NEXT: mov r0, r8508; CHECK-NEXT: mov r1, r9509; CHECK-NEXT: bl __aeabi_d2ulz510; CHECK-NEXT: vldr d0, .LCPI11_1511; CHECK-NEXT: vmov r5, r1, d11512; CHECK-NEXT: cmp.w r10, #0513; CHECK-NEXT: vmov r6, r7, d8514; CHECK-NEXT: vmov r2, r3, d0515; CHECK-NEXT: csel r4, r0, r10, ne516; CHECK-NEXT: mov r0, r8517; CHECK-NEXT: strd r5, r1, [sp, #4] @ 8-byte Folded Spill518; CHECK-NEXT: mov r1, r9519; CHECK-NEXT: str r2, [sp] @ 4-byte Spill520; CHECK-NEXT: mov r8, r2521; CHECK-NEXT: mov r9, r3522; CHECK-NEXT: bl __aeabi_dcmpgt523; CHECK-NEXT: cmp r0, #0524; CHECK-NEXT: it ne525; CHECK-NEXT: movne.w r4, #-1526; CHECK-NEXT: mov r5, r7527; CHECK-NEXT: mov r1, r7528; CHECK-NEXT: ldr r7, [sp, #20] @ 4-byte Reload529; CHECK-NEXT: mov r0, r6530; CHECK-NEXT: mov r3, r11531; CHECK-NEXT: str r4, [sp, #16] @ 4-byte Spill532; CHECK-NEXT: mov r10, r11533; CHECK-NEXT: mov r2, r7534; CHECK-NEXT: bl __aeabi_dcmpge535; CHECK-NEXT: mov r4, r0536; CHECK-NEXT: mov r0, r6537; CHECK-NEXT: mov r1, r5538; CHECK-NEXT: bl __aeabi_d2ulz539; CHECK-NEXT: cmp r4, #0540; CHECK-NEXT: mov r2, r8541; CHECK-NEXT: csel r4, r0, r4, ne542; CHECK-NEXT: mov r0, r6543; CHECK-NEXT: mov r1, r5544; CHECK-NEXT: mov r3, r9545; CHECK-NEXT: mov r8, r9546; CHECK-NEXT: bl __aeabi_dcmpgt547; CHECK-NEXT: cmp r0, #0548; CHECK-NEXT: it ne549; CHECK-NEXT: movne.w r4, #-1550; CHECK-NEXT: ldr.w r11, [sp, #4] @ 4-byte Reload551; CHECK-NEXT: mov r2, r7552; CHECK-NEXT: ldr.w r9, [sp, #8] @ 4-byte Reload553; CHECK-NEXT: mov r3, r10554; CHECK-NEXT: str r4, [sp, #12] @ 4-byte Spill555; CHECK-NEXT: mov r0, r11556; CHECK-NEXT: mov r1, r9557; CHECK-NEXT: bl __aeabi_dcmpge558; CHECK-NEXT: mov r4, r0559; CHECK-NEXT: mov r0, r11560; CHECK-NEXT: mov r1, r9561; CHECK-NEXT: bl __aeabi_d2ulz562; CHECK-NEXT: mov r1, r9563; CHECK-NEXT: ldr.w r9, [sp] @ 4-byte Reload564; CHECK-NEXT: cmp r4, #0565; CHECK-NEXT: mov r3, r8566; CHECK-NEXT: csel r5, r0, r4, ne567; CHECK-NEXT: mov r0, r11568; CHECK-NEXT: mov r2, r9569; CHECK-NEXT: vmov r7, r6, d9570; CHECK-NEXT: bl __aeabi_dcmpgt571; CHECK-NEXT: cmp r0, #0572; CHECK-NEXT: it ne573; CHECK-NEXT: movne.w r5, #-1574; CHECK-NEXT: ldr r2, [sp, #20] @ 4-byte Reload575; CHECK-NEXT: mov r0, r7576; CHECK-NEXT: mov r1, r6577; CHECK-NEXT: mov r3, r10578; CHECK-NEXT: bl __aeabi_dcmpge579; CHECK-NEXT: mov r4, r0580; CHECK-NEXT: mov r0, r7581; CHECK-NEXT: mov r1, r6582; CHECK-NEXT: bl __aeabi_d2ulz583; CHECK-NEXT: cmp r4, #0584; CHECK-NEXT: mov r1, r6585; CHECK-NEXT: csel r4, r0, r4, ne586; CHECK-NEXT: mov r0, r7587; CHECK-NEXT: mov r2, r9588; CHECK-NEXT: mov r3, r8589; CHECK-NEXT: bl __aeabi_dcmpgt590; CHECK-NEXT: cmp r0, #0591; CHECK-NEXT: it ne592; CHECK-NEXT: movne.w r4, #-1593; CHECK-NEXT: ldrd r1, r0, [sp, #12] @ 8-byte Folded Reload594; CHECK-NEXT: vmov q0[2], q0[0], r1, r0595; CHECK-NEXT: vmov q0[3], q0[1], r4, r5596; CHECK-NEXT: add sp, #24597; CHECK-NEXT: vpop {d8, d9, d10, d11}598; CHECK-NEXT: add sp, #4599; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}600; CHECK-NEXT: .p2align 3601; CHECK-NEXT: @ %bb.1:602; CHECK-NEXT: .LCPI11_0:603; CHECK-NEXT: .long 0 @ double 0604; CHECK-NEXT: .long 0605; CHECK-NEXT: .LCPI11_1:606; CHECK-NEXT: .long 4292870144 @ double 4294967295607; CHECK-NEXT: .long 1106247679608 %x = call <4 x i32> @llvm.fptoui.sat.v4f64.v4i32(<4 x double> %f)609 ret <4 x i32> %x610}611 612define arm_aapcs_vfpcc <5 x i32> @test_unsigned_v5f64_v5i32(<5 x double> %f) {613; CHECK-LABEL: test_unsigned_v5f64_v5i32:614; CHECK: @ %bb.0:615; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}616; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}617; CHECK-NEXT: .pad #4618; CHECK-NEXT: sub sp, #4619; CHECK-NEXT: .vsave {d8, d9, d10, d11}620; CHECK-NEXT: vpush {d8, d9, d10, d11}621; CHECK-NEXT: .pad #32622; CHECK-NEXT: sub sp, #32623; CHECK-NEXT: vmov.f32 s16, s0624; CHECK-NEXT: mov r7, r0625; CHECK-NEXT: vmov.f32 s17, s1626; CHECK-NEXT: vldr d0, .LCPI12_0627; CHECK-NEXT: vmov r6, r11, d4628; CHECK-NEXT: str r0, [sp, #24] @ 4-byte Spill629; CHECK-NEXT: vmov r2, r3, d0630; CHECK-NEXT: vmov.f32 s18, s6631; CHECK-NEXT: vmov.f32 s20, s4632; CHECK-NEXT: vmov.f32 s22, s2633; CHECK-NEXT: vmov.f32 s19, s7634; CHECK-NEXT: vmov.f32 s21, s5635; CHECK-NEXT: vmov.f32 s23, s3636; CHECK-NEXT: str r2, [sp, #28] @ 4-byte Spill637; CHECK-NEXT: mov r0, r6638; CHECK-NEXT: mov r1, r11639; CHECK-NEXT: str r3, [sp, #4] @ 4-byte Spill640; CHECK-NEXT: bl __aeabi_dcmpge641; CHECK-NEXT: mov r4, r0642; CHECK-NEXT: mov r0, r6643; CHECK-NEXT: mov r1, r11644; CHECK-NEXT: bl __aeabi_d2ulz645; CHECK-NEXT: vmov r8, r1, d11646; CHECK-NEXT: vldr d0, .LCPI12_1647; CHECK-NEXT: cmp r4, #0648; CHECK-NEXT: vmov r10, r9, d9649; CHECK-NEXT: vmov r2, r3, d0650; CHECK-NEXT: csel r4, r0, r4, ne651; CHECK-NEXT: mov r0, r6652; CHECK-NEXT: str r1, [sp, #8] @ 4-byte Spill653; CHECK-NEXT: vmov r5, r1, d10654; CHECK-NEXT: strd r5, r1, [sp, #12] @ 8-byte Folded Spill655; CHECK-NEXT: mov r1, r11656; CHECK-NEXT: mov r11, r2657; CHECK-NEXT: mov r5, r3658; CHECK-NEXT: bl __aeabi_dcmpgt659; CHECK-NEXT: cmp r0, #0660; CHECK-NEXT: it ne661; CHECK-NEXT: movne.w r4, #-1662; CHECK-NEXT: str r4, [r7, #16]663; CHECK-NEXT: mov r0, r10664; CHECK-NEXT: ldr r7, [sp, #28] @ 4-byte Reload665; CHECK-NEXT: mov r1, r9666; CHECK-NEXT: ldr r6, [sp, #4] @ 4-byte Reload667; CHECK-NEXT: mov r2, r7668; CHECK-NEXT: mov r3, r6669; CHECK-NEXT: bl __aeabi_dcmpge670; CHECK-NEXT: mov r4, r0671; CHECK-NEXT: mov r0, r10672; CHECK-NEXT: mov r1, r9673; CHECK-NEXT: bl __aeabi_d2ulz674; CHECK-NEXT: cmp r4, #0675; CHECK-NEXT: mov r1, r9676; CHECK-NEXT: csel r4, r0, r4, ne677; CHECK-NEXT: mov r0, r10678; CHECK-NEXT: mov r2, r11679; CHECK-NEXT: mov r3, r5680; CHECK-NEXT: mov r10, r11681; CHECK-NEXT: mov r11, r5682; CHECK-NEXT: bl __aeabi_dcmpgt683; CHECK-NEXT: cmp r0, #0684; CHECK-NEXT: it ne685; CHECK-NEXT: movne.w r4, #-1686; CHECK-NEXT: ldr r5, [sp, #8] @ 4-byte Reload687; CHECK-NEXT: mov r0, r8688; CHECK-NEXT: mov r2, r7689; CHECK-NEXT: mov r3, r6690; CHECK-NEXT: str r4, [sp, #20] @ 4-byte Spill691; CHECK-NEXT: mov r1, r5692; CHECK-NEXT: bl __aeabi_dcmpge693; CHECK-NEXT: mov r4, r0694; CHECK-NEXT: mov r0, r8695; CHECK-NEXT: mov r1, r5696; CHECK-NEXT: bl __aeabi_d2ulz697; CHECK-NEXT: cmp r4, #0698; CHECK-NEXT: mov r1, r5699; CHECK-NEXT: csel r9, r0, r4, ne700; CHECK-NEXT: mov r0, r8701; CHECK-NEXT: mov r2, r10702; CHECK-NEXT: mov r3, r11703; CHECK-NEXT: mov r8, r11704; CHECK-NEXT: bl __aeabi_dcmpgt705; CHECK-NEXT: cmp r0, #0706; CHECK-NEXT: it ne707; CHECK-NEXT: movne.w r9, #-1708; CHECK-NEXT: ldr.w r11, [sp, #12] @ 4-byte Reload709; CHECK-NEXT: mov r2, r7710; CHECK-NEXT: ldr r5, [sp, #16] @ 4-byte Reload711; CHECK-NEXT: mov r3, r6712; CHECK-NEXT: mov r0, r11713; CHECK-NEXT: mov r1, r5714; CHECK-NEXT: bl __aeabi_dcmpge715; CHECK-NEXT: mov r4, r0716; CHECK-NEXT: mov r0, r11717; CHECK-NEXT: mov r1, r5718; CHECK-NEXT: bl __aeabi_d2ulz719; CHECK-NEXT: cmp r4, #0720; CHECK-NEXT: mov r1, r5721; CHECK-NEXT: csel r7, r0, r4, ne722; CHECK-NEXT: mov r0, r11723; CHECK-NEXT: mov r2, r10724; CHECK-NEXT: mov r3, r8725; CHECK-NEXT: bl __aeabi_dcmpgt726; CHECK-NEXT: vmov r4, r5, d8727; CHECK-NEXT: cmp r0, #0728; CHECK-NEXT: it ne729; CHECK-NEXT: movne.w r7, #-1730; CHECK-NEXT: ldr r2, [sp, #28] @ 4-byte Reload731; CHECK-NEXT: mov r3, r6732; CHECK-NEXT: mov r0, r4733; CHECK-NEXT: mov r1, r5734; CHECK-NEXT: bl __aeabi_dcmpge735; CHECK-NEXT: mov r6, r0736; CHECK-NEXT: mov r0, r4737; CHECK-NEXT: mov r1, r5738; CHECK-NEXT: bl __aeabi_d2ulz739; CHECK-NEXT: cmp r6, #0740; CHECK-NEXT: mov r1, r5741; CHECK-NEXT: csel r6, r0, r6, ne742; CHECK-NEXT: mov r0, r4743; CHECK-NEXT: mov r2, r10744; CHECK-NEXT: mov r3, r8745; CHECK-NEXT: bl __aeabi_dcmpgt746; CHECK-NEXT: cmp r0, #0747; CHECK-NEXT: it ne748; CHECK-NEXT: movne.w r6, #-1749; CHECK-NEXT: ldr r0, [sp, #20] @ 4-byte Reload750; CHECK-NEXT: vmov q0[2], q0[0], r6, r7751; CHECK-NEXT: vmov q0[3], q0[1], r9, r0752; CHECK-NEXT: ldr r0, [sp, #24] @ 4-byte Reload753; CHECK-NEXT: vstrw.32 q0, [r0]754; CHECK-NEXT: add sp, #32755; CHECK-NEXT: vpop {d8, d9, d10, d11}756; CHECK-NEXT: add sp, #4757; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}758; CHECK-NEXT: .p2align 3759; CHECK-NEXT: @ %bb.1:760; CHECK-NEXT: .LCPI12_0:761; CHECK-NEXT: .long 0 @ double 0762; CHECK-NEXT: .long 0763; CHECK-NEXT: .LCPI12_1:764; CHECK-NEXT: .long 4292870144 @ double 4294967295765; CHECK-NEXT: .long 1106247679766 %x = call <5 x i32> @llvm.fptoui.sat.v5f64.v5i32(<5 x double> %f)767 ret <5 x i32> %x768}769 770define arm_aapcs_vfpcc <6 x i32> @test_unsigned_v6f64_v6i32(<6 x double> %f) {771; CHECK-LABEL: test_unsigned_v6f64_v6i32:772; CHECK: @ %bb.0:773; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}774; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}775; CHECK-NEXT: .pad #4776; CHECK-NEXT: sub sp, #4777; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12}778; CHECK-NEXT: vpush {d8, d9, d10, d11, d12}779; CHECK-NEXT: .pad #40780; CHECK-NEXT: sub sp, #40781; CHECK-NEXT: vmov.f32 s16, s0782; CHECK-NEXT: str r0, [sp, #36] @ 4-byte Spill783; CHECK-NEXT: vmov.f32 s17, s1784; CHECK-NEXT: vldr d0, .LCPI13_0785; CHECK-NEXT: vmov r5, r6, d5786; CHECK-NEXT: vmov r10, r3, d0787; CHECK-NEXT: vmov.f32 s20, s8788; CHECK-NEXT: vmov.f32 s22, s6789; CHECK-NEXT: vmov.f32 s18, s4790; CHECK-NEXT: vmov.f32 s24, s2791; CHECK-NEXT: vmov.f32 s21, s9792; CHECK-NEXT: vmov.f32 s23, s7793; CHECK-NEXT: vmov.f32 s19, s5794; CHECK-NEXT: vmov.f32 s25, s3795; CHECK-NEXT: str r3, [sp, #12] @ 4-byte Spill796; CHECK-NEXT: mov r0, r5797; CHECK-NEXT: mov r1, r6798; CHECK-NEXT: mov r2, r10799; CHECK-NEXT: bl __aeabi_dcmpge800; CHECK-NEXT: mov r4, r0801; CHECK-NEXT: mov r0, r5802; CHECK-NEXT: mov r1, r6803; CHECK-NEXT: bl __aeabi_d2ulz804; CHECK-NEXT: vmov r9, r1, d11805; CHECK-NEXT: vldr d0, .LCPI13_1806; CHECK-NEXT: cmp r4, #0807; CHECK-NEXT: vmov r8, r11, d10808; CHECK-NEXT: vmov r2, r3, d0809; CHECK-NEXT: csel r4, r0, r4, ne810; CHECK-NEXT: mov r0, r5811; CHECK-NEXT: str r1, [sp, #32] @ 4-byte Spill812; CHECK-NEXT: vmov r7, r1, d12813; CHECK-NEXT: str r3, [sp, #8] @ 4-byte Spill814; CHECK-NEXT: mov r5, r2815; CHECK-NEXT: strd r7, r1, [sp, #24] @ 8-byte Folded Spill816; CHECK-NEXT: mov r1, r6817; CHECK-NEXT: bl __aeabi_dcmpgt818; CHECK-NEXT: cmp r0, #0819; CHECK-NEXT: it ne820; CHECK-NEXT: movne.w r4, #-1821; CHECK-NEXT: ldr r7, [sp, #36] @ 4-byte Reload822; CHECK-NEXT: mov r0, r8823; CHECK-NEXT: mov r1, r11824; CHECK-NEXT: mov r2, r10825; CHECK-NEXT: str r4, [r7, #20]826; CHECK-NEXT: ldr r6, [sp, #12] @ 4-byte Reload827; CHECK-NEXT: mov r3, r6828; CHECK-NEXT: bl __aeabi_dcmpge829; CHECK-NEXT: mov r4, r0830; CHECK-NEXT: mov r0, r8831; CHECK-NEXT: mov r1, r11832; CHECK-NEXT: bl __aeabi_d2ulz833; CHECK-NEXT: vmov r2, r1, d9834; CHECK-NEXT: cmp r4, #0835; CHECK-NEXT: csel r4, r0, r4, ne836; CHECK-NEXT: mov r0, r8837; CHECK-NEXT: mov r8, r5838; CHECK-NEXT: strd r2, r1, [sp, #16] @ 8-byte Folded Spill839; CHECK-NEXT: mov r1, r11840; CHECK-NEXT: ldr.w r11, [sp, #8] @ 4-byte Reload841; CHECK-NEXT: mov r2, r5842; CHECK-NEXT: mov r3, r11843; CHECK-NEXT: bl __aeabi_dcmpgt844; CHECK-NEXT: cmp r0, #0845; CHECK-NEXT: it ne846; CHECK-NEXT: movne.w r4, #-1847; CHECK-NEXT: str r4, [r7, #16]848; CHECK-NEXT: mov r0, r9849; CHECK-NEXT: ldr r5, [sp, #32] @ 4-byte Reload850; CHECK-NEXT: mov r2, r10851; CHECK-NEXT: mov r3, r6852; CHECK-NEXT: mov r1, r5853; CHECK-NEXT: bl __aeabi_dcmpge854; CHECK-NEXT: mov r4, r0855; CHECK-NEXT: mov r0, r9856; CHECK-NEXT: mov r1, r5857; CHECK-NEXT: bl __aeabi_d2ulz858; CHECK-NEXT: cmp r4, #0859; CHECK-NEXT: mov r1, r5860; CHECK-NEXT: csel r4, r0, r4, ne861; CHECK-NEXT: mov r0, r9862; CHECK-NEXT: mov r2, r8863; CHECK-NEXT: mov r3, r11864; CHECK-NEXT: str.w r8, [sp, #4] @ 4-byte Spill865; CHECK-NEXT: bl __aeabi_dcmpgt866; CHECK-NEXT: cmp r0, #0867; CHECK-NEXT: it ne868; CHECK-NEXT: movne.w r4, #-1869; CHECK-NEXT: ldr r5, [sp, #24] @ 4-byte Reload870; CHECK-NEXT: mov r2, r10871; CHECK-NEXT: ldr r7, [sp, #28] @ 4-byte Reload872; CHECK-NEXT: mov r3, r6873; CHECK-NEXT: str r4, [sp, #32] @ 4-byte Spill874; CHECK-NEXT: mov r0, r5875; CHECK-NEXT: mov r1, r7876; CHECK-NEXT: bl __aeabi_dcmpge877; CHECK-NEXT: mov r4, r0878; CHECK-NEXT: mov r0, r5879; CHECK-NEXT: mov r1, r7880; CHECK-NEXT: bl __aeabi_d2ulz881; CHECK-NEXT: cmp r4, #0882; CHECK-NEXT: mov r1, r7883; CHECK-NEXT: csel r9, r0, r4, ne884; CHECK-NEXT: mov r0, r5885; CHECK-NEXT: mov r2, r8886; CHECK-NEXT: mov r3, r11887; CHECK-NEXT: bl __aeabi_dcmpgt888; CHECK-NEXT: cmp r0, #0889; CHECK-NEXT: it ne890; CHECK-NEXT: movne.w r9, #-1891; CHECK-NEXT: ldr r7, [sp, #16] @ 4-byte Reload892; CHECK-NEXT: mov r2, r10893; CHECK-NEXT: ldr r5, [sp, #20] @ 4-byte Reload894; CHECK-NEXT: mov r3, r6895; CHECK-NEXT: mov r0, r7896; CHECK-NEXT: mov r1, r5897; CHECK-NEXT: bl __aeabi_dcmpge898; CHECK-NEXT: mov r4, r0899; CHECK-NEXT: mov r0, r7900; CHECK-NEXT: mov r1, r5901; CHECK-NEXT: bl __aeabi_d2ulz902; CHECK-NEXT: cmp r4, #0903; CHECK-NEXT: mov r1, r5904; CHECK-NEXT: csel r8, r0, r4, ne905; CHECK-NEXT: mov r0, r7906; CHECK-NEXT: ldr r7, [sp, #4] @ 4-byte Reload907; CHECK-NEXT: mov r3, r11908; CHECK-NEXT: mov r2, r7909; CHECK-NEXT: bl __aeabi_dcmpgt910; CHECK-NEXT: vmov r4, r5, d8911; CHECK-NEXT: cmp r0, #0912; CHECK-NEXT: mov r2, r10913; CHECK-NEXT: mov r3, r6914; CHECK-NEXT: it ne915; CHECK-NEXT: movne.w r8, #-1916; CHECK-NEXT: mov r0, r4917; CHECK-NEXT: mov r1, r5918; CHECK-NEXT: bl __aeabi_dcmpge919; CHECK-NEXT: mov r6, r0920; CHECK-NEXT: mov r0, r4921; CHECK-NEXT: mov r1, r5922; CHECK-NEXT: bl __aeabi_d2ulz923; CHECK-NEXT: cmp r6, #0924; CHECK-NEXT: mov r1, r5925; CHECK-NEXT: csel r6, r0, r6, ne926; CHECK-NEXT: mov r0, r4927; CHECK-NEXT: mov r2, r7928; CHECK-NEXT: mov r3, r11929; CHECK-NEXT: bl __aeabi_dcmpgt930; CHECK-NEXT: cmp r0, #0931; CHECK-NEXT: it ne932; CHECK-NEXT: movne.w r6, #-1933; CHECK-NEXT: ldr r0, [sp, #32] @ 4-byte Reload934; CHECK-NEXT: vmov q0[2], q0[0], r6, r8935; CHECK-NEXT: vmov q0[3], q0[1], r9, r0936; CHECK-NEXT: ldr r0, [sp, #36] @ 4-byte Reload937; CHECK-NEXT: vstrw.32 q0, [r0]938; CHECK-NEXT: add sp, #40939; CHECK-NEXT: vpop {d8, d9, d10, d11, d12}940; CHECK-NEXT: add sp, #4941; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}942; CHECK-NEXT: .p2align 3943; CHECK-NEXT: @ %bb.1:944; CHECK-NEXT: .LCPI13_0:945; CHECK-NEXT: .long 0 @ double 0946; CHECK-NEXT: .long 0947; CHECK-NEXT: .LCPI13_1:948; CHECK-NEXT: .long 4292870144 @ double 4294967295949; CHECK-NEXT: .long 1106247679950 %x = call <6 x i32> @llvm.fptoui.sat.v6f64.v6i32(<6 x double> %f)951 ret <6 x i32> %x952}953 954;955; FP16 to signed 32-bit -- Vector size variation956;957 958declare <1 x i32> @llvm.fptoui.sat.v1f16.v1i32 (<1 x half>)959declare <2 x i32> @llvm.fptoui.sat.v2f16.v2i32 (<2 x half>)960declare <3 x i32> @llvm.fptoui.sat.v3f16.v3i32 (<3 x half>)961declare <4 x i32> @llvm.fptoui.sat.v4f16.v4i32 (<4 x half>)962declare <5 x i32> @llvm.fptoui.sat.v5f16.v5i32 (<5 x half>)963declare <6 x i32> @llvm.fptoui.sat.v6f16.v6i32 (<6 x half>)964declare <7 x i32> @llvm.fptoui.sat.v7f16.v7i32 (<7 x half>)965declare <8 x i32> @llvm.fptoui.sat.v8f16.v8i32 (<8 x half>)966 967define arm_aapcs_vfpcc <1 x i32> @test_unsigned_v1f16_v1i32(<1 x half> %f) {968; CHECK-LABEL: test_unsigned_v1f16_v1i32:969; CHECK: @ %bb.0:970; CHECK-NEXT: vcvt.u32.f16 s0, s0971; CHECK-NEXT: vmov r0, s0972; CHECK-NEXT: bx lr973 %x = call <1 x i32> @llvm.fptoui.sat.v1f16.v1i32(<1 x half> %f)974 ret <1 x i32> %x975}976 977define arm_aapcs_vfpcc <2 x i32> @test_unsigned_v2f16_v2i32(<2 x half> %f) {978; CHECK-LABEL: test_unsigned_v2f16_v2i32:979; CHECK: @ %bb.0:980; CHECK-NEXT: .save {r4, r5, r7, lr}981; CHECK-NEXT: push {r4, r5, r7, lr}982; CHECK-NEXT: .vsave {d8, d9, d10}983; CHECK-NEXT: vpush {d8, d9, d10}984; CHECK-NEXT: vmov q4, q0985; CHECK-NEXT: vcvtt.f32.f16 s18, s16986; CHECK-NEXT: vmov r0, s18987; CHECK-NEXT: bl __aeabi_f2ulz988; CHECK-NEXT: vcvtb.f32.f16 s16, s16989; CHECK-NEXT: mov r5, r0990; CHECK-NEXT: vmov r0, s16991; CHECK-NEXT: vldr s20, .LCPI15_0992; CHECK-NEXT: vcmp.f32 s18, #0993; CHECK-NEXT: mov r4, r1994; CHECK-NEXT: vmrs APSR_nzcv, fpscr995; CHECK-NEXT: itt lt996; CHECK-NEXT: movlt r5, #0997; CHECK-NEXT: movlt r4, #0998; CHECK-NEXT: vcmp.f32 s18, s20999; CHECK-NEXT: vmrs APSR_nzcv, fpscr1000; CHECK-NEXT: itt gt1001; CHECK-NEXT: movgt r4, #01002; CHECK-NEXT: movgt.w r5, #-11003; CHECK-NEXT: bl __aeabi_f2ulz1004; CHECK-NEXT: vcmp.f32 s16, #01005; CHECK-NEXT: vmrs APSR_nzcv, fpscr1006; CHECK-NEXT: itt lt1007; CHECK-NEXT: movlt r1, #01008; CHECK-NEXT: movlt r0, #01009; CHECK-NEXT: vcmp.f32 s16, s201010; CHECK-NEXT: vmrs APSR_nzcv, fpscr1011; CHECK-NEXT: itt gt1012; CHECK-NEXT: movgt.w r0, #-11013; CHECK-NEXT: movgt r1, #01014; CHECK-NEXT: vmov q0[2], q0[0], r0, r51015; CHECK-NEXT: vmov q0[3], q0[1], r1, r41016; CHECK-NEXT: vpop {d8, d9, d10}1017; CHECK-NEXT: pop {r4, r5, r7, pc}1018; CHECK-NEXT: .p2align 21019; CHECK-NEXT: @ %bb.1:1020; CHECK-NEXT: .LCPI15_0:1021; CHECK-NEXT: .long 0x4f7fffff @ float 4.29496704E+91022 %x = call <2 x i32> @llvm.fptoui.sat.v2f16.v2i32(<2 x half> %f)1023 ret <2 x i32> %x1024}1025 1026define arm_aapcs_vfpcc <3 x i32> @test_unsigned_v3f16_v3i32(<3 x half> %f) {1027; CHECK-LABEL: test_unsigned_v3f16_v3i32:1028; CHECK: @ %bb.0:1029; CHECK-NEXT: vcvt.u32.f16 s6, s01030; CHECK-NEXT: vcvt.u32.f16 s0, s11031; CHECK-NEXT: vcvt.u32.f16 s4, s21032; CHECK-NEXT: vmov r0, s01033; CHECK-NEXT: vmov.32 q0[1], r01034; CHECK-NEXT: vmov r0, s41035; CHECK-NEXT: vmov r1, s61036; CHECK-NEXT: vmov q0[2], q0[0], r1, r01037; CHECK-NEXT: bx lr1038 %x = call <3 x i32> @llvm.fptoui.sat.v3f16.v3i32(<3 x half> %f)1039 ret <3 x i32> %x1040}1041 1042define arm_aapcs_vfpcc <4 x i32> @test_unsigned_v4f16_v4i32(<4 x half> %f) {1043; CHECK-LABEL: test_unsigned_v4f16_v4i32:1044; CHECK: @ %bb.0:1045; CHECK-NEXT: vmovx.f16 s2, s11046; CHECK-NEXT: vcvt.u32.f16 s4, s21047; CHECK-NEXT: vmovx.f16 s2, s01048; CHECK-NEXT: vcvt.u32.f16 s6, s21049; CHECK-NEXT: vcvt.u32.f16 s2, s11050; CHECK-NEXT: vcvt.u32.f16 s0, s01051; CHECK-NEXT: vmov r0, s21052; CHECK-NEXT: vmov r1, s01053; CHECK-NEXT: vmov q0[2], q0[0], r1, r01054; CHECK-NEXT: vmov r0, s41055; CHECK-NEXT: vmov r1, s61056; CHECK-NEXT: vmov q0[3], q0[1], r1, r01057; CHECK-NEXT: bx lr1058 %x = call <4 x i32> @llvm.fptoui.sat.v4f16.v4i32(<4 x half> %f)1059 ret <4 x i32> %x1060}1061 1062define arm_aapcs_vfpcc <5 x i32> @test_unsigned_v5f16_v5i32(<5 x half> %f) {1063; CHECK-LABEL: test_unsigned_v5f16_v5i32:1064; CHECK: @ %bb.0:1065; CHECK-NEXT: vmovx.f16 s6, s01066; CHECK-NEXT: vmovx.f16 s4, s11067; CHECK-NEXT: vcvt.u32.f16 s8, s11068; CHECK-NEXT: vcvt.u32.f16 s0, s01069; CHECK-NEXT: vcvt.u32.f16 s4, s41070; CHECK-NEXT: vcvt.u32.f16 s6, s61071; CHECK-NEXT: vmov r1, s81072; CHECK-NEXT: vcvt.u32.f16 s2, s21073; CHECK-NEXT: vmov r2, s01074; CHECK-NEXT: vmov q2[2], q2[0], r2, r11075; CHECK-NEXT: vmov r1, s41076; CHECK-NEXT: vmov r2, s61077; CHECK-NEXT: vmov q2[3], q2[1], r2, r11078; CHECK-NEXT: vmov r1, s21079; CHECK-NEXT: str r1, [r0, #16]1080; CHECK-NEXT: vstrw.32 q2, [r0]1081; CHECK-NEXT: bx lr1082 %x = call <5 x i32> @llvm.fptoui.sat.v5f16.v5i32(<5 x half> %f)1083 ret <5 x i32> %x1084}1085 1086define arm_aapcs_vfpcc <6 x i32> @test_unsigned_v6f16_v6i32(<6 x half> %f) {1087; CHECK-LABEL: test_unsigned_v6f16_v6i32:1088; CHECK: @ %bb.0:1089; CHECK-NEXT: vmovx.f16 s8, s01090; CHECK-NEXT: vmovx.f16 s6, s11091; CHECK-NEXT: vcvt.u32.f16 s10, s11092; CHECK-NEXT: vcvt.u32.f16 s0, s01093; CHECK-NEXT: vcvt.u32.f16 s4, s21094; CHECK-NEXT: vmovx.f16 s2, s21095; CHECK-NEXT: vcvt.u32.f16 s6, s61096; CHECK-NEXT: vcvt.u32.f16 s8, s81097; CHECK-NEXT: vmov r1, s101098; CHECK-NEXT: vcvt.u32.f16 s2, s21099; CHECK-NEXT: vmov r2, s01100; CHECK-NEXT: vmov q3[2], q3[0], r2, r11101; CHECK-NEXT: vmov r1, s61102; CHECK-NEXT: vmov r2, s81103; CHECK-NEXT: vmov q3[3], q3[1], r2, r11104; CHECK-NEXT: vmov r1, s21105; CHECK-NEXT: vmov r2, s41106; CHECK-NEXT: strd r2, r1, [r0, #16]1107; CHECK-NEXT: vstrw.32 q3, [r0]1108; CHECK-NEXT: bx lr1109 %x = call <6 x i32> @llvm.fptoui.sat.v6f16.v6i32(<6 x half> %f)1110 ret <6 x i32> %x1111}1112 1113define arm_aapcs_vfpcc <7 x i32> @test_unsigned_v7f16_v7i32(<7 x half> %f) {1114; CHECK-LABEL: test_unsigned_v7f16_v7i32:1115; CHECK: @ %bb.0:1116; CHECK-NEXT: vmovx.f16 s10, s01117; CHECK-NEXT: vmovx.f16 s8, s11118; CHECK-NEXT: vcvt.u32.f16 s12, s11119; CHECK-NEXT: vcvt.u32.f16 s0, s01120; CHECK-NEXT: vcvt.u32.f16 s4, s21121; CHECK-NEXT: vmovx.f16 s2, s21122; CHECK-NEXT: vcvt.u32.f16 s8, s81123; CHECK-NEXT: vcvt.u32.f16 s10, s101124; CHECK-NEXT: vmov r1, s121125; CHECK-NEXT: vcvt.u32.f16 s2, s21126; CHECK-NEXT: vmov r2, s01127; CHECK-NEXT: vcvt.u32.f16 s6, s31128; CHECK-NEXT: vmov q3[2], q3[0], r2, r11129; CHECK-NEXT: vmov r1, s81130; CHECK-NEXT: vmov r2, s101131; CHECK-NEXT: vmov q3[3], q3[1], r2, r11132; CHECK-NEXT: vmov r1, s21133; CHECK-NEXT: vmov r2, s41134; CHECK-NEXT: vmov r3, s61135; CHECK-NEXT: strd r2, r1, [r0, #16]1136; CHECK-NEXT: str r3, [r0, #24]1137; CHECK-NEXT: vstrw.32 q3, [r0]1138; CHECK-NEXT: bx lr1139 %x = call <7 x i32> @llvm.fptoui.sat.v7f16.v7i32(<7 x half> %f)1140 ret <7 x i32> %x1141}1142 1143define arm_aapcs_vfpcc <8 x i32> @test_unsigned_v8f16_v8i32(<8 x half> %f) {1144; CHECK-LABEL: test_unsigned_v8f16_v8i32:1145; CHECK: @ %bb.0:1146; CHECK-NEXT: vmovx.f16 s4, s31147; CHECK-NEXT: vmovx.f16 s6, s01148; CHECK-NEXT: vcvt.u32.f16 s8, s41149; CHECK-NEXT: vmovx.f16 s4, s21150; CHECK-NEXT: vcvt.u32.f16 s10, s41151; CHECK-NEXT: vmovx.f16 s4, s11152; CHECK-NEXT: vcvt.u32.f16 s14, s21153; CHECK-NEXT: vcvt.u32.f16 s2, s11154; CHECK-NEXT: vcvt.u32.f16 s0, s01155; CHECK-NEXT: vcvt.u32.f16 s4, s41156; CHECK-NEXT: vcvt.u32.f16 s6, s61157; CHECK-NEXT: vmov r0, s21158; CHECK-NEXT: vmov r1, s01159; CHECK-NEXT: vcvt.u32.f16 s12, s31160; CHECK-NEXT: vmov q0[2], q0[0], r1, r01161; CHECK-NEXT: vmov r0, s41162; CHECK-NEXT: vmov r1, s61163; CHECK-NEXT: vmov q0[3], q0[1], r1, r01164; CHECK-NEXT: vmov r0, s121165; CHECK-NEXT: vmov r1, s141166; CHECK-NEXT: vmov q1[2], q1[0], r1, r01167; CHECK-NEXT: vmov r0, s81168; CHECK-NEXT: vmov r1, s101169; CHECK-NEXT: vmov q1[3], q1[1], r1, r01170; CHECK-NEXT: bx lr1171 %x = call <8 x i32> @llvm.fptoui.sat.v8f16.v8i32(<8 x half> %f)1172 ret <8 x i32> %x1173}1174 1175;1176; 2-Vector float to signed integer -- result size variation1177;1178 1179declare <4 x i1> @llvm.fptoui.sat.v4f32.v4i1 (<4 x float>)1180declare <4 x i8> @llvm.fptoui.sat.v4f32.v4i8 (<4 x float>)1181declare <4 x i13> @llvm.fptoui.sat.v4f32.v4i13 (<4 x float>)1182declare <4 x i16> @llvm.fptoui.sat.v4f32.v4i16 (<4 x float>)1183declare <4 x i19> @llvm.fptoui.sat.v4f32.v4i19 (<4 x float>)1184declare <4 x i50> @llvm.fptoui.sat.v4f32.v4i50 (<4 x float>)1185declare <4 x i64> @llvm.fptoui.sat.v4f32.v4i64 (<4 x float>)1186declare <4 x i100> @llvm.fptoui.sat.v4f32.v4i100(<4 x float>)1187declare <4 x i128> @llvm.fptoui.sat.v4f32.v4i128(<4 x float>)1188 1189define arm_aapcs_vfpcc <4 x i1> @test_unsigned_v4f32_v4i1(<4 x float> %f) {1190; CHECK-LABEL: test_unsigned_v4f32_v4i1:1191; CHECK: @ %bb.0:1192; CHECK-NEXT: vldr s4, .LCPI22_01193; CHECK-NEXT: vmov.f32 s6, #1.000000e+001194; CHECK-NEXT: movs r1, #01195; CHECK-NEXT: vmaxnm.f32 s0, s0, s41196; CHECK-NEXT: vmaxnm.f32 s8, s3, s41197; CHECK-NEXT: vminnm.f32 s0, s0, s61198; CHECK-NEXT: vmaxnm.f32 s2, s2, s41199; CHECK-NEXT: vcvt.u32.f32 s0, s01200; CHECK-NEXT: vmaxnm.f32 s4, s1, s41201; CHECK-NEXT: vminnm.f32 s4, s4, s61202; CHECK-NEXT: vminnm.f32 s2, s2, s61203; CHECK-NEXT: vcvt.u32.f32 s4, s41204; CHECK-NEXT: vminnm.f32 s8, s8, s61205; CHECK-NEXT: vcvt.u32.f32 s2, s21206; CHECK-NEXT: vcvt.u32.f32 s8, s81207; CHECK-NEXT: vmov r2, s01208; CHECK-NEXT: and r2, r2, #11209; CHECK-NEXT: rsbs r2, r2, #01210; CHECK-NEXT: bfi r1, r2, #0, #11211; CHECK-NEXT: vmov r2, s41212; CHECK-NEXT: and r2, r2, #11213; CHECK-NEXT: rsbs r2, r2, #01214; CHECK-NEXT: bfi r1, r2, #1, #11215; CHECK-NEXT: vmov r2, s21216; CHECK-NEXT: and r2, r2, #11217; CHECK-NEXT: rsbs r2, r2, #01218; CHECK-NEXT: bfi r1, r2, #2, #11219; CHECK-NEXT: vmov r2, s81220; CHECK-NEXT: and r2, r2, #11221; CHECK-NEXT: rsbs r2, r2, #01222; CHECK-NEXT: bfi r1, r2, #3, #11223; CHECK-NEXT: strb r1, [r0]1224; CHECK-NEXT: bx lr1225; CHECK-NEXT: .p2align 21226; CHECK-NEXT: @ %bb.1:1227; CHECK-NEXT: .LCPI22_0:1228; CHECK-NEXT: .long 0x00000000 @ float 01229 %x = call <4 x i1> @llvm.fptoui.sat.v4f32.v4i1(<4 x float> %f)1230 ret <4 x i1> %x1231}1232 1233define arm_aapcs_vfpcc <4 x i8> @test_unsigned_v4f32_v4i8(<4 x float> %f) {1234; CHECK-MVE-LABEL: test_unsigned_v4f32_v4i8:1235; CHECK-MVE: @ %bb.0:1236; CHECK-MVE-NEXT: vldr s4, .LCPI23_01237; CHECK-MVE-NEXT: vldr s6, .LCPI23_11238; CHECK-MVE-NEXT: vmaxnm.f32 s2, s2, s41239; CHECK-MVE-NEXT: vmaxnm.f32 s0, s0, s41240; CHECK-MVE-NEXT: vmaxnm.f32 s8, s3, s41241; CHECK-MVE-NEXT: vminnm.f32 s2, s2, s61242; CHECK-MVE-NEXT: vminnm.f32 s0, s0, s61243; CHECK-MVE-NEXT: vmaxnm.f32 s4, s1, s41244; CHECK-MVE-NEXT: vminnm.f32 s8, s8, s61245; CHECK-MVE-NEXT: vminnm.f32 s4, s4, s61246; CHECK-MVE-NEXT: vcvt.u32.f32 s2, s21247; CHECK-MVE-NEXT: vcvt.u32.f32 s0, s01248; CHECK-MVE-NEXT: vcvt.u32.f32 s8, s81249; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s41250; CHECK-MVE-NEXT: vmov r0, s21251; CHECK-MVE-NEXT: vmov r1, s01252; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r01253; CHECK-MVE-NEXT: vmov r0, s81254; CHECK-MVE-NEXT: vmov r1, s41255; CHECK-MVE-NEXT: vmov q0[3], q0[1], r1, r01256; CHECK-MVE-NEXT: bx lr1257; CHECK-MVE-NEXT: .p2align 21258; CHECK-MVE-NEXT: @ %bb.1:1259; CHECK-MVE-NEXT: .LCPI23_0:1260; CHECK-MVE-NEXT: .long 0x00000000 @ float 01261; CHECK-MVE-NEXT: .LCPI23_1:1262; CHECK-MVE-NEXT: .long 0x437f0000 @ float 2551263;1264; CHECK-MVEFP-LABEL: test_unsigned_v4f32_v4i8:1265; CHECK-MVEFP: @ %bb.0:1266; CHECK-MVEFP-NEXT: vmov.i32 q1, #0xff1267; CHECK-MVEFP-NEXT: vcvt.u32.f32 q0, q01268; CHECK-MVEFP-NEXT: vmin.u32 q0, q0, q11269; CHECK-MVEFP-NEXT: bx lr1270 %x = call <4 x i8> @llvm.fptoui.sat.v4f32.v4i8(<4 x float> %f)1271 ret <4 x i8> %x1272}1273 1274define arm_aapcs_vfpcc <4 x i13> @test_unsigned_v4f32_v4i13(<4 x float> %f) {1275; CHECK-MVE-LABEL: test_unsigned_v4f32_v4i13:1276; CHECK-MVE: @ %bb.0:1277; CHECK-MVE-NEXT: vldr s4, .LCPI24_01278; CHECK-MVE-NEXT: vldr s6, .LCPI24_11279; CHECK-MVE-NEXT: vmaxnm.f32 s2, s2, s41280; CHECK-MVE-NEXT: vmaxnm.f32 s0, s0, s41281; CHECK-MVE-NEXT: vmaxnm.f32 s8, s3, s41282; CHECK-MVE-NEXT: vminnm.f32 s2, s2, s61283; CHECK-MVE-NEXT: vminnm.f32 s0, s0, s61284; CHECK-MVE-NEXT: vmaxnm.f32 s4, s1, s41285; CHECK-MVE-NEXT: vminnm.f32 s8, s8, s61286; CHECK-MVE-NEXT: vminnm.f32 s4, s4, s61287; CHECK-MVE-NEXT: vcvt.u32.f32 s2, s21288; CHECK-MVE-NEXT: vcvt.u32.f32 s0, s01289; CHECK-MVE-NEXT: vcvt.u32.f32 s8, s81290; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s41291; CHECK-MVE-NEXT: vmov r0, s21292; CHECK-MVE-NEXT: vmov r1, s01293; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r01294; CHECK-MVE-NEXT: vmov r0, s81295; CHECK-MVE-NEXT: vmov r1, s41296; CHECK-MVE-NEXT: vmov q0[3], q0[1], r1, r01297; CHECK-MVE-NEXT: bx lr1298; CHECK-MVE-NEXT: .p2align 21299; CHECK-MVE-NEXT: @ %bb.1:1300; CHECK-MVE-NEXT: .LCPI24_0:1301; CHECK-MVE-NEXT: .long 0x00000000 @ float 01302; CHECK-MVE-NEXT: .LCPI24_1:1303; CHECK-MVE-NEXT: .long 0x45fff800 @ float 81911304;1305; CHECK-MVEFP-LABEL: test_unsigned_v4f32_v4i13:1306; CHECK-MVEFP: @ %bb.0:1307; CHECK-MVEFP-NEXT: vmov.i32 q1, #0x1fff1308; CHECK-MVEFP-NEXT: vcvt.u32.f32 q0, q01309; CHECK-MVEFP-NEXT: vmin.u32 q0, q0, q11310; CHECK-MVEFP-NEXT: bx lr1311 %x = call <4 x i13> @llvm.fptoui.sat.v4f32.v4i13(<4 x float> %f)1312 ret <4 x i13> %x1313}1314 1315define arm_aapcs_vfpcc <4 x i16> @test_unsigned_v4f32_v4i16(<4 x float> %f) {1316; CHECK-MVE-LABEL: test_unsigned_v4f32_v4i16:1317; CHECK-MVE: @ %bb.0:1318; CHECK-MVE-NEXT: vldr s4, .LCPI25_01319; CHECK-MVE-NEXT: vldr s6, .LCPI25_11320; CHECK-MVE-NEXT: vmaxnm.f32 s2, s2, s41321; CHECK-MVE-NEXT: vmaxnm.f32 s0, s0, s41322; CHECK-MVE-NEXT: vmaxnm.f32 s8, s3, s41323; CHECK-MVE-NEXT: vminnm.f32 s2, s2, s61324; CHECK-MVE-NEXT: vminnm.f32 s0, s0, s61325; CHECK-MVE-NEXT: vmaxnm.f32 s4, s1, s41326; CHECK-MVE-NEXT: vminnm.f32 s8, s8, s61327; CHECK-MVE-NEXT: vminnm.f32 s4, s4, s61328; CHECK-MVE-NEXT: vcvt.u32.f32 s2, s21329; CHECK-MVE-NEXT: vcvt.u32.f32 s0, s01330; CHECK-MVE-NEXT: vcvt.u32.f32 s8, s81331; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s41332; CHECK-MVE-NEXT: vmov r0, s21333; CHECK-MVE-NEXT: vmov r1, s01334; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r01335; CHECK-MVE-NEXT: vmov r0, s81336; CHECK-MVE-NEXT: vmov r1, s41337; CHECK-MVE-NEXT: vmov q0[3], q0[1], r1, r01338; CHECK-MVE-NEXT: bx lr1339; CHECK-MVE-NEXT: .p2align 21340; CHECK-MVE-NEXT: @ %bb.1:1341; CHECK-MVE-NEXT: .LCPI25_0:1342; CHECK-MVE-NEXT: .long 0x00000000 @ float 01343; CHECK-MVE-NEXT: .LCPI25_1:1344; CHECK-MVE-NEXT: .long 0x477fff00 @ float 655351345;1346; CHECK-MVEFP-LABEL: test_unsigned_v4f32_v4i16:1347; CHECK-MVEFP: @ %bb.0:1348; CHECK-MVEFP-NEXT: vcvt.u32.f32 q0, q01349; CHECK-MVEFP-NEXT: vqmovnb.u32 q0, q01350; CHECK-MVEFP-NEXT: vmovlb.u16 q0, q01351; CHECK-MVEFP-NEXT: bx lr1352 %x = call <4 x i16> @llvm.fptoui.sat.v4f32.v4i16(<4 x float> %f)1353 ret <4 x i16> %x1354}1355 1356define arm_aapcs_vfpcc <4 x i19> @test_unsigned_v4f32_v4i19(<4 x float> %f) {1357; CHECK-MVE-LABEL: test_unsigned_v4f32_v4i19:1358; CHECK-MVE: @ %bb.0:1359; CHECK-MVE-NEXT: vldr s4, .LCPI26_01360; CHECK-MVE-NEXT: vldr s6, .LCPI26_11361; CHECK-MVE-NEXT: vmaxnm.f32 s2, s2, s41362; CHECK-MVE-NEXT: vmaxnm.f32 s0, s0, s41363; CHECK-MVE-NEXT: vmaxnm.f32 s8, s3, s41364; CHECK-MVE-NEXT: vminnm.f32 s2, s2, s61365; CHECK-MVE-NEXT: vminnm.f32 s0, s0, s61366; CHECK-MVE-NEXT: vmaxnm.f32 s4, s1, s41367; CHECK-MVE-NEXT: vminnm.f32 s8, s8, s61368; CHECK-MVE-NEXT: vminnm.f32 s4, s4, s61369; CHECK-MVE-NEXT: vcvt.u32.f32 s2, s21370; CHECK-MVE-NEXT: vcvt.u32.f32 s0, s01371; CHECK-MVE-NEXT: vcvt.u32.f32 s8, s81372; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s41373; CHECK-MVE-NEXT: vmov r0, s21374; CHECK-MVE-NEXT: vmov r1, s01375; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r01376; CHECK-MVE-NEXT: vmov r0, s81377; CHECK-MVE-NEXT: vmov r1, s41378; CHECK-MVE-NEXT: vmov q0[3], q0[1], r1, r01379; CHECK-MVE-NEXT: bx lr1380; CHECK-MVE-NEXT: .p2align 21381; CHECK-MVE-NEXT: @ %bb.1:1382; CHECK-MVE-NEXT: .LCPI26_0:1383; CHECK-MVE-NEXT: .long 0x00000000 @ float 01384; CHECK-MVE-NEXT: .LCPI26_1:1385; CHECK-MVE-NEXT: .long 0x48ffffe0 @ float 5242871386;1387; CHECK-MVEFP-LABEL: test_unsigned_v4f32_v4i19:1388; CHECK-MVEFP: @ %bb.0:1389; CHECK-MVEFP-NEXT: vmov.i32 q1, #0x7ffff1390; CHECK-MVEFP-NEXT: vcvt.u32.f32 q0, q01391; CHECK-MVEFP-NEXT: vmin.u32 q0, q0, q11392; CHECK-MVEFP-NEXT: bx lr1393 %x = call <4 x i19> @llvm.fptoui.sat.v4f32.v4i19(<4 x float> %f)1394 ret <4 x i19> %x1395}1396 1397define arm_aapcs_vfpcc <4 x i32> @test_unsigned_v4f32_v4i32_duplicate(<4 x float> %f) {1398; CHECK-MVE-LABEL: test_unsigned_v4f32_v4i32_duplicate:1399; CHECK-MVE: @ %bb.0:1400; CHECK-MVE-NEXT: vcvt.u32.f32 s2, s21401; CHECK-MVE-NEXT: vcvt.u32.f32 s0, s01402; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s31403; CHECK-MVE-NEXT: vcvt.u32.f32 s6, s11404; CHECK-MVE-NEXT: vmov r0, s21405; CHECK-MVE-NEXT: vmov r1, s01406; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r01407; CHECK-MVE-NEXT: vmov r0, s41408; CHECK-MVE-NEXT: vmov r1, s61409; CHECK-MVE-NEXT: vmov q0[3], q0[1], r1, r01410; CHECK-MVE-NEXT: bx lr1411;1412; CHECK-MVEFP-LABEL: test_unsigned_v4f32_v4i32_duplicate:1413; CHECK-MVEFP: @ %bb.0:1414; CHECK-MVEFP-NEXT: vcvt.u32.f32 q0, q01415; CHECK-MVEFP-NEXT: bx lr1416 %x = call <4 x i32> @llvm.fptoui.sat.v4f32.v4i32(<4 x float> %f)1417 ret <4 x i32> %x1418}1419 1420define arm_aapcs_vfpcc <4 x i50> @test_unsigned_v4f32_v4i50(<4 x float> %f) {1421; CHECK-LABEL: test_unsigned_v4f32_v4i50:1422; CHECK: @ %bb.0:1423; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, lr}1424; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, lr}1425; CHECK-NEXT: .vsave {d8, d9, d10}1426; CHECK-NEXT: vpush {d8, d9, d10}1427; CHECK-NEXT: vmov q4, q01428; CHECK-NEXT: mov r8, r01429; CHECK-NEXT: vmov r0, s161430; CHECK-NEXT: bl __aeabi_f2ulz1431; CHECK-NEXT: mov r5, r01432; CHECK-NEXT: vmov r0, s191433; CHECK-NEXT: vcmp.f32 s16, #01434; CHECK-NEXT: mov r9, r11435; CHECK-NEXT: vmrs APSR_nzcv, fpscr1436; CHECK-NEXT: vmov r7, s181437; CHECK-NEXT: vldr s20, .LCPI28_01438; CHECK-NEXT: itt lt1439; CHECK-NEXT: movlt.w r9, #01440; CHECK-NEXT: movlt r5, #01441; CHECK-NEXT: bl __aeabi_f2ulz1442; CHECK-NEXT: mov r4, r01443; CHECK-NEXT: vcmp.f32 s19, #01444; CHECK-NEXT: mov r0, r71445; CHECK-NEXT: mov r10, r11446; CHECK-NEXT: vmrs APSR_nzcv, fpscr1447; CHECK-NEXT: itt lt1448; CHECK-NEXT: movlt.w r10, #01449; CHECK-NEXT: movlt r4, #01450; CHECK-NEXT: bl __aeabi_f2ulz1451; CHECK-NEXT: mov r7, r01452; CHECK-NEXT: vmov r0, s171453; CHECK-NEXT: vcmp.f32 s18, #01454; CHECK-NEXT: vmrs APSR_nzcv, fpscr1455; CHECK-NEXT: vcmp.f32 s18, s201456; CHECK-NEXT: itt lt1457; CHECK-NEXT: movlt r1, #01458; CHECK-NEXT: movlt r7, #01459; CHECK-NEXT: vmrs APSR_nzcv, fpscr1460; CHECK-NEXT: vcmp.f32 s19, s201461; CHECK-NEXT: it gt1462; CHECK-NEXT: movgt.w r7, #-11463; CHECK-NEXT: itt gt1464; CHECK-NEXT: movwgt r1, #655351465; CHECK-NEXT: movtgt r1, #31466; CHECK-NEXT: vmrs APSR_nzcv, fpscr1467; CHECK-NEXT: it gt1468; CHECK-NEXT: movgt.w r4, #-11469; CHECK-NEXT: itt gt1470; CHECK-NEXT: movwgt r10, #655351471; CHECK-NEXT: movtgt r10, #31472; CHECK-NEXT: mov r3, r101473; CHECK-NEXT: bfc r1, #18, #141474; CHECK-NEXT: bfc r3, #18, #141475; CHECK-NEXT: mov r6, r71476; CHECK-NEXT: vcmp.f32 s16, s201477; CHECK-NEXT: lsll r4, r3, #221478; CHECK-NEXT: lsrl r6, r1, #281479; CHECK-NEXT: vmrs APSR_nzcv, fpscr1480; CHECK-NEXT: it gt1481; CHECK-NEXT: movgt.w r5, #-11482; CHECK-NEXT: str.w r5, [r8]1483; CHECK-NEXT: itt gt1484; CHECK-NEXT: movwgt r9, #655351485; CHECK-NEXT: movtgt r9, #31486; CHECK-NEXT: orrs r1, r31487; CHECK-NEXT: str.w r1, [r8, #20]1488; CHECK-NEXT: bl __aeabi_f2ulz1489; CHECK-NEXT: vcmp.f32 s17, #01490; CHECK-NEXT: orr.w r2, r6, r41491; CHECK-NEXT: vmrs APSR_nzcv, fpscr1492; CHECK-NEXT: itt lt1493; CHECK-NEXT: movlt r0, #01494; CHECK-NEXT: movlt r1, #01495; CHECK-NEXT: vcmp.f32 s17, s201496; CHECK-NEXT: bfc r9, #18, #141497; CHECK-NEXT: vmrs APSR_nzcv, fpscr1498; CHECK-NEXT: itt gt1499; CHECK-NEXT: movwgt r1, #655351500; CHECK-NEXT: movtgt r1, #31501; CHECK-NEXT: str.w r2, [r8, #16]1502; CHECK-NEXT: lsr.w r2, r10, #101503; CHECK-NEXT: strb.w r2, [r8, #24]1504; CHECK-NEXT: it gt1505; CHECK-NEXT: movgt.w r0, #-11506; CHECK-NEXT: mov r2, r01507; CHECK-NEXT: bfc r1, #18, #141508; CHECK-NEXT: lsrl r2, r1, #141509; CHECK-NEXT: orr.w r0, r9, r0, lsl #181510; CHECK-NEXT: orr.w r1, r1, r7, lsl #41511; CHECK-NEXT: strd r2, r1, [r8, #8]1512; CHECK-NEXT: str.w r0, [r8, #4]1513; CHECK-NEXT: vpop {d8, d9, d10}1514; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, pc}1515; CHECK-NEXT: .p2align 21516; CHECK-NEXT: @ %bb.1:1517; CHECK-NEXT: .LCPI28_0:1518; CHECK-NEXT: .long 0x587fffff @ float 1.12589984E+151519 %x = call <4 x i50> @llvm.fptoui.sat.v4f32.v4i50(<4 x float> %f)1520 ret <4 x i50> %x1521}1522 1523define arm_aapcs_vfpcc <4 x i64> @test_unsigned_v4f32_v4i64(<4 x float> %f) {1524; CHECK-LABEL: test_unsigned_v4f32_v4i64:1525; CHECK: @ %bb.0:1526; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}1527; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}1528; CHECK-NEXT: .pad #41529; CHECK-NEXT: sub sp, #41530; CHECK-NEXT: .vsave {d8, d9, d10}1531; CHECK-NEXT: vpush {d8, d9, d10}1532; CHECK-NEXT: vmov q4, q01533; CHECK-NEXT: vmov r0, s191534; CHECK-NEXT: bl __aeabi_f2ulz1535; CHECK-NEXT: mov r11, r01536; CHECK-NEXT: vmov r0, s181537; CHECK-NEXT: vldr s20, .LCPI29_01538; CHECK-NEXT: vcmp.f32 s19, #01539; CHECK-NEXT: mov r10, r11540; CHECK-NEXT: vmrs APSR_nzcv, fpscr1541; CHECK-NEXT: itt lt1542; CHECK-NEXT: movlt.w r11, #01543; CHECK-NEXT: movlt.w r10, #01544; CHECK-NEXT: vcmp.f32 s19, s201545; CHECK-NEXT: vmrs APSR_nzcv, fpscr1546; CHECK-NEXT: vmov r9, s171547; CHECK-NEXT: vmov r8, s161548; CHECK-NEXT: itt gt1549; CHECK-NEXT: movgt.w r10, #-11550; CHECK-NEXT: movgt.w r11, #-11551; CHECK-NEXT: bl __aeabi_f2ulz1552; CHECK-NEXT: mov r7, r01553; CHECK-NEXT: vcmp.f32 s18, #01554; CHECK-NEXT: mov r6, r11555; CHECK-NEXT: vmrs APSR_nzcv, fpscr1556; CHECK-NEXT: mov r0, r91557; CHECK-NEXT: itt lt1558; CHECK-NEXT: movlt r6, #01559; CHECK-NEXT: movlt r7, #01560; CHECK-NEXT: vcmp.f32 s18, s201561; CHECK-NEXT: vmrs APSR_nzcv, fpscr1562; CHECK-NEXT: itt gt1563; CHECK-NEXT: movgt.w r7, #-11564; CHECK-NEXT: movgt.w r6, #-11565; CHECK-NEXT: bl __aeabi_f2ulz1566; CHECK-NEXT: mov r5, r01567; CHECK-NEXT: vcmp.f32 s17, #01568; CHECK-NEXT: mov r4, r11569; CHECK-NEXT: vmrs APSR_nzcv, fpscr1570; CHECK-NEXT: mov r0, r81571; CHECK-NEXT: itt lt1572; CHECK-NEXT: movlt r5, #01573; CHECK-NEXT: movlt r4, #01574; CHECK-NEXT: vcmp.f32 s17, s201575; CHECK-NEXT: vmrs APSR_nzcv, fpscr1576; CHECK-NEXT: itt gt1577; CHECK-NEXT: movgt.w r4, #-11578; CHECK-NEXT: movgt.w r5, #-11579; CHECK-NEXT: bl __aeabi_f2ulz1580; CHECK-NEXT: vcmp.f32 s16, #01581; CHECK-NEXT: vmov q1[2], q1[0], r7, r111582; CHECK-NEXT: vmrs APSR_nzcv, fpscr1583; CHECK-NEXT: itt lt1584; CHECK-NEXT: movlt r1, #01585; CHECK-NEXT: movlt r0, #01586; CHECK-NEXT: vcmp.f32 s16, s201587; CHECK-NEXT: vmov q1[3], q1[1], r6, r101588; CHECK-NEXT: vmrs APSR_nzcv, fpscr1589; CHECK-NEXT: itt gt1590; CHECK-NEXT: movgt.w r0, #-11591; CHECK-NEXT: movgt.w r1, #-11592; CHECK-NEXT: vmov q0[2], q0[0], r0, r51593; CHECK-NEXT: vmov q0[3], q0[1], r1, r41594; CHECK-NEXT: vpop {d8, d9, d10}1595; CHECK-NEXT: add sp, #41596; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}1597; CHECK-NEXT: .p2align 21598; CHECK-NEXT: @ %bb.1:1599; CHECK-NEXT: .LCPI29_0:1600; CHECK-NEXT: .long 0x5f7fffff @ float 1.8446743E+191601 %x = call <4 x i64> @llvm.fptoui.sat.v4f32.v4i64(<4 x float> %f)1602 ret <4 x i64> %x1603}1604 1605define arm_aapcs_vfpcc <4 x i100> @test_unsigned_v4f32_v4i100(<4 x float> %f) {1606; CHECK-LABEL: test_unsigned_v4f32_v4i100:1607; CHECK: @ %bb.0:1608; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}1609; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}1610; CHECK-NEXT: .pad #41611; CHECK-NEXT: sub sp, #41612; CHECK-NEXT: .vsave {d8, d9, d10}1613; CHECK-NEXT: vpush {d8, d9, d10}1614; CHECK-NEXT: .pad #81615; CHECK-NEXT: sub sp, #81616; CHECK-NEXT: vmov q4, q01617; CHECK-NEXT: mov r4, r01618; CHECK-NEXT: vmov r0, s181619; CHECK-NEXT: bl __fixunssfti1620; CHECK-NEXT: vmov r6, s171621; CHECK-NEXT: vldr s20, .LCPI30_01622; CHECK-NEXT: vcmp.f32 s18, #01623; CHECK-NEXT: vmrs APSR_nzcv, fpscr1624; CHECK-NEXT: itttt lt1625; CHECK-NEXT: movlt r3, #01626; CHECK-NEXT: movlt r0, #01627; CHECK-NEXT: movlt r1, #01628; CHECK-NEXT: movlt r2, #01629; CHECK-NEXT: vcmp.f32 s18, s201630; CHECK-NEXT: vmrs APSR_nzcv, fpscr1631; CHECK-NEXT: it gt1632; CHECK-NEXT: movgt.w r2, #-11633; CHECK-NEXT: str.w r2, [r4, #33]1634; CHECK-NEXT: it gt1635; CHECK-NEXT: movgt.w r1, #-11636; CHECK-NEXT: str.w r1, [r4, #29]1637; CHECK-NEXT: it gt1638; CHECK-NEXT: movgt.w r0, #-11639; CHECK-NEXT: str.w r0, [r4, #25]1640; CHECK-NEXT: it gt1641; CHECK-NEXT: movgt r3, #151642; CHECK-NEXT: vmov r7, s191643; CHECK-NEXT: str r3, [sp, #4] @ 4-byte Spill1644; CHECK-NEXT: mov r0, r61645; CHECK-NEXT: bl __fixunssfti1646; CHECK-NEXT: mov r10, r01647; CHECK-NEXT: vcmp.f32 s17, #01648; CHECK-NEXT: mov r5, r11649; CHECK-NEXT: mov r6, r21650; CHECK-NEXT: vmrs APSR_nzcv, fpscr1651; CHECK-NEXT: mov r0, r71652; CHECK-NEXT: itttt lt1653; CHECK-NEXT: movlt.w r10, #01654; CHECK-NEXT: movlt r5, #01655; CHECK-NEXT: movlt r6, #01656; CHECK-NEXT: movlt r3, #01657; CHECK-NEXT: vcmp.f32 s17, s201658; CHECK-NEXT: vmrs APSR_nzcv, fpscr1659; CHECK-NEXT: it gt1660; CHECK-NEXT: movgt r3, #151661; CHECK-NEXT: str r3, [sp] @ 4-byte Spill1662; CHECK-NEXT: ittt gt1663; CHECK-NEXT: movgt.w r6, #-11664; CHECK-NEXT: movgt.w r5, #-11665; CHECK-NEXT: movgt.w r10, #-11666; CHECK-NEXT: bl __fixunssfti1667; CHECK-NEXT: mov r7, r01668; CHECK-NEXT: vmov r0, s161669; CHECK-NEXT: vcmp.f32 s19, #01670; CHECK-NEXT: mov r9, r11671; CHECK-NEXT: mov r8, r21672; CHECK-NEXT: mov r11, r31673; CHECK-NEXT: vmrs APSR_nzcv, fpscr1674; CHECK-NEXT: itttt lt1675; CHECK-NEXT: movlt.w r9, #01676; CHECK-NEXT: movlt r7, #01677; CHECK-NEXT: movlt.w r8, #01678; CHECK-NEXT: movlt.w r11, #01679; CHECK-NEXT: vcmp.f32 s19, s201680; CHECK-NEXT: vmrs APSR_nzcv, fpscr1681; CHECK-NEXT: itttt gt1682; CHECK-NEXT: movgt.w r11, #151683; CHECK-NEXT: movgt.w r8, #-11684; CHECK-NEXT: movgt.w r7, #-11685; CHECK-NEXT: movgt.w r9, #-11686; CHECK-NEXT: bl __fixunssfti1687; CHECK-NEXT: vcmp.f32 s16, #01688; CHECK-NEXT: vmrs APSR_nzcv, fpscr1689; CHECK-NEXT: itttt lt1690; CHECK-NEXT: movlt r3, #01691; CHECK-NEXT: movlt r0, #01692; CHECK-NEXT: movlt r1, #01693; CHECK-NEXT: movlt r2, #01694; CHECK-NEXT: vcmp.f32 s16, s201695; CHECK-NEXT: vmrs APSR_nzcv, fpscr1696; CHECK-NEXT: it gt1697; CHECK-NEXT: movgt.w r2, #-11698; CHECK-NEXT: str r2, [r4, #8]1699; CHECK-NEXT: it gt1700; CHECK-NEXT: movgt.w r1, #-11701; CHECK-NEXT: str r1, [r4, #4]1702; CHECK-NEXT: it gt1703; CHECK-NEXT: movgt.w r0, #-11704; CHECK-NEXT: str r0, [r4]1705; CHECK-NEXT: mov r0, r71706; CHECK-NEXT: lsrl r0, r9, #281707; CHECK-NEXT: and r1, r11, #151708; CHECK-NEXT: str.w r0, [r4, #41]1709; CHECK-NEXT: mov r0, r101710; CHECK-NEXT: lsrl r0, r5, #281711; CHECK-NEXT: str r0, [r4, #16]1712; CHECK-NEXT: orr.w r0, r9, r8, lsl #41713; CHECK-NEXT: lsrl r8, r1, #281714; CHECK-NEXT: str.w r0, [r4, #45]1715; CHECK-NEXT: strb.w r8, [r4, #49]1716; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload1717; CHECK-NEXT: and r0, r0, #151718; CHECK-NEXT: orr.w r0, r0, r7, lsl #41719; CHECK-NEXT: str.w r0, [r4, #37]1720; CHECK-NEXT: orr.w r0, r5, r6, lsl #41721; CHECK-NEXT: str r0, [r4, #20]1722; CHECK-NEXT: ldr r0, [sp] @ 4-byte Reload1723; CHECK-NEXT: and r1, r0, #151724; CHECK-NEXT: lsrl r6, r1, #281725; CHECK-NEXT: strb r6, [r4, #24]1726; CHECK-NEXT: it gt1727; CHECK-NEXT: movgt r3, #151728; CHECK-NEXT: and r0, r3, #151729; CHECK-NEXT: orr.w r0, r0, r10, lsl #41730; CHECK-NEXT: str r0, [r4, #12]1731; CHECK-NEXT: add sp, #81732; CHECK-NEXT: vpop {d8, d9, d10}1733; CHECK-NEXT: add sp, #41734; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}1735; CHECK-NEXT: .p2align 21736; CHECK-NEXT: @ %bb.1:1737; CHECK-NEXT: .LCPI30_0:1738; CHECK-NEXT: .long 0x717fffff @ float 1.26765052E+301739 %x = call <4 x i100> @llvm.fptoui.sat.v4f32.v4i100(<4 x float> %f)1740 ret <4 x i100> %x1741}1742 1743define arm_aapcs_vfpcc <4 x i128> @test_unsigned_v4f32_v4i128(<4 x float> %f) {1744; CHECK-LABEL: test_unsigned_v4f32_v4i128:1745; CHECK: @ %bb.0:1746; CHECK-NEXT: .save {r4, r5, r6, r7, lr}1747; CHECK-NEXT: push {r4, r5, r6, r7, lr}1748; CHECK-NEXT: .pad #41749; CHECK-NEXT: sub sp, #41750; CHECK-NEXT: .vsave {d8, d9, d10}1751; CHECK-NEXT: vpush {d8, d9, d10}1752; CHECK-NEXT: vmov q4, q01753; CHECK-NEXT: mov r4, r01754; CHECK-NEXT: vmov r0, s191755; CHECK-NEXT: bl __fixunssfti1756; CHECK-NEXT: vmov r5, s181757; CHECK-NEXT: vldr s20, .LCPI31_01758; CHECK-NEXT: vcmp.f32 s19, #01759; CHECK-NEXT: add.w r12, r4, #481760; CHECK-NEXT: vmrs APSR_nzcv, fpscr1761; CHECK-NEXT: itttt lt1762; CHECK-NEXT: movlt r0, #01763; CHECK-NEXT: movlt r1, #01764; CHECK-NEXT: movlt r2, #01765; CHECK-NEXT: movlt r3, #01766; CHECK-NEXT: vcmp.f32 s19, s201767; CHECK-NEXT: vmrs APSR_nzcv, fpscr1768; CHECK-NEXT: it gt1769; CHECK-NEXT: movgt.w r3, #-11770; CHECK-NEXT: ittt gt1771; CHECK-NEXT: movgt.w r2, #-11772; CHECK-NEXT: movgt.w r1, #-11773; CHECK-NEXT: movgt.w r0, #-11774; CHECK-NEXT: stm.w r12, {r0, r1, r2, r3}1775; CHECK-NEXT: vmov r7, s161776; CHECK-NEXT: vmov r6, s171777; CHECK-NEXT: mov r0, r51778; CHECK-NEXT: bl __fixunssfti1779; CHECK-NEXT: vcmp.f32 s18, #01780; CHECK-NEXT: add.w r12, r4, #321781; CHECK-NEXT: vmrs APSR_nzcv, fpscr1782; CHECK-NEXT: itttt lt1783; CHECK-NEXT: movlt r0, #01784; CHECK-NEXT: movlt r1, #01785; CHECK-NEXT: movlt r2, #01786; CHECK-NEXT: movlt r3, #01787; CHECK-NEXT: vcmp.f32 s18, s201788; CHECK-NEXT: vmrs APSR_nzcv, fpscr1789; CHECK-NEXT: itttt gt1790; CHECK-NEXT: movgt.w r3, #-11791; CHECK-NEXT: movgt.w r2, #-11792; CHECK-NEXT: movgt.w r1, #-11793; CHECK-NEXT: movgt.w r0, #-11794; CHECK-NEXT: stm.w r12, {r0, r1, r2, r3}1795; CHECK-NEXT: mov r0, r61796; CHECK-NEXT: bl __fixunssfti1797; CHECK-NEXT: vcmp.f32 s17, #01798; CHECK-NEXT: add.w r12, r4, #161799; CHECK-NEXT: vmrs APSR_nzcv, fpscr1800; CHECK-NEXT: itttt lt1801; CHECK-NEXT: movlt r0, #01802; CHECK-NEXT: movlt r1, #01803; CHECK-NEXT: movlt r2, #01804; CHECK-NEXT: movlt r3, #01805; CHECK-NEXT: vcmp.f32 s17, s201806; CHECK-NEXT: vmrs APSR_nzcv, fpscr1807; CHECK-NEXT: itttt gt1808; CHECK-NEXT: movgt.w r3, #-11809; CHECK-NEXT: movgt.w r2, #-11810; CHECK-NEXT: movgt.w r1, #-11811; CHECK-NEXT: movgt.w r0, #-11812; CHECK-NEXT: stm.w r12, {r0, r1, r2, r3}1813; CHECK-NEXT: mov r0, r71814; CHECK-NEXT: bl __fixunssfti1815; CHECK-NEXT: vcmp.f32 s16, #01816; CHECK-NEXT: vmrs APSR_nzcv, fpscr1817; CHECK-NEXT: itttt lt1818; CHECK-NEXT: movlt r0, #01819; CHECK-NEXT: movlt r1, #01820; CHECK-NEXT: movlt r2, #01821; CHECK-NEXT: movlt r3, #01822; CHECK-NEXT: vcmp.f32 s16, s201823; CHECK-NEXT: vmrs APSR_nzcv, fpscr1824; CHECK-NEXT: itttt gt1825; CHECK-NEXT: movgt.w r3, #-11826; CHECK-NEXT: movgt.w r2, #-11827; CHECK-NEXT: movgt.w r1, #-11828; CHECK-NEXT: movgt.w r0, #-11829; CHECK-NEXT: stm r4!, {r0, r1, r2, r3}1830; CHECK-NEXT: vpop {d8, d9, d10}1831; CHECK-NEXT: add sp, #41832; CHECK-NEXT: pop {r4, r5, r6, r7, pc}1833; CHECK-NEXT: .p2align 21834; CHECK-NEXT: @ %bb.1:1835; CHECK-NEXT: .LCPI31_0:1836; CHECK-NEXT: .long 0x7f7fffff @ float 3.40282347E+381837 %x = call <4 x i128> @llvm.fptoui.sat.v4f32.v4i128(<4 x float> %f)1838 ret <4 x i128> %x1839}1840 1841;1842; 2-Vector double to signed integer -- result size variation1843;1844 1845declare <2 x i1> @llvm.fptoui.sat.v2f64.v2i1 (<2 x double>)1846declare <2 x i8> @llvm.fptoui.sat.v2f64.v2i8 (<2 x double>)1847declare <2 x i13> @llvm.fptoui.sat.v2f64.v2i13 (<2 x double>)1848declare <2 x i16> @llvm.fptoui.sat.v2f64.v2i16 (<2 x double>)1849declare <2 x i19> @llvm.fptoui.sat.v2f64.v2i19 (<2 x double>)1850declare <2 x i50> @llvm.fptoui.sat.v2f64.v2i50 (<2 x double>)1851declare <2 x i64> @llvm.fptoui.sat.v2f64.v2i64 (<2 x double>)1852declare <2 x i100> @llvm.fptoui.sat.v2f64.v2i100(<2 x double>)1853declare <2 x i128> @llvm.fptoui.sat.v2f64.v2i128(<2 x double>)1854 1855define arm_aapcs_vfpcc <2 x i1> @test_unsigned_v2f64_v2i1(<2 x double> %f) {1856; CHECK-LABEL: test_unsigned_v2f64_v2i1:1857; CHECK: @ %bb.0:1858; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}1859; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}1860; CHECK-NEXT: .pad #41861; CHECK-NEXT: sub sp, #41862; CHECK-NEXT: .vsave {d8, d9}1863; CHECK-NEXT: vpush {d8, d9}1864; CHECK-NEXT: .pad #81865; CHECK-NEXT: sub sp, #81866; CHECK-NEXT: vmov q4, q01867; CHECK-NEXT: vldr d0, .LCPI32_01868; CHECK-NEXT: vmov r4, r8, d81869; CHECK-NEXT: str r0, [sp, #4] @ 4-byte Spill1870; CHECK-NEXT: vmov r10, r3, d01871; CHECK-NEXT: str r3, [sp] @ 4-byte Spill1872; CHECK-NEXT: mov r0, r41873; CHECK-NEXT: mov r1, r81874; CHECK-NEXT: mov r2, r101875; CHECK-NEXT: bl __aeabi_dcmpge1876; CHECK-NEXT: mov r9, r01877; CHECK-NEXT: mov r0, r41878; CHECK-NEXT: mov r1, r81879; CHECK-NEXT: bl __aeabi_d2uiz1880; CHECK-NEXT: vldr d0, .LCPI32_11881; CHECK-NEXT: cmp.w r9, #01882; CHECK-NEXT: csel r7, r0, r9, ne1883; CHECK-NEXT: mov r0, r41884; CHECK-NEXT: vmov r11, r3, d01885; CHECK-NEXT: mov r1, r81886; CHECK-NEXT: vmov r6, r5, d91887; CHECK-NEXT: mov r2, r111888; CHECK-NEXT: mov r8, r31889; CHECK-NEXT: bl __aeabi_dcmpgt1890; CHECK-NEXT: cmp r0, #01891; CHECK-NEXT: it ne1892; CHECK-NEXT: movne r7, #11893; CHECK-NEXT: and r0, r7, #11894; CHECK-NEXT: ldr r3, [sp] @ 4-byte Reload1895; CHECK-NEXT: rsbs r0, r0, #01896; CHECK-NEXT: movs r7, #01897; CHECK-NEXT: bfi r7, r0, #0, #11898; CHECK-NEXT: mov r0, r61899; CHECK-NEXT: mov r1, r51900; CHECK-NEXT: mov r2, r101901; CHECK-NEXT: bl __aeabi_dcmpge1902; CHECK-NEXT: mov r4, r01903; CHECK-NEXT: mov r0, r61904; CHECK-NEXT: mov r1, r51905; CHECK-NEXT: bl __aeabi_d2uiz1906; CHECK-NEXT: cmp r4, #01907; CHECK-NEXT: mov r1, r51908; CHECK-NEXT: csel r4, r0, r4, ne1909; CHECK-NEXT: mov r0, r61910; CHECK-NEXT: mov r2, r111911; CHECK-NEXT: mov r3, r81912; CHECK-NEXT: bl __aeabi_dcmpgt1913; CHECK-NEXT: cmp r0, #01914; CHECK-NEXT: it ne1915; CHECK-NEXT: movne r4, #11916; CHECK-NEXT: and r0, r4, #11917; CHECK-NEXT: rsbs r0, r0, #01918; CHECK-NEXT: bfi r7, r0, #1, #11919; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload1920; CHECK-NEXT: strb r7, [r0]1921; CHECK-NEXT: add sp, #81922; CHECK-NEXT: vpop {d8, d9}1923; CHECK-NEXT: add sp, #41924; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}1925; CHECK-NEXT: .p2align 31926; CHECK-NEXT: @ %bb.1:1927; CHECK-NEXT: .LCPI32_0:1928; CHECK-NEXT: .long 0 @ double 01929; CHECK-NEXT: .long 01930; CHECK-NEXT: .LCPI32_1:1931; CHECK-NEXT: .long 0 @ double 11932; CHECK-NEXT: .long 10726932481933 %x = call <2 x i1> @llvm.fptoui.sat.v2f64.v2i1(<2 x double> %f)1934 ret <2 x i1> %x1935}1936 1937define arm_aapcs_vfpcc <2 x i8> @test_unsigned_v2f64_v2i8(<2 x double> %f) {1938; CHECK-LABEL: test_unsigned_v2f64_v2i8:1939; CHECK: @ %bb.0:1940; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}1941; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}1942; CHECK-NEXT: .pad #41943; CHECK-NEXT: sub sp, #41944; CHECK-NEXT: .vsave {d8, d9}1945; CHECK-NEXT: vpush {d8, d9}1946; CHECK-NEXT: .pad #81947; CHECK-NEXT: sub sp, #81948; CHECK-NEXT: vmov q4, q01949; CHECK-NEXT: vldr d0, .LCPI33_01950; CHECK-NEXT: vmov r6, r7, d91951; CHECK-NEXT: vmov r11, r3, d01952; CHECK-NEXT: str r3, [sp, #4] @ 4-byte Spill1953; CHECK-NEXT: mov r0, r61954; CHECK-NEXT: mov r1, r71955; CHECK-NEXT: mov r2, r111956; CHECK-NEXT: bl __aeabi_dcmpge1957; CHECK-NEXT: mov r8, r01958; CHECK-NEXT: mov r0, r61959; CHECK-NEXT: mov r1, r71960; CHECK-NEXT: bl __aeabi_d2ulz1961; CHECK-NEXT: vldr d0, .LCPI33_11962; CHECK-NEXT: cmp.w r8, #01963; CHECK-NEXT: csel r9, r0, r8, ne1964; CHECK-NEXT: csel r8, r1, r8, ne1965; CHECK-NEXT: vmov r10, r3, d01966; CHECK-NEXT: mov r0, r61967; CHECK-NEXT: mov r1, r71968; CHECK-NEXT: vmov r5, r4, d81969; CHECK-NEXT: str r3, [sp] @ 4-byte Spill1970; CHECK-NEXT: mov r2, r101971; CHECK-NEXT: bl __aeabi_dcmpgt1972; CHECK-NEXT: cmp r0, #01973; CHECK-NEXT: itt ne1974; CHECK-NEXT: movne.w r8, #01975; CHECK-NEXT: movne.w r9, #2551976; CHECK-NEXT: ldr r3, [sp, #4] @ 4-byte Reload1977; CHECK-NEXT: mov r0, r51978; CHECK-NEXT: mov r1, r41979; CHECK-NEXT: mov r2, r111980; CHECK-NEXT: bl __aeabi_dcmpge1981; CHECK-NEXT: mov r6, r01982; CHECK-NEXT: mov r0, r51983; CHECK-NEXT: mov r1, r41984; CHECK-NEXT: bl __aeabi_d2ulz1985; CHECK-NEXT: ldr r3, [sp] @ 4-byte Reload1986; CHECK-NEXT: cmp r6, #01987; CHECK-NEXT: csel r7, r1, r6, ne1988; CHECK-NEXT: csel r6, r0, r6, ne1989; CHECK-NEXT: mov r0, r51990; CHECK-NEXT: mov r1, r41991; CHECK-NEXT: mov r2, r101992; CHECK-NEXT: bl __aeabi_dcmpgt1993; CHECK-NEXT: cmp r0, #01994; CHECK-NEXT: itt ne1995; CHECK-NEXT: movne r6, #2551996; CHECK-NEXT: movne r7, #01997; CHECK-NEXT: vmov q0[2], q0[0], r6, r91998; CHECK-NEXT: vmov q0[3], q0[1], r7, r81999; CHECK-NEXT: add sp, #82000; CHECK-NEXT: vpop {d8, d9}2001; CHECK-NEXT: add sp, #42002; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}2003; CHECK-NEXT: .p2align 32004; CHECK-NEXT: @ %bb.1:2005; CHECK-NEXT: .LCPI33_0:2006; CHECK-NEXT: .long 0 @ double 02007; CHECK-NEXT: .long 02008; CHECK-NEXT: .LCPI33_1:2009; CHECK-NEXT: .long 0 @ double 2552010; CHECK-NEXT: .long 10810736642011 %x = call <2 x i8> @llvm.fptoui.sat.v2f64.v2i8(<2 x double> %f)2012 ret <2 x i8> %x2013}2014 2015define arm_aapcs_vfpcc <2 x i13> @test_unsigned_v2f64_v2i13(<2 x double> %f) {2016; CHECK-LABEL: test_unsigned_v2f64_v2i13:2017; CHECK: @ %bb.0:2018; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}2019; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}2020; CHECK-NEXT: .pad #42021; CHECK-NEXT: sub sp, #42022; CHECK-NEXT: .vsave {d8, d9}2023; CHECK-NEXT: vpush {d8, d9}2024; CHECK-NEXT: .pad #82025; CHECK-NEXT: sub sp, #82026; CHECK-NEXT: vmov q4, q02027; CHECK-NEXT: vldr d0, .LCPI34_02028; CHECK-NEXT: vmov r6, r7, d92029; CHECK-NEXT: vmov r11, r3, d02030; CHECK-NEXT: str r3, [sp, #4] @ 4-byte Spill2031; CHECK-NEXT: mov r0, r62032; CHECK-NEXT: mov r1, r72033; CHECK-NEXT: mov r2, r112034; CHECK-NEXT: bl __aeabi_dcmpge2035; CHECK-NEXT: mov r8, r02036; CHECK-NEXT: mov r0, r62037; CHECK-NEXT: mov r1, r72038; CHECK-NEXT: bl __aeabi_d2ulz2039; CHECK-NEXT: vldr d0, .LCPI34_12040; CHECK-NEXT: cmp.w r8, #02041; CHECK-NEXT: csel r9, r0, r8, ne2042; CHECK-NEXT: csel r8, r1, r8, ne2043; CHECK-NEXT: vmov r10, r3, d02044; CHECK-NEXT: mov r0, r62045; CHECK-NEXT: mov r1, r72046; CHECK-NEXT: vmov r5, r4, d82047; CHECK-NEXT: str r3, [sp] @ 4-byte Spill2048; CHECK-NEXT: mov r2, r102049; CHECK-NEXT: bl __aeabi_dcmpgt2050; CHECK-NEXT: cmp r0, #02051; CHECK-NEXT: itt ne2052; CHECK-NEXT: movne.w r8, #02053; CHECK-NEXT: movwne r9, #81912054; CHECK-NEXT: ldr r3, [sp, #4] @ 4-byte Reload2055; CHECK-NEXT: mov r0, r52056; CHECK-NEXT: mov r1, r42057; CHECK-NEXT: mov r2, r112058; CHECK-NEXT: bl __aeabi_dcmpge2059; CHECK-NEXT: mov r6, r02060; CHECK-NEXT: mov r0, r52061; CHECK-NEXT: mov r1, r42062; CHECK-NEXT: bl __aeabi_d2ulz2063; CHECK-NEXT: ldr r3, [sp] @ 4-byte Reload2064; CHECK-NEXT: cmp r6, #02065; CHECK-NEXT: csel r7, r1, r6, ne2066; CHECK-NEXT: csel r6, r0, r6, ne2067; CHECK-NEXT: mov r0, r52068; CHECK-NEXT: mov r1, r42069; CHECK-NEXT: mov r2, r102070; CHECK-NEXT: bl __aeabi_dcmpgt2071; CHECK-NEXT: cmp r0, #02072; CHECK-NEXT: itt ne2073; CHECK-NEXT: movwne r6, #81912074; CHECK-NEXT: movne r7, #02075; CHECK-NEXT: vmov q0[2], q0[0], r6, r92076; CHECK-NEXT: vmov q0[3], q0[1], r7, r82077; CHECK-NEXT: add sp, #82078; CHECK-NEXT: vpop {d8, d9}2079; CHECK-NEXT: add sp, #42080; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}2081; CHECK-NEXT: .p2align 32082; CHECK-NEXT: @ %bb.1:2083; CHECK-NEXT: .LCPI34_0:2084; CHECK-NEXT: .long 0 @ double 02085; CHECK-NEXT: .long 02086; CHECK-NEXT: .LCPI34_1:2087; CHECK-NEXT: .long 0 @ double 81912088; CHECK-NEXT: .long 10863244802089 %x = call <2 x i13> @llvm.fptoui.sat.v2f64.v2i13(<2 x double> %f)2090 ret <2 x i13> %x2091}2092 2093define arm_aapcs_vfpcc <2 x i16> @test_unsigned_v2f64_v2i16(<2 x double> %f) {2094; CHECK-LABEL: test_unsigned_v2f64_v2i16:2095; CHECK: @ %bb.0:2096; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}2097; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}2098; CHECK-NEXT: .pad #42099; CHECK-NEXT: sub sp, #42100; CHECK-NEXT: .vsave {d8, d9}2101; CHECK-NEXT: vpush {d8, d9}2102; CHECK-NEXT: .pad #82103; CHECK-NEXT: sub sp, #82104; CHECK-NEXT: vmov q4, q02105; CHECK-NEXT: vldr d0, .LCPI35_02106; CHECK-NEXT: vmov r6, r7, d92107; CHECK-NEXT: vmov r11, r3, d02108; CHECK-NEXT: str r3, [sp, #4] @ 4-byte Spill2109; CHECK-NEXT: mov r0, r62110; CHECK-NEXT: mov r1, r72111; CHECK-NEXT: mov r2, r112112; CHECK-NEXT: bl __aeabi_dcmpge2113; CHECK-NEXT: mov r8, r02114; CHECK-NEXT: mov r0, r62115; CHECK-NEXT: mov r1, r72116; CHECK-NEXT: bl __aeabi_d2ulz2117; CHECK-NEXT: vldr d0, .LCPI35_12118; CHECK-NEXT: cmp.w r8, #02119; CHECK-NEXT: csel r9, r0, r8, ne2120; CHECK-NEXT: csel r8, r1, r8, ne2121; CHECK-NEXT: vmov r10, r3, d02122; CHECK-NEXT: mov r0, r62123; CHECK-NEXT: mov r1, r72124; CHECK-NEXT: vmov r5, r4, d82125; CHECK-NEXT: str r3, [sp] @ 4-byte Spill2126; CHECK-NEXT: mov r2, r102127; CHECK-NEXT: bl __aeabi_dcmpgt2128; CHECK-NEXT: cmp r0, #02129; CHECK-NEXT: itt ne2130; CHECK-NEXT: movne.w r8, #02131; CHECK-NEXT: movwne r9, #655352132; CHECK-NEXT: ldr r3, [sp, #4] @ 4-byte Reload2133; CHECK-NEXT: mov r0, r52134; CHECK-NEXT: mov r1, r42135; CHECK-NEXT: mov r2, r112136; CHECK-NEXT: bl __aeabi_dcmpge2137; CHECK-NEXT: mov r6, r02138; CHECK-NEXT: mov r0, r52139; CHECK-NEXT: mov r1, r42140; CHECK-NEXT: bl __aeabi_d2ulz2141; CHECK-NEXT: ldr r3, [sp] @ 4-byte Reload2142; CHECK-NEXT: cmp r6, #02143; CHECK-NEXT: csel r7, r1, r6, ne2144; CHECK-NEXT: csel r6, r0, r6, ne2145; CHECK-NEXT: mov r0, r52146; CHECK-NEXT: mov r1, r42147; CHECK-NEXT: mov r2, r102148; CHECK-NEXT: bl __aeabi_dcmpgt2149; CHECK-NEXT: cmp r0, #02150; CHECK-NEXT: itt ne2151; CHECK-NEXT: movwne r6, #655352152; CHECK-NEXT: movne r7, #02153; CHECK-NEXT: vmov q0[2], q0[0], r6, r92154; CHECK-NEXT: vmov q0[3], q0[1], r7, r82155; CHECK-NEXT: add sp, #82156; CHECK-NEXT: vpop {d8, d9}2157; CHECK-NEXT: add sp, #42158; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}2159; CHECK-NEXT: .p2align 32160; CHECK-NEXT: @ %bb.1:2161; CHECK-NEXT: .LCPI35_0:2162; CHECK-NEXT: .long 0 @ double 02163; CHECK-NEXT: .long 02164; CHECK-NEXT: .LCPI35_1:2165; CHECK-NEXT: .long 0 @ double 655352166; CHECK-NEXT: .long 10894704322167 %x = call <2 x i16> @llvm.fptoui.sat.v2f64.v2i16(<2 x double> %f)2168 ret <2 x i16> %x2169}2170 2171define arm_aapcs_vfpcc <2 x i19> @test_unsigned_v2f64_v2i19(<2 x double> %f) {2172; CHECK-LABEL: test_unsigned_v2f64_v2i19:2173; CHECK: @ %bb.0:2174; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}2175; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}2176; CHECK-NEXT: .pad #42177; CHECK-NEXT: sub sp, #42178; CHECK-NEXT: .vsave {d8, d9}2179; CHECK-NEXT: vpush {d8, d9}2180; CHECK-NEXT: .pad #162181; CHECK-NEXT: sub sp, #162182; CHECK-NEXT: vmov q4, q02183; CHECK-NEXT: vldr d0, .LCPI36_02184; CHECK-NEXT: vmov r11, r5, d82185; CHECK-NEXT: vmov r6, r7, d02186; CHECK-NEXT: str r5, [sp, #12] @ 4-byte Spill2187; CHECK-NEXT: mov r0, r112188; CHECK-NEXT: mov r1, r52189; CHECK-NEXT: mov r2, r62190; CHECK-NEXT: mov r3, r72191; CHECK-NEXT: bl __aeabi_dcmpge2192; CHECK-NEXT: mov r4, r02193; CHECK-NEXT: mov r0, r112194; CHECK-NEXT: mov r1, r52195; CHECK-NEXT: bl __aeabi_d2ulz2196; CHECK-NEXT: vldr d0, .LCPI36_12197; CHECK-NEXT: vmov r5, r8, d92198; CHECK-NEXT: cmp r4, #02199; CHECK-NEXT: vmov r3, r2, d02200; CHECK-NEXT: csel r9, r1, r4, ne2201; CHECK-NEXT: csel r10, r0, r4, ne2202; CHECK-NEXT: mov r0, r52203; CHECK-NEXT: mov r1, r82204; CHECK-NEXT: strd r3, r2, [sp, #4] @ 8-byte Folded Spill2205; CHECK-NEXT: mov r2, r62206; CHECK-NEXT: mov r3, r72207; CHECK-NEXT: bl __aeabi_dcmpge2208; CHECK-NEXT: mov r4, r02209; CHECK-NEXT: mov r0, r52210; CHECK-NEXT: mov r1, r82211; CHECK-NEXT: bl __aeabi_d2ulz2212; CHECK-NEXT: cmp r4, #02213; CHECK-NEXT: ldr r7, [sp, #4] @ 4-byte Reload2214; CHECK-NEXT: csel r6, r0, r4, ne2215; CHECK-NEXT: mov r0, r52216; CHECK-NEXT: ldr r5, [sp, #8] @ 4-byte Reload2217; CHECK-NEXT: csel r4, r1, r4, ne2218; CHECK-NEXT: mov r1, r82219; CHECK-NEXT: mov r2, r72220; CHECK-NEXT: mov r3, r52221; CHECK-NEXT: bl __aeabi_dcmpgt2222; CHECK-NEXT: cmp r0, #02223; CHECK-NEXT: ittt ne2224; CHECK-NEXT: movne r4, #02225; CHECK-NEXT: movwne r6, #655352226; CHECK-NEXT: movtne r6, #72227; CHECK-NEXT: ldr r1, [sp, #12] @ 4-byte Reload2228; CHECK-NEXT: mov r0, r112229; CHECK-NEXT: mov r2, r72230; CHECK-NEXT: mov r3, r52231; CHECK-NEXT: bl __aeabi_dcmpgt2232; CHECK-NEXT: cmp r0, #02233; CHECK-NEXT: ittt ne2234; CHECK-NEXT: movwne r10, #655352235; CHECK-NEXT: movtne r10, #72236; CHECK-NEXT: movne.w r9, #02237; CHECK-NEXT: vmov q0[2], q0[0], r10, r62238; CHECK-NEXT: vmov q0[3], q0[1], r9, r42239; CHECK-NEXT: add sp, #162240; CHECK-NEXT: vpop {d8, d9}2241; CHECK-NEXT: add sp, #42242; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}2243; CHECK-NEXT: .p2align 32244; CHECK-NEXT: @ %bb.1:2245; CHECK-NEXT: .LCPI36_0:2246; CHECK-NEXT: .long 0 @ double 02247; CHECK-NEXT: .long 02248; CHECK-NEXT: .LCPI36_1:2249; CHECK-NEXT: .long 0 @ double 5242872250; CHECK-NEXT: .long 10926161882251 %x = call <2 x i19> @llvm.fptoui.sat.v2f64.v2i19(<2 x double> %f)2252 ret <2 x i19> %x2253}2254 2255define arm_aapcs_vfpcc <2 x i32> @test_unsigned_v2f64_v2i32_duplicate(<2 x double> %f) {2256; CHECK-LABEL: test_unsigned_v2f64_v2i32_duplicate:2257; CHECK: @ %bb.0:2258; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}2259; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}2260; CHECK-NEXT: .pad #42261; CHECK-NEXT: sub sp, #42262; CHECK-NEXT: .vsave {d8, d9}2263; CHECK-NEXT: vpush {d8, d9}2264; CHECK-NEXT: .pad #82265; CHECK-NEXT: sub sp, #82266; CHECK-NEXT: vmov q4, q02267; CHECK-NEXT: vldr d0, .LCPI37_02268; CHECK-NEXT: vmov r6, r7, d92269; CHECK-NEXT: vmov r11, r3, d02270; CHECK-NEXT: str r3, [sp, #4] @ 4-byte Spill2271; CHECK-NEXT: mov r0, r62272; CHECK-NEXT: mov r1, r72273; CHECK-NEXT: mov r2, r112274; CHECK-NEXT: bl __aeabi_dcmpge2275; CHECK-NEXT: mov r8, r02276; CHECK-NEXT: mov r0, r62277; CHECK-NEXT: mov r1, r72278; CHECK-NEXT: bl __aeabi_d2ulz2279; CHECK-NEXT: vldr d0, .LCPI37_12280; CHECK-NEXT: cmp.w r8, #02281; CHECK-NEXT: csel r9, r0, r8, ne2282; CHECK-NEXT: csel r8, r1, r8, ne2283; CHECK-NEXT: vmov r10, r3, d02284; CHECK-NEXT: mov r0, r62285; CHECK-NEXT: mov r1, r72286; CHECK-NEXT: vmov r5, r4, d82287; CHECK-NEXT: str r3, [sp] @ 4-byte Spill2288; CHECK-NEXT: mov r2, r102289; CHECK-NEXT: bl __aeabi_dcmpgt2290; CHECK-NEXT: cmp r0, #02291; CHECK-NEXT: itt ne2292; CHECK-NEXT: movne.w r8, #02293; CHECK-NEXT: movne.w r9, #-12294; CHECK-NEXT: ldr r3, [sp, #4] @ 4-byte Reload2295; CHECK-NEXT: mov r0, r52296; CHECK-NEXT: mov r1, r42297; CHECK-NEXT: mov r2, r112298; CHECK-NEXT: bl __aeabi_dcmpge2299; CHECK-NEXT: mov r6, r02300; CHECK-NEXT: mov r0, r52301; CHECK-NEXT: mov r1, r42302; CHECK-NEXT: bl __aeabi_d2ulz2303; CHECK-NEXT: ldr r3, [sp] @ 4-byte Reload2304; CHECK-NEXT: cmp r6, #02305; CHECK-NEXT: csel r7, r1, r6, ne2306; CHECK-NEXT: csel r6, r0, r6, ne2307; CHECK-NEXT: mov r0, r52308; CHECK-NEXT: mov r1, r42309; CHECK-NEXT: mov r2, r102310; CHECK-NEXT: bl __aeabi_dcmpgt2311; CHECK-NEXT: cmp r0, #02312; CHECK-NEXT: itt ne2313; CHECK-NEXT: movne.w r6, #-12314; CHECK-NEXT: movne r7, #02315; CHECK-NEXT: vmov q0[2], q0[0], r6, r92316; CHECK-NEXT: vmov q0[3], q0[1], r7, r82317; CHECK-NEXT: add sp, #82318; CHECK-NEXT: vpop {d8, d9}2319; CHECK-NEXT: add sp, #42320; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}2321; CHECK-NEXT: .p2align 32322; CHECK-NEXT: @ %bb.1:2323; CHECK-NEXT: .LCPI37_0:2324; CHECK-NEXT: .long 0 @ double 02325; CHECK-NEXT: .long 02326; CHECK-NEXT: .LCPI37_1:2327; CHECK-NEXT: .long 4292870144 @ double 42949672952328; CHECK-NEXT: .long 11062476792329 %x = call <2 x i32> @llvm.fptoui.sat.v2f64.v2i32(<2 x double> %f)2330 ret <2 x i32> %x2331}2332 2333define arm_aapcs_vfpcc <2 x i50> @test_unsigned_v2f64_v2i50(<2 x double> %f) {2334; CHECK-LABEL: test_unsigned_v2f64_v2i50:2335; CHECK: @ %bb.0:2336; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}2337; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}2338; CHECK-NEXT: .pad #42339; CHECK-NEXT: sub sp, #42340; CHECK-NEXT: .vsave {d8, d9}2341; CHECK-NEXT: vpush {d8, d9}2342; CHECK-NEXT: .pad #162343; CHECK-NEXT: sub sp, #162344; CHECK-NEXT: vmov q4, q02345; CHECK-NEXT: vldr d0, .LCPI38_02346; CHECK-NEXT: vmov r11, r5, d82347; CHECK-NEXT: vmov r6, r7, d02348; CHECK-NEXT: str r5, [sp, #12] @ 4-byte Spill2349; CHECK-NEXT: mov r0, r112350; CHECK-NEXT: mov r1, r52351; CHECK-NEXT: mov r2, r62352; CHECK-NEXT: mov r3, r72353; CHECK-NEXT: bl __aeabi_dcmpge2354; CHECK-NEXT: mov r4, r02355; CHECK-NEXT: mov r0, r112356; CHECK-NEXT: mov r1, r52357; CHECK-NEXT: bl __aeabi_d2ulz2358; CHECK-NEXT: vldr d0, .LCPI38_12359; CHECK-NEXT: vmov r5, r8, d92360; CHECK-NEXT: cmp r4, #02361; CHECK-NEXT: vmov r3, r2, d02362; CHECK-NEXT: csel r10, r0, r4, ne2363; CHECK-NEXT: csel r9, r1, r4, ne2364; CHECK-NEXT: mov r0, r52365; CHECK-NEXT: mov r1, r82366; CHECK-NEXT: strd r3, r2, [sp, #4] @ 8-byte Folded Spill2367; CHECK-NEXT: mov r2, r62368; CHECK-NEXT: mov r3, r72369; CHECK-NEXT: bl __aeabi_dcmpge2370; CHECK-NEXT: mov r4, r02371; CHECK-NEXT: mov r0, r52372; CHECK-NEXT: mov r1, r82373; CHECK-NEXT: bl __aeabi_d2ulz2374; CHECK-NEXT: cmp r4, #02375; CHECK-NEXT: ldr r7, [sp, #4] @ 4-byte Reload2376; CHECK-NEXT: csel r6, r1, r4, ne2377; CHECK-NEXT: csel r4, r0, r4, ne2378; CHECK-NEXT: mov r0, r52379; CHECK-NEXT: ldr r5, [sp, #8] @ 4-byte Reload2380; CHECK-NEXT: mov r1, r82381; CHECK-NEXT: mov r2, r72382; CHECK-NEXT: mov r3, r52383; CHECK-NEXT: bl __aeabi_dcmpgt2384; CHECK-NEXT: cmp r0, #02385; CHECK-NEXT: ittt ne2386; CHECK-NEXT: movne.w r4, #-12387; CHECK-NEXT: movwne r6, #655352388; CHECK-NEXT: movtne r6, #32389; CHECK-NEXT: ldr r1, [sp, #12] @ 4-byte Reload2390; CHECK-NEXT: mov r0, r112391; CHECK-NEXT: mov r2, r72392; CHECK-NEXT: mov r3, r52393; CHECK-NEXT: bl __aeabi_dcmpgt2394; CHECK-NEXT: cmp r0, #02395; CHECK-NEXT: ittt ne2396; CHECK-NEXT: movwne r9, #655352397; CHECK-NEXT: movtne r9, #32398; CHECK-NEXT: movne.w r10, #-12399; CHECK-NEXT: vmov q0[2], q0[0], r10, r42400; CHECK-NEXT: vmov q0[3], q0[1], r9, r62401; CHECK-NEXT: add sp, #162402; CHECK-NEXT: vpop {d8, d9}2403; CHECK-NEXT: add sp, #42404; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}2405; CHECK-NEXT: .p2align 32406; CHECK-NEXT: @ %bb.1:2407; CHECK-NEXT: .LCPI38_0:2408; CHECK-NEXT: .long 0 @ double 02409; CHECK-NEXT: .long 02410; CHECK-NEXT: .LCPI38_1:2411; CHECK-NEXT: .long 4294967288 @ double 11258999068426232412; CHECK-NEXT: .long 11251220472413 %x = call <2 x i50> @llvm.fptoui.sat.v2f64.v2i50(<2 x double> %f)2414 ret <2 x i50> %x2415}2416 2417define arm_aapcs_vfpcc <2 x i64> @test_unsigned_v2f64_v2i64(<2 x double> %f) {2418; CHECK-LABEL: test_unsigned_v2f64_v2i64:2419; CHECK: @ %bb.0:2420; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}2421; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}2422; CHECK-NEXT: .pad #42423; CHECK-NEXT: sub sp, #42424; CHECK-NEXT: .vsave {d8, d9}2425; CHECK-NEXT: vpush {d8, d9}2426; CHECK-NEXT: .pad #82427; CHECK-NEXT: sub sp, #82428; CHECK-NEXT: vmov q4, q02429; CHECK-NEXT: vldr d0, .LCPI39_02430; CHECK-NEXT: vmov r6, r7, d92431; CHECK-NEXT: vmov r11, r3, d02432; CHECK-NEXT: str r3, [sp, #4] @ 4-byte Spill2433; CHECK-NEXT: mov r0, r62434; CHECK-NEXT: mov r1, r72435; CHECK-NEXT: mov r2, r112436; CHECK-NEXT: bl __aeabi_dcmpge2437; CHECK-NEXT: mov r8, r02438; CHECK-NEXT: mov r0, r62439; CHECK-NEXT: mov r1, r72440; CHECK-NEXT: bl __aeabi_d2ulz2441; CHECK-NEXT: vldr d0, .LCPI39_12442; CHECK-NEXT: cmp.w r8, #02443; CHECK-NEXT: csel r9, r0, r8, ne2444; CHECK-NEXT: csel r8, r1, r8, ne2445; CHECK-NEXT: vmov r10, r3, d02446; CHECK-NEXT: mov r0, r62447; CHECK-NEXT: mov r1, r72448; CHECK-NEXT: vmov r5, r4, d82449; CHECK-NEXT: str r3, [sp] @ 4-byte Spill2450; CHECK-NEXT: mov r2, r102451; CHECK-NEXT: bl __aeabi_dcmpgt2452; CHECK-NEXT: cmp r0, #02453; CHECK-NEXT: itt ne2454; CHECK-NEXT: movne.w r8, #-12455; CHECK-NEXT: movne.w r9, #-12456; CHECK-NEXT: ldr r3, [sp, #4] @ 4-byte Reload2457; CHECK-NEXT: mov r0, r52458; CHECK-NEXT: mov r1, r42459; CHECK-NEXT: mov r2, r112460; CHECK-NEXT: bl __aeabi_dcmpge2461; CHECK-NEXT: mov r6, r02462; CHECK-NEXT: mov r0, r52463; CHECK-NEXT: mov r1, r42464; CHECK-NEXT: bl __aeabi_d2ulz2465; CHECK-NEXT: ldr r3, [sp] @ 4-byte Reload2466; CHECK-NEXT: cmp r6, #02467; CHECK-NEXT: csel r7, r1, r6, ne2468; CHECK-NEXT: csel r6, r0, r6, ne2469; CHECK-NEXT: mov r0, r52470; CHECK-NEXT: mov r1, r42471; CHECK-NEXT: mov r2, r102472; CHECK-NEXT: bl __aeabi_dcmpgt2473; CHECK-NEXT: cmp r0, #02474; CHECK-NEXT: itt ne2475; CHECK-NEXT: movne.w r6, #-12476; CHECK-NEXT: movne.w r7, #-12477; CHECK-NEXT: vmov q0[2], q0[0], r6, r92478; CHECK-NEXT: vmov q0[3], q0[1], r7, r82479; CHECK-NEXT: add sp, #82480; CHECK-NEXT: vpop {d8, d9}2481; CHECK-NEXT: add sp, #42482; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}2483; CHECK-NEXT: .p2align 32484; CHECK-NEXT: @ %bb.1:2485; CHECK-NEXT: .LCPI39_0:2486; CHECK-NEXT: .long 0 @ double 02487; CHECK-NEXT: .long 02488; CHECK-NEXT: .LCPI39_1:2489; CHECK-NEXT: .long 4294967295 @ double 1.844674407370955E+192490; CHECK-NEXT: .long 11398021112491 %x = call <2 x i64> @llvm.fptoui.sat.v2f64.v2i64(<2 x double> %f)2492 ret <2 x i64> %x2493}2494 2495define arm_aapcs_vfpcc <2 x i100> @test_unsigned_v2f64_v2i100(<2 x double> %f) {2496; CHECK-LABEL: test_unsigned_v2f64_v2i100:2497; CHECK: @ %bb.0:2498; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}2499; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}2500; CHECK-NEXT: .pad #42501; CHECK-NEXT: sub sp, #42502; CHECK-NEXT: .vsave {d8, d9}2503; CHECK-NEXT: vpush {d8, d9}2504; CHECK-NEXT: .pad #482505; CHECK-NEXT: sub sp, #482506; CHECK-NEXT: vmov q4, q02507; CHECK-NEXT: vldr d0, .LCPI40_02508; CHECK-NEXT: vmov r11, r4, d82509; CHECK-NEXT: mov r6, r02510; CHECK-NEXT: vmov r2, r3, d02511; CHECK-NEXT: str r3, [sp, #36] @ 4-byte Spill2512; CHECK-NEXT: mov r0, r112513; CHECK-NEXT: mov r1, r42514; CHECK-NEXT: mov r9, r22515; CHECK-NEXT: bl __aeabi_dcmpge2516; CHECK-NEXT: mov r8, r02517; CHECK-NEXT: mov r0, r112518; CHECK-NEXT: mov r1, r42519; CHECK-NEXT: mov r5, r42520; CHECK-NEXT: bl __fixunsdfti2521; CHECK-NEXT: vldr d0, .LCPI40_12522; CHECK-NEXT: cmp.w r8, #02523; CHECK-NEXT: str r3, [sp, #28] @ 4-byte Spill2524; CHECK-NEXT: csel r4, r2, r8, ne2525; CHECK-NEXT: vmov r10, r3, d02526; CHECK-NEXT: strd r1, r0, [sp, #16] @ 8-byte Folded Spill2527; CHECK-NEXT: mov r0, r112528; CHECK-NEXT: mov r1, r52529; CHECK-NEXT: str r5, [sp, #40] @ 4-byte Spill2530; CHECK-NEXT: mov r2, r102531; CHECK-NEXT: mov r8, r32532; CHECK-NEXT: bl __aeabi_dcmpgt2533; CHECK-NEXT: cmp r0, #02534; CHECK-NEXT: it ne2535; CHECK-NEXT: movne.w r4, #-12536; CHECK-NEXT: str r4, [r6, #8]2537; CHECK-NEXT: mov r0, r112538; CHECK-NEXT: ldr r7, [sp, #36] @ 4-byte Reload2539; CHECK-NEXT: mov r1, r52540; CHECK-NEXT: mov r2, r92541; CHECK-NEXT: mov r3, r72542; CHECK-NEXT: bl __aeabi_dcmpge2543; CHECK-NEXT: ldr r1, [sp, #16] @ 4-byte Reload2544; CHECK-NEXT: cmp r0, #02545; CHECK-NEXT: mov r2, r102546; CHECK-NEXT: mov r3, r82547; CHECK-NEXT: csel r4, r1, r0, ne2548; CHECK-NEXT: mov r0, r112549; CHECK-NEXT: mov r1, r52550; CHECK-NEXT: str.w r10, [sp, #44] @ 4-byte Spill2551; CHECK-NEXT: bl __aeabi_dcmpgt2552; CHECK-NEXT: cmp r0, #02553; CHECK-NEXT: it ne2554; CHECK-NEXT: movne.w r4, #-12555; CHECK-NEXT: str r4, [r6, #4]2556; CHECK-NEXT: mov r5, r62557; CHECK-NEXT: str r6, [sp, #12] @ 4-byte Spill2558; CHECK-NEXT: mov r0, r112559; CHECK-NEXT: ldr r6, [sp, #40] @ 4-byte Reload2560; CHECK-NEXT: mov r2, r92561; CHECK-NEXT: mov r3, r72562; CHECK-NEXT: str.w r11, [sp, #24] @ 4-byte Spill2563; CHECK-NEXT: mov r1, r62564; CHECK-NEXT: bl __aeabi_dcmpge2565; CHECK-NEXT: ldr r1, [sp, #20] @ 4-byte Reload2566; CHECK-NEXT: cmp r0, #02567; CHECK-NEXT: mov r2, r102568; CHECK-NEXT: mov r3, r82569; CHECK-NEXT: csel r4, r1, r0, ne2570; CHECK-NEXT: mov r1, r62571; CHECK-NEXT: mov r0, r112572; CHECK-NEXT: mov r6, r82573; CHECK-NEXT: bl __aeabi_dcmpgt2574; CHECK-NEXT: vmov r8, r11, d92575; CHECK-NEXT: cmp r0, #02576; CHECK-NEXT: mov r2, r92577; CHECK-NEXT: mov r3, r72578; CHECK-NEXT: it ne2579; CHECK-NEXT: movne.w r4, #-12580; CHECK-NEXT: str r4, [r5]2581; CHECK-NEXT: mov r10, r92582; CHECK-NEXT: str.w r9, [sp, #32] @ 4-byte Spill2583; CHECK-NEXT: mov r5, r72584; CHECK-NEXT: mov r0, r82585; CHECK-NEXT: mov r1, r112586; CHECK-NEXT: bl __aeabi_dcmpge2587; CHECK-NEXT: mov r9, r02588; CHECK-NEXT: mov r0, r82589; CHECK-NEXT: mov r1, r112590; CHECK-NEXT: bl __fixunsdfti2591; CHECK-NEXT: ldr r4, [sp, #44] @ 4-byte Reload2592; CHECK-NEXT: cmp.w r9, #02593; CHECK-NEXT: strd r3, r0, [sp, #16] @ 8-byte Folded Spill2594; CHECK-NEXT: csel r7, r1, r9, ne2595; CHECK-NEXT: str r2, [sp, #8] @ 4-byte Spill2596; CHECK-NEXT: mov r0, r82597; CHECK-NEXT: mov r1, r112598; CHECK-NEXT: mov r2, r42599; CHECK-NEXT: mov r3, r62600; CHECK-NEXT: str r6, [sp, #4] @ 4-byte Spill2601; CHECK-NEXT: bl __aeabi_dcmpgt2602; CHECK-NEXT: cmp r0, #02603; CHECK-NEXT: mov r0, r82604; CHECK-NEXT: mov r1, r112605; CHECK-NEXT: mov r2, r102606; CHECK-NEXT: mov r3, r52607; CHECK-NEXT: it ne2608; CHECK-NEXT: movne.w r7, #-12609; CHECK-NEXT: bl __aeabi_dcmpge2610; CHECK-NEXT: ldr r1, [sp, #20] @ 4-byte Reload2611; CHECK-NEXT: cmp r0, #02612; CHECK-NEXT: mov r2, r42613; CHECK-NEXT: mov r3, r62614; CHECK-NEXT: csel r9, r1, r0, ne2615; CHECK-NEXT: mov r0, r82616; CHECK-NEXT: mov r1, r112617; CHECK-NEXT: bl __aeabi_dcmpgt2618; CHECK-NEXT: cmp r0, #02619; CHECK-NEXT: mov r0, r92620; CHECK-NEXT: it ne2621; CHECK-NEXT: movne.w r0, #-12622; CHECK-NEXT: ldr.w r9, [sp, #12] @ 4-byte Reload2623; CHECK-NEXT: str r0, [sp, #20] @ 4-byte Spill2624; CHECK-NEXT: lsrl r0, r7, #282625; CHECK-NEXT: mov r1, r112626; CHECK-NEXT: mov r3, r52627; CHECK-NEXT: str.w r0, [r9, #16]2628; CHECK-NEXT: mov r0, r82629; CHECK-NEXT: ldr r4, [sp, #32] @ 4-byte Reload2630; CHECK-NEXT: mov r2, r42631; CHECK-NEXT: bl __aeabi_dcmpge2632; CHECK-NEXT: ldr r6, [sp, #4] @ 4-byte Reload2633; CHECK-NEXT: cmp r0, #02634; CHECK-NEXT: ldr r1, [sp, #8] @ 4-byte Reload2635; CHECK-NEXT: ldr r2, [sp, #44] @ 4-byte Reload2636; CHECK-NEXT: csel r10, r1, r0, ne2637; CHECK-NEXT: mov r0, r82638; CHECK-NEXT: mov r1, r112639; CHECK-NEXT: mov r3, r62640; CHECK-NEXT: bl __aeabi_dcmpgt2641; CHECK-NEXT: cmp r0, #02642; CHECK-NEXT: it ne2643; CHECK-NEXT: movne.w r10, #-12644; CHECK-NEXT: orr.w r0, r7, r10, lsl #42645; CHECK-NEXT: str.w r0, [r9, #20]2646; CHECK-NEXT: mov r0, r82647; CHECK-NEXT: mov r1, r112648; CHECK-NEXT: mov r2, r42649; CHECK-NEXT: mov r3, r52650; CHECK-NEXT: bl __aeabi_dcmpge2651; CHECK-NEXT: ldr r5, [sp, #44] @ 4-byte Reload2652; CHECK-NEXT: cmp r0, #02653; CHECK-NEXT: ldr r1, [sp, #16] @ 4-byte Reload2654; CHECK-NEXT: mov r3, r62655; CHECK-NEXT: csel r7, r1, r0, ne2656; CHECK-NEXT: mov r0, r82657; CHECK-NEXT: mov r1, r112658; CHECK-NEXT: mov r2, r52659; CHECK-NEXT: mov r8, r62660; CHECK-NEXT: bl __aeabi_dcmpgt2661; CHECK-NEXT: cmp r0, #02662; CHECK-NEXT: it ne2663; CHECK-NEXT: movne r7, #152664; CHECK-NEXT: and r1, r7, #152665; CHECK-NEXT: lsrl r10, r1, #282666; CHECK-NEXT: strb.w r10, [r9, #24]2667; CHECK-NEXT: ldr r6, [sp, #24] @ 4-byte Reload2668; CHECK-NEXT: ldr r4, [sp, #40] @ 4-byte Reload2669; CHECK-NEXT: ldrd r2, r3, [sp, #32] @ 8-byte Folded Reload2670; CHECK-NEXT: mov r0, r62671; CHECK-NEXT: mov r1, r42672; CHECK-NEXT: bl __aeabi_dcmpge2673; CHECK-NEXT: ldr r1, [sp, #28] @ 4-byte Reload2674; CHECK-NEXT: cmp r0, #02675; CHECK-NEXT: mov r2, r52676; CHECK-NEXT: mov r3, r82677; CHECK-NEXT: csel r7, r1, r0, ne2678; CHECK-NEXT: mov r0, r62679; CHECK-NEXT: mov r1, r42680; CHECK-NEXT: bl __aeabi_dcmpgt2681; CHECK-NEXT: cmp r0, #02682; CHECK-NEXT: it ne2683; CHECK-NEXT: movne r7, #152684; CHECK-NEXT: ldr r1, [sp, #20] @ 4-byte Reload2685; CHECK-NEXT: and r0, r7, #152686; CHECK-NEXT: orr.w r0, r0, r1, lsl #42687; CHECK-NEXT: str.w r0, [r9, #12]2688; CHECK-NEXT: add sp, #482689; CHECK-NEXT: vpop {d8, d9}2690; CHECK-NEXT: add sp, #42691; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}2692; CHECK-NEXT: .p2align 32693; CHECK-NEXT: @ %bb.1:2694; CHECK-NEXT: .LCPI40_0:2695; CHECK-NEXT: .long 0 @ double 02696; CHECK-NEXT: .long 02697; CHECK-NEXT: .LCPI40_1:2698; CHECK-NEXT: .long 4294967295 @ double 1.2676506002282293E+302699; CHECK-NEXT: .long 11775508472700 %x = call <2 x i100> @llvm.fptoui.sat.v2f64.v2i100(<2 x double> %f)2701 ret <2 x i100> %x2702}2703 2704define arm_aapcs_vfpcc <2 x i128> @test_unsigned_v2f64_v2i128(<2 x double> %f) {2705; CHECK-LABEL: test_unsigned_v2f64_v2i128:2706; CHECK: @ %bb.0:2707; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}2708; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}2709; CHECK-NEXT: .pad #42710; CHECK-NEXT: sub sp, #42711; CHECK-NEXT: .vsave {d8, d9}2712; CHECK-NEXT: vpush {d8, d9}2713; CHECK-NEXT: .pad #242714; CHECK-NEXT: sub sp, #242715; CHECK-NEXT: vmov q4, q02716; CHECK-NEXT: vldr d0, .LCPI41_02717; CHECK-NEXT: vmov r8, r7, d92718; CHECK-NEXT: mov r4, r02719; CHECK-NEXT: vmov r2, r9, d02720; CHECK-NEXT: mov r0, r82721; CHECK-NEXT: mov r1, r72722; CHECK-NEXT: mov r3, r92723; CHECK-NEXT: mov r11, r22724; CHECK-NEXT: bl __aeabi_dcmpge2725; CHECK-NEXT: mov r6, r02726; CHECK-NEXT: mov r0, r82727; CHECK-NEXT: mov r1, r72728; CHECK-NEXT: bl __fixunsdfti2729; CHECK-NEXT: vldr d0, .LCPI41_12730; CHECK-NEXT: cmp r6, #02731; CHECK-NEXT: strd r1, r0, [sp, #8] @ 8-byte Folded Spill2732; CHECK-NEXT: csel r6, r3, r6, ne2733; CHECK-NEXT: vmov r10, r5, d02734; CHECK-NEXT: str r2, [sp] @ 4-byte Spill2735; CHECK-NEXT: mov r0, r82736; CHECK-NEXT: mov r1, r72737; CHECK-NEXT: str r5, [sp, #16] @ 4-byte Spill2738; CHECK-NEXT: mov r2, r102739; CHECK-NEXT: mov r3, r52740; CHECK-NEXT: bl __aeabi_dcmpgt2741; CHECK-NEXT: cmp r0, #02742; CHECK-NEXT: mov r0, r82743; CHECK-NEXT: mov r1, r72744; CHECK-NEXT: mov r2, r112745; CHECK-NEXT: mov r3, r92746; CHECK-NEXT: it ne2747; CHECK-NEXT: movne.w r6, #-12748; CHECK-NEXT: str r6, [r4, #28]2749; CHECK-NEXT: str.w r11, [sp, #20] @ 4-byte Spill2750; CHECK-NEXT: bl __aeabi_dcmpge2751; CHECK-NEXT: ldr r6, [sp, #16] @ 4-byte Reload2752; CHECK-NEXT: cmp r0, #02753; CHECK-NEXT: ldr r1, [sp] @ 4-byte Reload2754; CHECK-NEXT: mov r2, r102755; CHECK-NEXT: csel r5, r1, r0, ne2756; CHECK-NEXT: mov r0, r82757; CHECK-NEXT: mov r1, r72758; CHECK-NEXT: mov r3, r62759; CHECK-NEXT: bl __aeabi_dcmpgt2760; CHECK-NEXT: cmp r0, #02761; CHECK-NEXT: it ne2762; CHECK-NEXT: movne.w r5, #-12763; CHECK-NEXT: mov r0, r82764; CHECK-NEXT: mov r1, r72765; CHECK-NEXT: mov r2, r112766; CHECK-NEXT: mov r3, r92767; CHECK-NEXT: str r5, [r4, #24]2768; CHECK-NEXT: mov r5, r42769; CHECK-NEXT: mov r4, r92770; CHECK-NEXT: bl __aeabi_dcmpge2771; CHECK-NEXT: ldr r1, [sp, #8] @ 4-byte Reload2772; CHECK-NEXT: cmp r0, #02773; CHECK-NEXT: mov r2, r102774; CHECK-NEXT: mov r3, r62775; CHECK-NEXT: csel r9, r1, r0, ne2776; CHECK-NEXT: mov r0, r82777; CHECK-NEXT: mov r1, r72778; CHECK-NEXT: bl __aeabi_dcmpgt2779; CHECK-NEXT: cmp r0, #02780; CHECK-NEXT: it ne2781; CHECK-NEXT: movne.w r9, #-12782; CHECK-NEXT: str r5, [sp, #4] @ 4-byte Spill2783; CHECK-NEXT: mov r0, r82784; CHECK-NEXT: str.w r9, [r5, #20]2785; CHECK-NEXT: mov r1, r72786; CHECK-NEXT: ldr r2, [sp, #20] @ 4-byte Reload2787; CHECK-NEXT: mov r3, r42788; CHECK-NEXT: vmov r6, r11, d82789; CHECK-NEXT: mov r9, r42790; CHECK-NEXT: bl __aeabi_dcmpge2791; CHECK-NEXT: ldr r1, [sp, #12] @ 4-byte Reload2792; CHECK-NEXT: cmp r0, #02793; CHECK-NEXT: mov r2, r102794; CHECK-NEXT: csel r4, r1, r0, ne2795; CHECK-NEXT: mov r1, r72796; CHECK-NEXT: ldr r7, [sp, #16] @ 4-byte Reload2797; CHECK-NEXT: mov r0, r82798; CHECK-NEXT: mov r3, r72799; CHECK-NEXT: bl __aeabi_dcmpgt2800; CHECK-NEXT: cmp r0, #02801; CHECK-NEXT: it ne2802; CHECK-NEXT: movne.w r4, #-12803; CHECK-NEXT: str r4, [r5, #16]2804; CHECK-NEXT: mov r0, r62805; CHECK-NEXT: ldr r5, [sp, #20] @ 4-byte Reload2806; CHECK-NEXT: mov r1, r112807; CHECK-NEXT: mov r3, r92808; CHECK-NEXT: mov r2, r52809; CHECK-NEXT: bl __aeabi_dcmpge2810; CHECK-NEXT: mov r8, r02811; CHECK-NEXT: mov r0, r62812; CHECK-NEXT: mov r1, r112813; CHECK-NEXT: bl __fixunsdfti2814; CHECK-NEXT: cmp.w r8, #02815; CHECK-NEXT: strd r1, r0, [sp, #8] @ 8-byte Folded Spill2816; CHECK-NEXT: csel r4, r3, r8, ne2817; CHECK-NEXT: str r2, [sp] @ 4-byte Spill2818; CHECK-NEXT: mov r0, r62819; CHECK-NEXT: mov r1, r112820; CHECK-NEXT: mov r2, r102821; CHECK-NEXT: mov r3, r72822; CHECK-NEXT: mov r8, r72823; CHECK-NEXT: bl __aeabi_dcmpgt2824; CHECK-NEXT: cmp r0, #02825; CHECK-NEXT: it ne2826; CHECK-NEXT: movne.w r4, #-12827; CHECK-NEXT: ldr r7, [sp, #4] @ 4-byte Reload2828; CHECK-NEXT: mov r0, r62829; CHECK-NEXT: mov r1, r112830; CHECK-NEXT: mov r2, r52831; CHECK-NEXT: mov r3, r92832; CHECK-NEXT: str r4, [r7, #12]2833; CHECK-NEXT: bl __aeabi_dcmpge2834; CHECK-NEXT: ldr r1, [sp] @ 4-byte Reload2835; CHECK-NEXT: cmp r0, #02836; CHECK-NEXT: mov r2, r102837; CHECK-NEXT: mov r3, r82838; CHECK-NEXT: csel r4, r1, r0, ne2839; CHECK-NEXT: mov r0, r62840; CHECK-NEXT: mov r1, r112841; CHECK-NEXT: bl __aeabi_dcmpgt2842; CHECK-NEXT: cmp r0, #02843; CHECK-NEXT: mov r0, r62844; CHECK-NEXT: mov r1, r112845; CHECK-NEXT: mov r2, r52846; CHECK-NEXT: mov r3, r92847; CHECK-NEXT: it ne2848; CHECK-NEXT: movne.w r4, #-12849; CHECK-NEXT: str r4, [r7, #8]2850; CHECK-NEXT: bl __aeabi_dcmpge2851; CHECK-NEXT: ldr r1, [sp, #8] @ 4-byte Reload2852; CHECK-NEXT: cmp r0, #02853; CHECK-NEXT: mov r2, r102854; CHECK-NEXT: mov r3, r82855; CHECK-NEXT: csel r4, r1, r0, ne2856; CHECK-NEXT: mov r0, r62857; CHECK-NEXT: mov r1, r112858; CHECK-NEXT: bl __aeabi_dcmpgt2859; CHECK-NEXT: cmp r0, #02860; CHECK-NEXT: mov r0, r62861; CHECK-NEXT: mov r1, r112862; CHECK-NEXT: mov r2, r52863; CHECK-NEXT: mov r3, r92864; CHECK-NEXT: it ne2865; CHECK-NEXT: movne.w r4, #-12866; CHECK-NEXT: str r4, [r7, #4]2867; CHECK-NEXT: bl __aeabi_dcmpge2868; CHECK-NEXT: ldr r1, [sp, #12] @ 4-byte Reload2869; CHECK-NEXT: cmp r0, #02870; CHECK-NEXT: mov r2, r102871; CHECK-NEXT: mov r3, r82872; CHECK-NEXT: csel r4, r1, r0, ne2873; CHECK-NEXT: mov r0, r62874; CHECK-NEXT: mov r1, r112875; CHECK-NEXT: bl __aeabi_dcmpgt2876; CHECK-NEXT: cmp r0, #02877; CHECK-NEXT: it ne2878; CHECK-NEXT: movne.w r4, #-12879; CHECK-NEXT: str r4, [r7]2880; CHECK-NEXT: add sp, #242881; CHECK-NEXT: vpop {d8, d9}2882; CHECK-NEXT: add sp, #42883; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}2884; CHECK-NEXT: .p2align 32885; CHECK-NEXT: @ %bb.1:2886; CHECK-NEXT: .LCPI41_0:2887; CHECK-NEXT: .long 0 @ double 02888; CHECK-NEXT: .long 02889; CHECK-NEXT: .LCPI41_1:2890; CHECK-NEXT: .long 4294967295 @ double 3.4028236692093843E+382891; CHECK-NEXT: .long 12069109752892 %x = call <2 x i128> @llvm.fptoui.sat.v2f64.v2i128(<2 x double> %f)2893 ret <2 x i128> %x2894}2895 2896;2897; 4-Vector half to signed integer -- result size variation2898;2899 2900declare <8 x i1> @llvm.fptoui.sat.v8f16.v8i1 (<8 x half>)2901declare <8 x i8> @llvm.fptoui.sat.v8f16.v8i8 (<8 x half>)2902declare <8 x i13> @llvm.fptoui.sat.v8f16.v8i13 (<8 x half>)2903declare <8 x i16> @llvm.fptoui.sat.v8f16.v8i16 (<8 x half>)2904declare <8 x i19> @llvm.fptoui.sat.v8f16.v8i19 (<8 x half>)2905declare <8 x i50> @llvm.fptoui.sat.v8f16.v8i50 (<8 x half>)2906declare <8 x i64> @llvm.fptoui.sat.v8f16.v8i64 (<8 x half>)2907declare <8 x i100> @llvm.fptoui.sat.v8f16.v8i100(<8 x half>)2908declare <8 x i128> @llvm.fptoui.sat.v8f16.v8i128(<8 x half>)2909 2910define arm_aapcs_vfpcc <8 x i1> @test_unsigned_v8f16_v8i1(<8 x half> %f) {2911; CHECK-LABEL: test_unsigned_v8f16_v8i1:2912; CHECK: @ %bb.0:2913; CHECK-NEXT: vldr s4, .LCPI42_02914; CHECK-NEXT: vcvtt.f32.f16 s8, s32915; CHECK-NEXT: vcvtb.f32.f16 s10, s32916; CHECK-NEXT: vcvtb.f32.f16 s3, s02917; CHECK-NEXT: vmov.f32 s6, #1.000000e+002918; CHECK-NEXT: vmaxnm.f32 s3, s3, s42919; CHECK-NEXT: vminnm.f32 s3, s3, s62920; CHECK-NEXT: vcvtt.f32.f16 s0, s02921; CHECK-NEXT: vcvt.u32.f32 s3, s32922; CHECK-NEXT: vmaxnm.f32 s0, s0, s42923; CHECK-NEXT: vminnm.f32 s0, s0, s62924; CHECK-NEXT: movs r1, #02925; CHECK-NEXT: vcvt.u32.f32 s0, s02926; CHECK-NEXT: vcvtt.f32.f16 s14, s12927; CHECK-NEXT: vcvtb.f32.f16 s1, s12928; CHECK-NEXT: vmaxnm.f32 s14, s14, s42929; CHECK-NEXT: vmaxnm.f32 s1, s1, s42930; CHECK-NEXT: vminnm.f32 s14, s14, s62931; CHECK-NEXT: vminnm.f32 s1, s1, s62932; CHECK-NEXT: vcvt.u32.f32 s14, s142933; CHECK-NEXT: vcvt.u32.f32 s1, s12934; CHECK-NEXT: vcvtt.f32.f16 s12, s22935; CHECK-NEXT: vmov r2, s32936; CHECK-NEXT: vcvtb.f32.f16 s2, s22937; CHECK-NEXT: vmaxnm.f32 s2, s2, s42938; CHECK-NEXT: vmaxnm.f32 s12, s12, s42939; CHECK-NEXT: vminnm.f32 s2, s2, s62940; CHECK-NEXT: vminnm.f32 s12, s12, s62941; CHECK-NEXT: vcvt.u32.f32 s2, s22942; CHECK-NEXT: vmaxnm.f32 s10, s10, s42943; CHECK-NEXT: vcvt.u32.f32 s12, s122944; CHECK-NEXT: vminnm.f32 s10, s10, s62945; CHECK-NEXT: vcvt.u32.f32 s10, s102946; CHECK-NEXT: vmaxnm.f32 s8, s8, s42947; CHECK-NEXT: vminnm.f32 s8, s8, s62948; CHECK-NEXT: vcvt.u32.f32 s8, s82949; CHECK-NEXT: and r2, r2, #12950; CHECK-NEXT: rsbs r2, r2, #02951; CHECK-NEXT: bfi r1, r2, #0, #12952; CHECK-NEXT: vmov r2, s02953; CHECK-NEXT: and r2, r2, #12954; CHECK-NEXT: rsbs r2, r2, #02955; CHECK-NEXT: bfi r1, r2, #1, #12956; CHECK-NEXT: vmov r2, s12957; CHECK-NEXT: and r2, r2, #12958; CHECK-NEXT: rsbs r2, r2, #02959; CHECK-NEXT: bfi r1, r2, #2, #12960; CHECK-NEXT: vmov r2, s142961; CHECK-NEXT: and r2, r2, #12962; CHECK-NEXT: rsbs r2, r2, #02963; CHECK-NEXT: bfi r1, r2, #3, #12964; CHECK-NEXT: vmov r2, s22965; CHECK-NEXT: and r2, r2, #12966; CHECK-NEXT: rsbs r2, r2, #02967; CHECK-NEXT: bfi r1, r2, #4, #12968; CHECK-NEXT: vmov r2, s122969; CHECK-NEXT: and r2, r2, #12970; CHECK-NEXT: rsbs r2, r2, #02971; CHECK-NEXT: bfi r1, r2, #5, #12972; CHECK-NEXT: vmov r2, s102973; CHECK-NEXT: and r2, r2, #12974; CHECK-NEXT: rsbs r2, r2, #02975; CHECK-NEXT: bfi r1, r2, #6, #12976; CHECK-NEXT: vmov r2, s82977; CHECK-NEXT: and r2, r2, #12978; CHECK-NEXT: rsbs r2, r2, #02979; CHECK-NEXT: bfi r1, r2, #7, #12980; CHECK-NEXT: strb r1, [r0]2981; CHECK-NEXT: bx lr2982; CHECK-NEXT: .p2align 22983; CHECK-NEXT: @ %bb.1:2984; CHECK-NEXT: .LCPI42_0:2985; CHECK-NEXT: .long 0x00000000 @ float 02986 %x = call <8 x i1> @llvm.fptoui.sat.v8f16.v8i1(<8 x half> %f)2987 ret <8 x i1> %x2988}2989 2990define arm_aapcs_vfpcc <8 x i8> @test_unsigned_v8f16_v8i8(<8 x half> %f) {2991; CHECK-MVE-LABEL: test_unsigned_v8f16_v8i8:2992; CHECK-MVE: @ %bb.0:2993; CHECK-MVE-NEXT: vldr s6, .LCPI43_12994; CHECK-MVE-NEXT: vcvtt.f32.f16 s10, s22995; CHECK-MVE-NEXT: vcvtb.f32.f16 s2, s22996; CHECK-MVE-NEXT: vldr s4, .LCPI43_02997; CHECK-MVE-NEXT: vmaxnm.f32 s2, s2, s62998; CHECK-MVE-NEXT: vcvtt.f32.f16 s8, s32999; CHECK-MVE-NEXT: vminnm.f32 s2, s2, s43000; CHECK-MVE-NEXT: vcvtb.f32.f16 s12, s33001; CHECK-MVE-NEXT: vcvt.u32.f32 s5, s23002; CHECK-MVE-NEXT: vcvtt.f32.f16 s2, s03003; CHECK-MVE-NEXT: vmaxnm.f32 s2, s2, s63004; CHECK-MVE-NEXT: vcvtb.f32.f16 s0, s03005; CHECK-MVE-NEXT: vmaxnm.f32 s0, s0, s63006; CHECK-MVE-NEXT: vminnm.f32 s2, s2, s43007; CHECK-MVE-NEXT: vminnm.f32 s0, s0, s43008; CHECK-MVE-NEXT: vcvt.u32.f32 s7, s23009; CHECK-MVE-NEXT: vcvtb.f32.f16 s2, s13010; CHECK-MVE-NEXT: vcvtt.f32.f16 s14, s13011; CHECK-MVE-NEXT: vmaxnm.f32 s2, s2, s63012; CHECK-MVE-NEXT: vcvt.u32.f32 s0, s03013; CHECK-MVE-NEXT: vmaxnm.f32 s8, s8, s63014; CHECK-MVE-NEXT: vmaxnm.f32 s10, s10, s63015; CHECK-MVE-NEXT: vmaxnm.f32 s12, s12, s63016; CHECK-MVE-NEXT: vmaxnm.f32 s14, s14, s63017; CHECK-MVE-NEXT: vminnm.f32 s2, s2, s43018; CHECK-MVE-NEXT: vminnm.f32 s8, s8, s43019; CHECK-MVE-NEXT: vminnm.f32 s10, s10, s43020; CHECK-MVE-NEXT: vminnm.f32 s12, s12, s43021; CHECK-MVE-NEXT: vminnm.f32 s14, s14, s43022; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s23023; CHECK-MVE-NEXT: vcvt.u32.f32 s14, s143024; CHECK-MVE-NEXT: vcvt.u32.f32 s10, s103025; CHECK-MVE-NEXT: vcvt.u32.f32 s12, s123026; CHECK-MVE-NEXT: vmov r0, s03027; CHECK-MVE-NEXT: vcvt.u32.f32 s8, s83028; CHECK-MVE-NEXT: vmov.16 q0[0], r03029; CHECK-MVE-NEXT: vmov r0, s73030; CHECK-MVE-NEXT: vmov.16 q0[1], r03031; CHECK-MVE-NEXT: vmov r0, s43032; CHECK-MVE-NEXT: vmov.16 q0[2], r03033; CHECK-MVE-NEXT: vmov r0, s143034; CHECK-MVE-NEXT: vmov.16 q0[3], r03035; CHECK-MVE-NEXT: vmov r0, s53036; CHECK-MVE-NEXT: vmov.16 q0[4], r03037; CHECK-MVE-NEXT: vmov r0, s103038; CHECK-MVE-NEXT: vmov.16 q0[5], r03039; CHECK-MVE-NEXT: vmov r0, s123040; CHECK-MVE-NEXT: vmov.16 q0[6], r03041; CHECK-MVE-NEXT: vmov r0, s83042; CHECK-MVE-NEXT: vmov.16 q0[7], r03043; CHECK-MVE-NEXT: bx lr3044; CHECK-MVE-NEXT: .p2align 23045; CHECK-MVE-NEXT: @ %bb.1:3046; CHECK-MVE-NEXT: .LCPI43_0:3047; CHECK-MVE-NEXT: .long 0x437f0000 @ float 2553048; CHECK-MVE-NEXT: .LCPI43_1:3049; CHECK-MVE-NEXT: .long 0x00000000 @ float 03050;3051; CHECK-MVEFP-LABEL: test_unsigned_v8f16_v8i8:3052; CHECK-MVEFP: @ %bb.0:3053; CHECK-MVEFP-NEXT: vcvt.u16.f16 q0, q03054; CHECK-MVEFP-NEXT: vqmovnb.u16 q0, q03055; CHECK-MVEFP-NEXT: vmovlb.u8 q0, q03056; CHECK-MVEFP-NEXT: bx lr3057 %x = call <8 x i8> @llvm.fptoui.sat.v8f16.v8i8(<8 x half> %f)3058 ret <8 x i8> %x3059}3060 3061define arm_aapcs_vfpcc <8 x i13> @test_unsigned_v8f16_v8i13(<8 x half> %f) {3062; CHECK-MVE-LABEL: test_unsigned_v8f16_v8i13:3063; CHECK-MVE: @ %bb.0:3064; CHECK-MVE-NEXT: vldr s6, .LCPI44_13065; CHECK-MVE-NEXT: vcvtt.f32.f16 s10, s23066; CHECK-MVE-NEXT: vcvtb.f32.f16 s2, s23067; CHECK-MVE-NEXT: vldr s4, .LCPI44_03068; CHECK-MVE-NEXT: vmaxnm.f32 s2, s2, s63069; CHECK-MVE-NEXT: vcvtt.f32.f16 s8, s33070; CHECK-MVE-NEXT: vminnm.f32 s2, s2, s43071; CHECK-MVE-NEXT: vcvtb.f32.f16 s12, s33072; CHECK-MVE-NEXT: vcvt.u32.f32 s5, s23073; CHECK-MVE-NEXT: vcvtt.f32.f16 s2, s03074; CHECK-MVE-NEXT: vmaxnm.f32 s2, s2, s63075; CHECK-MVE-NEXT: vcvtb.f32.f16 s0, s03076; CHECK-MVE-NEXT: vmaxnm.f32 s0, s0, s63077; CHECK-MVE-NEXT: vminnm.f32 s2, s2, s43078; CHECK-MVE-NEXT: vminnm.f32 s0, s0, s43079; CHECK-MVE-NEXT: vcvt.u32.f32 s7, s23080; CHECK-MVE-NEXT: vcvtb.f32.f16 s2, s13081; CHECK-MVE-NEXT: vcvtt.f32.f16 s14, s13082; CHECK-MVE-NEXT: vmaxnm.f32 s2, s2, s63083; CHECK-MVE-NEXT: vcvt.u32.f32 s0, s03084; CHECK-MVE-NEXT: vmaxnm.f32 s8, s8, s63085; CHECK-MVE-NEXT: vmaxnm.f32 s10, s10, s63086; CHECK-MVE-NEXT: vmaxnm.f32 s12, s12, s63087; CHECK-MVE-NEXT: vmaxnm.f32 s14, s14, s63088; CHECK-MVE-NEXT: vminnm.f32 s2, s2, s43089; CHECK-MVE-NEXT: vminnm.f32 s8, s8, s43090; CHECK-MVE-NEXT: vminnm.f32 s10, s10, s43091; CHECK-MVE-NEXT: vminnm.f32 s12, s12, s43092; CHECK-MVE-NEXT: vminnm.f32 s14, s14, s43093; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s23094; CHECK-MVE-NEXT: vcvt.u32.f32 s14, s143095; CHECK-MVE-NEXT: vcvt.u32.f32 s10, s103096; CHECK-MVE-NEXT: vcvt.u32.f32 s12, s123097; CHECK-MVE-NEXT: vmov r0, s03098; CHECK-MVE-NEXT: vcvt.u32.f32 s8, s83099; CHECK-MVE-NEXT: vmov.16 q0[0], r03100; CHECK-MVE-NEXT: vmov r0, s73101; CHECK-MVE-NEXT: vmov.16 q0[1], r03102; CHECK-MVE-NEXT: vmov r0, s43103; CHECK-MVE-NEXT: vmov.16 q0[2], r03104; CHECK-MVE-NEXT: vmov r0, s143105; CHECK-MVE-NEXT: vmov.16 q0[3], r03106; CHECK-MVE-NEXT: vmov r0, s53107; CHECK-MVE-NEXT: vmov.16 q0[4], r03108; CHECK-MVE-NEXT: vmov r0, s103109; CHECK-MVE-NEXT: vmov.16 q0[5], r03110; CHECK-MVE-NEXT: vmov r0, s123111; CHECK-MVE-NEXT: vmov.16 q0[6], r03112; CHECK-MVE-NEXT: vmov r0, s83113; CHECK-MVE-NEXT: vmov.16 q0[7], r03114; CHECK-MVE-NEXT: bx lr3115; CHECK-MVE-NEXT: .p2align 23116; CHECK-MVE-NEXT: @ %bb.1:3117; CHECK-MVE-NEXT: .LCPI44_0:3118; CHECK-MVE-NEXT: .long 0x45fff800 @ float 81913119; CHECK-MVE-NEXT: .LCPI44_1:3120; CHECK-MVE-NEXT: .long 0x00000000 @ float 03121;3122; CHECK-MVEFP-LABEL: test_unsigned_v8f16_v8i13:3123; CHECK-MVEFP: @ %bb.0:3124; CHECK-MVEFP-NEXT: vmvn.i16 q1, #0xe0003125; CHECK-MVEFP-NEXT: vcvt.u16.f16 q0, q03126; CHECK-MVEFP-NEXT: vmin.u16 q0, q0, q13127; CHECK-MVEFP-NEXT: bx lr3128 %x = call <8 x i13> @llvm.fptoui.sat.v8f16.v8i13(<8 x half> %f)3129 ret <8 x i13> %x3130}3131 3132define arm_aapcs_vfpcc <8 x i16> @test_unsigned_v8f16_v8i16(<8 x half> %f) {3133; CHECK-MVE-LABEL: test_unsigned_v8f16_v8i16:3134; CHECK-MVE: @ %bb.0:3135; CHECK-MVE-NEXT: vldr s6, .LCPI45_13136; CHECK-MVE-NEXT: vcvtt.f32.f16 s10, s23137; CHECK-MVE-NEXT: vcvtb.f32.f16 s2, s23138; CHECK-MVE-NEXT: vldr s4, .LCPI45_03139; CHECK-MVE-NEXT: vmaxnm.f32 s2, s2, s63140; CHECK-MVE-NEXT: vcvtt.f32.f16 s8, s33141; CHECK-MVE-NEXT: vminnm.f32 s2, s2, s43142; CHECK-MVE-NEXT: vcvtb.f32.f16 s12, s33143; CHECK-MVE-NEXT: vcvt.u32.f32 s5, s23144; CHECK-MVE-NEXT: vcvtt.f32.f16 s2, s03145; CHECK-MVE-NEXT: vmaxnm.f32 s2, s2, s63146; CHECK-MVE-NEXT: vcvtb.f32.f16 s0, s03147; CHECK-MVE-NEXT: vmaxnm.f32 s0, s0, s63148; CHECK-MVE-NEXT: vminnm.f32 s2, s2, s43149; CHECK-MVE-NEXT: vminnm.f32 s0, s0, s43150; CHECK-MVE-NEXT: vcvt.u32.f32 s7, s23151; CHECK-MVE-NEXT: vcvtb.f32.f16 s2, s13152; CHECK-MVE-NEXT: vcvtt.f32.f16 s14, s13153; CHECK-MVE-NEXT: vmaxnm.f32 s2, s2, s63154; CHECK-MVE-NEXT: vcvt.u32.f32 s0, s03155; CHECK-MVE-NEXT: vmaxnm.f32 s8, s8, s63156; CHECK-MVE-NEXT: vmaxnm.f32 s10, s10, s63157; CHECK-MVE-NEXT: vmaxnm.f32 s12, s12, s63158; CHECK-MVE-NEXT: vmaxnm.f32 s14, s14, s63159; CHECK-MVE-NEXT: vminnm.f32 s2, s2, s43160; CHECK-MVE-NEXT: vminnm.f32 s8, s8, s43161; CHECK-MVE-NEXT: vminnm.f32 s10, s10, s43162; CHECK-MVE-NEXT: vminnm.f32 s12, s12, s43163; CHECK-MVE-NEXT: vminnm.f32 s14, s14, s43164; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s23165; CHECK-MVE-NEXT: vcvt.u32.f32 s14, s143166; CHECK-MVE-NEXT: vcvt.u32.f32 s10, s103167; CHECK-MVE-NEXT: vcvt.u32.f32 s12, s123168; CHECK-MVE-NEXT: vmov r0, s03169; CHECK-MVE-NEXT: vcvt.u32.f32 s8, s83170; CHECK-MVE-NEXT: vmov.16 q0[0], r03171; CHECK-MVE-NEXT: vmov r0, s73172; CHECK-MVE-NEXT: vmov.16 q0[1], r03173; CHECK-MVE-NEXT: vmov r0, s43174; CHECK-MVE-NEXT: vmov.16 q0[2], r03175; CHECK-MVE-NEXT: vmov r0, s143176; CHECK-MVE-NEXT: vmov.16 q0[3], r03177; CHECK-MVE-NEXT: vmov r0, s53178; CHECK-MVE-NEXT: vmov.16 q0[4], r03179; CHECK-MVE-NEXT: vmov r0, s103180; CHECK-MVE-NEXT: vmov.16 q0[5], r03181; CHECK-MVE-NEXT: vmov r0, s123182; CHECK-MVE-NEXT: vmov.16 q0[6], r03183; CHECK-MVE-NEXT: vmov r0, s83184; CHECK-MVE-NEXT: vmov.16 q0[7], r03185; CHECK-MVE-NEXT: bx lr3186; CHECK-MVE-NEXT: .p2align 23187; CHECK-MVE-NEXT: @ %bb.1:3188; CHECK-MVE-NEXT: .LCPI45_0:3189; CHECK-MVE-NEXT: .long 0x477fff00 @ float 655353190; CHECK-MVE-NEXT: .LCPI45_1:3191; CHECK-MVE-NEXT: .long 0x00000000 @ float 03192;3193; CHECK-MVEFP-LABEL: test_unsigned_v8f16_v8i16:3194; CHECK-MVEFP: @ %bb.0:3195; CHECK-MVEFP-NEXT: vcvt.u16.f16 q0, q03196; CHECK-MVEFP-NEXT: bx lr3197 %x = call <8 x i16> @llvm.fptoui.sat.v8f16.v8i16(<8 x half> %f)3198 ret <8 x i16> %x3199}3200 3201define arm_aapcs_vfpcc <8 x i19> @test_unsigned_v8f16_v8i19(<8 x half> %f) {3202; CHECK-LABEL: test_unsigned_v8f16_v8i19:3203; CHECK: @ %bb.0:3204; CHECK-NEXT: .save {r4, r5, r6, r7, r9, r11, lr}3205; CHECK-NEXT: push.w {r4, r5, r6, r7, r9, r11, lr}3206; CHECK-NEXT: vldr s4, .LCPI46_03207; CHECK-NEXT: vcvtb.f32.f16 s14, s13208; CHECK-NEXT: vldr s6, .LCPI46_13209; CHECK-NEXT: vcvtt.f32.f16 s12, s13210; CHECK-NEXT: vmaxnm.f32 s14, s14, s43211; CHECK-NEXT: vmaxnm.f32 s12, s12, s43212; CHECK-NEXT: vminnm.f32 s14, s14, s63213; CHECK-NEXT: vminnm.f32 s12, s12, s63214; CHECK-NEXT: vcvt.u32.f32 s14, s143215; CHECK-NEXT: vcvtb.f32.f16 s10, s03216; CHECK-NEXT: vcvt.u32.f32 s12, s123217; CHECK-NEXT: vcvtt.f32.f16 s0, s03218; CHECK-NEXT: vmaxnm.f32 s0, s0, s43219; CHECK-NEXT: vmaxnm.f32 s10, s10, s43220; CHECK-NEXT: vminnm.f32 s0, s0, s63221; CHECK-NEXT: vminnm.f32 s10, s10, s63222; CHECK-NEXT: vcvt.u32.f32 s0, s03223; CHECK-NEXT: movs r1, #03224; CHECK-NEXT: vcvt.u32.f32 s10, s103225; CHECK-NEXT: vcvtt.f32.f16 s8, s23226; CHECK-NEXT: vcvtb.f32.f16 s2, s23227; CHECK-NEXT: vmaxnm.f32 s8, s8, s43228; CHECK-NEXT: vmov r2, s143229; CHECK-NEXT: vmaxnm.f32 s2, s2, s43230; CHECK-NEXT: vmov r4, s123231; CHECK-NEXT: vminnm.f32 s2, s2, s63232; CHECK-NEXT: vcvt.u32.f32 s2, s23233; CHECK-NEXT: vminnm.f32 s8, s8, s63234; CHECK-NEXT: vcvt.u32.f32 s8, s83235; CHECK-NEXT: mov.w r11, #03236; CHECK-NEXT: vmov r12, s03237; CHECK-NEXT: vcvtt.f32.f16 s0, s33238; CHECK-NEXT: lsll r12, r1, #193239; CHECK-NEXT: vmaxnm.f32 s0, s0, s43240; CHECK-NEXT: vminnm.f32 s0, s0, s63241; CHECK-NEXT: movs r5, #03242; CHECK-NEXT: vcvt.u32.f32 s0, s03243; CHECK-NEXT: movs r7, #03244; CHECK-NEXT: mov.w r9, #03245; CHECK-NEXT: movs r3, #03246; CHECK-NEXT: orr.w r1, r1, r2, lsl #63247; CHECK-NEXT: lsrl r2, r5, #263248; CHECK-NEXT: orr.w r1, r1, r4, lsl #253249; CHECK-NEXT: str r1, [r0, #4]3250; CHECK-NEXT: vmov r1, s103251; CHECK-NEXT: lsrl r4, r11, #73252; CHECK-NEXT: orr.w r1, r1, r123253; CHECK-NEXT: str r1, [r0]3254; CHECK-NEXT: orr.w r1, r2, r43255; CHECK-NEXT: vmov r2, s23256; CHECK-NEXT: lsll r2, r7, #123257; CHECK-NEXT: vmov r4, s83258; CHECK-NEXT: orrs r2, r13259; CHECK-NEXT: movs r1, #03260; CHECK-NEXT: lsll r4, r1, #313261; CHECK-NEXT: orr.w r12, r2, r43262; CHECK-NEXT: vmov r4, s03263; CHECK-NEXT: vcvtb.f32.f16 s0, s33264; CHECK-NEXT: lsll r4, r3, #53265; CHECK-NEXT: vmaxnm.f32 s0, s0, s43266; CHECK-NEXT: vminnm.f32 s0, s0, s63267; CHECK-NEXT: vcvt.u32.f32 s0, s03268; CHECK-NEXT: vmov r2, s03269; CHECK-NEXT: mov r6, r23270; CHECK-NEXT: lsrl r6, r9, #143271; CHECK-NEXT: orr.w r3, r6, r43272; CHECK-NEXT: strh r3, [r0, #16]3273; CHECK-NEXT: str.w r12, [r0, #8]3274; CHECK-NEXT: lsrs r3, r3, #163275; CHECK-NEXT: strb r3, [r0, #18]3276; CHECK-NEXT: orr.w r3, r5, r113277; CHECK-NEXT: orrs r3, r73278; CHECK-NEXT: orrs r1, r33279; CHECK-NEXT: orr.w r1, r1, r2, lsl #183280; CHECK-NEXT: str r1, [r0, #12]3281; CHECK-NEXT: pop.w {r4, r5, r6, r7, r9, r11, pc}3282; CHECK-NEXT: .p2align 23283; CHECK-NEXT: @ %bb.1:3284; CHECK-NEXT: .LCPI46_0:3285; CHECK-NEXT: .long 0x00000000 @ float 03286; CHECK-NEXT: .LCPI46_1:3287; CHECK-NEXT: .long 0x48ffffe0 @ float 5242873288 %x = call <8 x i19> @llvm.fptoui.sat.v8f16.v8i19(<8 x half> %f)3289 ret <8 x i19> %x3290}3291 3292define arm_aapcs_vfpcc <8 x i32> @test_unsigned_v8f16_v8i32_duplicate(<8 x half> %f) {3293; CHECK-LABEL: test_unsigned_v8f16_v8i32_duplicate:3294; CHECK: @ %bb.0:3295; CHECK-NEXT: vmovx.f16 s4, s33296; CHECK-NEXT: vmovx.f16 s6, s03297; CHECK-NEXT: vcvt.u32.f16 s8, s43298; CHECK-NEXT: vmovx.f16 s4, s23299; CHECK-NEXT: vcvt.u32.f16 s10, s43300; CHECK-NEXT: vmovx.f16 s4, s13301; CHECK-NEXT: vcvt.u32.f16 s14, s23302; CHECK-NEXT: vcvt.u32.f16 s2, s13303; CHECK-NEXT: vcvt.u32.f16 s0, s03304; CHECK-NEXT: vcvt.u32.f16 s4, s43305; CHECK-NEXT: vcvt.u32.f16 s6, s63306; CHECK-NEXT: vmov r0, s23307; CHECK-NEXT: vmov r1, s03308; CHECK-NEXT: vcvt.u32.f16 s12, s33309; CHECK-NEXT: vmov q0[2], q0[0], r1, r03310; CHECK-NEXT: vmov r0, s43311; CHECK-NEXT: vmov r1, s63312; CHECK-NEXT: vmov q0[3], q0[1], r1, r03313; CHECK-NEXT: vmov r0, s123314; CHECK-NEXT: vmov r1, s143315; CHECK-NEXT: vmov q1[2], q1[0], r1, r03316; CHECK-NEXT: vmov r0, s83317; CHECK-NEXT: vmov r1, s103318; CHECK-NEXT: vmov q1[3], q1[1], r1, r03319; CHECK-NEXT: bx lr3320 %x = call <8 x i32> @llvm.fptoui.sat.v8f16.v8i32(<8 x half> %f)3321 ret <8 x i32> %x3322}3323 3324define arm_aapcs_vfpcc <8 x i50> @test_unsigned_v8f16_v8i50(<8 x half> %f) {3325; CHECK-LABEL: test_unsigned_v8f16_v8i50:3326; CHECK: @ %bb.0:3327; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}3328; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}3329; CHECK-NEXT: .pad #43330; CHECK-NEXT: sub sp, #43331; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13}3332; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13}3333; CHECK-NEXT: .pad #243334; CHECK-NEXT: sub sp, #243335; CHECK-NEXT: vmov q4, q03336; CHECK-NEXT: mov r10, r03337; CHECK-NEXT: vcvtb.f32.f16 s22, s183338; CHECK-NEXT: str r0, [sp] @ 4-byte Spill3339; CHECK-NEXT: vmov r0, s223340; CHECK-NEXT: bl __aeabi_f2ulz3341; CHECK-NEXT: vcvtt.f32.f16 s26, s173342; CHECK-NEXT: mov r6, r03343; CHECK-NEXT: vmov r0, s263344; CHECK-NEXT: vcvtt.f32.f16 s20, s183345; CHECK-NEXT: vcvtb.f32.f16 s24, s173346; CHECK-NEXT: vcmp.f32 s22, #03347; CHECK-NEXT: vmrs APSR_nzcv, fpscr3348; CHECK-NEXT: it lt3349; CHECK-NEXT: movlt r1, #03350; CHECK-NEXT: vmov r8, s203351; CHECK-NEXT: vldr s18, .LCPI48_03352; CHECK-NEXT: vmov r9, s243353; CHECK-NEXT: mov r4, r13354; CHECK-NEXT: it lt3355; CHECK-NEXT: movlt r6, #03356; CHECK-NEXT: bl __aeabi_f2ulz3357; CHECK-NEXT: vcmp.f32 s26, #03358; CHECK-NEXT: vmrs APSR_nzcv, fpscr3359; CHECK-NEXT: it lt3360; CHECK-NEXT: movlt r1, #03361; CHECK-NEXT: it lt3362; CHECK-NEXT: movlt r0, #03363; CHECK-NEXT: mov r7, r03364; CHECK-NEXT: mov r0, r93365; CHECK-NEXT: mov r5, r13366; CHECK-NEXT: bl __aeabi_f2ulz3367; CHECK-NEXT: vcmp.f32 s24, #03368; CHECK-NEXT: vmrs APSR_nzcv, fpscr3369; CHECK-NEXT: itt lt3370; CHECK-NEXT: movlt r1, #03371; CHECK-NEXT: movlt r0, #03372; CHECK-NEXT: vcmp.f32 s24, s183373; CHECK-NEXT: vmrs APSR_nzcv, fpscr3374; CHECK-NEXT: it gt3375; CHECK-NEXT: movgt.w r0, #-13376; CHECK-NEXT: vcmp.f32 s26, s183377; CHECK-NEXT: str r0, [sp, #20] @ 4-byte Spill3378; CHECK-NEXT: itt gt3379; CHECK-NEXT: movwgt r1, #655353380; CHECK-NEXT: movtgt r1, #33381; CHECK-NEXT: vmrs APSR_nzcv, fpscr3382; CHECK-NEXT: mov r0, r83383; CHECK-NEXT: vcmp.f32 s22, s183384; CHECK-NEXT: str r1, [sp, #16] @ 4-byte Spill3385; CHECK-NEXT: it gt3386; CHECK-NEXT: movgt.w r7, #-13387; CHECK-NEXT: str r7, [sp, #12] @ 4-byte Spill3388; CHECK-NEXT: itt gt3389; CHECK-NEXT: movwgt r5, #655353390; CHECK-NEXT: movtgt r5, #33391; CHECK-NEXT: str r5, [sp, #8] @ 4-byte Spill3392; CHECK-NEXT: vmrs APSR_nzcv, fpscr3393; CHECK-NEXT: it gt3394; CHECK-NEXT: movgt.w r6, #-13395; CHECK-NEXT: str.w r6, [r10, #25]3396; CHECK-NEXT: itt gt3397; CHECK-NEXT: movwgt r4, #655353398; CHECK-NEXT: movtgt r4, #33399; CHECK-NEXT: str r4, [sp, #4] @ 4-byte Spill3400; CHECK-NEXT: bl __aeabi_f2ulz3401; CHECK-NEXT: vcmp.f32 s20, #03402; CHECK-NEXT: mov r6, r03403; CHECK-NEXT: vmrs APSR_nzcv, fpscr3404; CHECK-NEXT: vcmp.f32 s20, s183405; CHECK-NEXT: vcvtb.f32.f16 s20, s193406; CHECK-NEXT: mov r5, r13407; CHECK-NEXT: vmov r0, s203408; CHECK-NEXT: itt lt3409; CHECK-NEXT: movlt r5, #03410; CHECK-NEXT: movlt r6, #03411; CHECK-NEXT: vmrs APSR_nzcv, fpscr3412; CHECK-NEXT: ittt gt3413; CHECK-NEXT: movgt.w r6, #-13414; CHECK-NEXT: movwgt r5, #655353415; CHECK-NEXT: movtgt r5, #33416; CHECK-NEXT: bl __aeabi_f2ulz3417; CHECK-NEXT: vcmp.f32 s20, #03418; CHECK-NEXT: mov r9, r03419; CHECK-NEXT: vmrs APSR_nzcv, fpscr3420; CHECK-NEXT: vcmp.f32 s20, s183421; CHECK-NEXT: vcvtt.f32.f16 s20, s193422; CHECK-NEXT: mov r11, r13423; CHECK-NEXT: vmov r0, s203424; CHECK-NEXT: itt lt3425; CHECK-NEXT: movlt.w r11, #03426; CHECK-NEXT: movlt.w r9, #03427; CHECK-NEXT: vmrs APSR_nzcv, fpscr3428; CHECK-NEXT: ittt gt3429; CHECK-NEXT: movgt.w r9, #-13430; CHECK-NEXT: movwgt r11, #655353431; CHECK-NEXT: movtgt r11, #33432; CHECK-NEXT: bl __aeabi_f2ulz3433; CHECK-NEXT: vcmp.f32 s20, #03434; CHECK-NEXT: mov r10, r03435; CHECK-NEXT: vmrs APSR_nzcv, fpscr3436; CHECK-NEXT: vcmp.f32 s20, s183437; CHECK-NEXT: vcvtb.f32.f16 s20, s163438; CHECK-NEXT: mov r7, r13439; CHECK-NEXT: vmov r0, s203440; CHECK-NEXT: itt lt3441; CHECK-NEXT: movlt r7, #03442; CHECK-NEXT: movlt.w r10, #03443; CHECK-NEXT: vmrs APSR_nzcv, fpscr3444; CHECK-NEXT: ittt gt3445; CHECK-NEXT: movgt.w r10, #-13446; CHECK-NEXT: movwgt r7, #655353447; CHECK-NEXT: movtgt r7, #33448; CHECK-NEXT: bl __aeabi_f2ulz3449; CHECK-NEXT: vcmp.f32 s20, #03450; CHECK-NEXT: mov r8, r13451; CHECK-NEXT: vmrs APSR_nzcv, fpscr3452; CHECK-NEXT: itt lt3453; CHECK-NEXT: movlt.w r8, #03454; CHECK-NEXT: movlt r0, #03455; CHECK-NEXT: vcmp.f32 s20, s183456; CHECK-NEXT: bfc r11, #18, #143457; CHECK-NEXT: vmrs APSR_nzcv, fpscr3458; CHECK-NEXT: it gt3459; CHECK-NEXT: movgt.w r0, #-13460; CHECK-NEXT: ldr r4, [sp] @ 4-byte Reload3461; CHECK-NEXT: mov r2, r93462; CHECK-NEXT: lsrl r2, r11, #283463; CHECK-NEXT: bfc r5, #18, #143464; CHECK-NEXT: vcvtt.f32.f16 s16, s163465; CHECK-NEXT: str r0, [r4]3466; CHECK-NEXT: lsr.w r0, r7, #103467; CHECK-NEXT: bfc r7, #18, #143468; CHECK-NEXT: lsll r10, r7, #223469; CHECK-NEXT: orr.w r1, r11, r73470; CHECK-NEXT: str.w r1, [r4, #45]3471; CHECK-NEXT: orr.w r1, r2, r103472; CHECK-NEXT: str.w r1, [r4, #41]3473; CHECK-NEXT: strb.w r0, [r4, #49]3474; CHECK-NEXT: mov r0, r63475; CHECK-NEXT: lsrl r0, r5, #143476; CHECK-NEXT: mov r7, r43477; CHECK-NEXT: orr.w r1, r5, r9, lsl #43478; CHECK-NEXT: str.w r1, [r4, #37]3479; CHECK-NEXT: str.w r0, [r4, #33]3480; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload3481; CHECK-NEXT: bfc r0, #18, #143482; CHECK-NEXT: orr.w r0, r0, r6, lsl #183483; CHECK-NEXT: str.w r0, [r4, #29]3484; CHECK-NEXT: vmov r0, s163485; CHECK-NEXT: ldr r5, [sp, #8] @ 4-byte Reload3486; CHECK-NEXT: ldr r3, [sp, #16] @ 4-byte Reload3487; CHECK-NEXT: ldr.w r9, [sp, #20] @ 4-byte Reload3488; CHECK-NEXT: mov r1, r53489; CHECK-NEXT: ldr r4, [sp, #12] @ 4-byte Reload3490; CHECK-NEXT: bfc r1, #18, #143491; CHECK-NEXT: bfc r3, #18, #143492; CHECK-NEXT: mov r6, r93493; CHECK-NEXT: lsll r4, r1, #223494; CHECK-NEXT: lsrl r6, r3, #283495; CHECK-NEXT: itt gt3496; CHECK-NEXT: movwgt r8, #655353497; CHECK-NEXT: movtgt r8, #33498; CHECK-NEXT: orrs r1, r33499; CHECK-NEXT: str r1, [r7, #20]3500; CHECK-NEXT: bl __aeabi_f2ulz3501; CHECK-NEXT: vcmp.f32 s16, #03502; CHECK-NEXT: orr.w r2, r6, r43503; CHECK-NEXT: vmrs APSR_nzcv, fpscr3504; CHECK-NEXT: itt lt3505; CHECK-NEXT: movlt r0, #03506; CHECK-NEXT: movlt r1, #03507; CHECK-NEXT: vcmp.f32 s16, s183508; CHECK-NEXT: bfc r8, #18, #143509; CHECK-NEXT: vmrs APSR_nzcv, fpscr3510; CHECK-NEXT: itt gt3511; CHECK-NEXT: movwgt r1, #655353512; CHECK-NEXT: movtgt r1, #33513; CHECK-NEXT: str r2, [r7, #16]3514; CHECK-NEXT: lsr.w r2, r5, #103515; CHECK-NEXT: strb r2, [r7, #24]3516; CHECK-NEXT: it gt3517; CHECK-NEXT: movgt.w r0, #-13518; CHECK-NEXT: mov r2, r03519; CHECK-NEXT: bfc r1, #18, #143520; CHECK-NEXT: lsrl r2, r1, #143521; CHECK-NEXT: orr.w r0, r8, r0, lsl #183522; CHECK-NEXT: orr.w r1, r1, r9, lsl #43523; CHECK-NEXT: strd r2, r1, [r7, #8]3524; CHECK-NEXT: str r0, [r7, #4]3525; CHECK-NEXT: add sp, #243526; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13}3527; CHECK-NEXT: add sp, #43528; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}3529; CHECK-NEXT: .p2align 23530; CHECK-NEXT: @ %bb.1:3531; CHECK-NEXT: .LCPI48_0:3532; CHECK-NEXT: .long 0x587fffff @ float 1.12589984E+153533 %x = call <8 x i50> @llvm.fptoui.sat.v8f16.v8i50(<8 x half> %f)3534 ret <8 x i50> %x3535}3536 3537define arm_aapcs_vfpcc <8 x i64> @test_unsigned_v8f16_v8i64(<8 x half> %f) {3538; CHECK-LABEL: test_unsigned_v8f16_v8i64:3539; CHECK: @ %bb.0:3540; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}3541; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}3542; CHECK-NEXT: .pad #43543; CHECK-NEXT: sub sp, #43544; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14}3545; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14}3546; CHECK-NEXT: vmov q4, q03547; CHECK-NEXT: vcvtt.f32.f16 s22, s193548; CHECK-NEXT: vmov r0, s223549; CHECK-NEXT: bl __aeabi_f2ulz3550; CHECK-NEXT: vcvtb.f32.f16 s26, s193551; CHECK-NEXT: mov r9, r03552; CHECK-NEXT: vmov r0, s263553; CHECK-NEXT: vldr s28, .LCPI49_03554; CHECK-NEXT: vcmp.f32 s22, #03555; CHECK-NEXT: mov r8, r13556; CHECK-NEXT: vmrs APSR_nzcv, fpscr3557; CHECK-NEXT: vcvtt.f32.f16 s20, s163558; CHECK-NEXT: vcvtt.f32.f16 s24, s183559; CHECK-NEXT: itt lt3560; CHECK-NEXT: movlt.w r9, #03561; CHECK-NEXT: movlt.w r8, #03562; CHECK-NEXT: vcmp.f32 s22, s283563; CHECK-NEXT: vmrs APSR_nzcv, fpscr3564; CHECK-NEXT: vmov r6, s203565; CHECK-NEXT: vmov r4, s243566; CHECK-NEXT: itt gt3567; CHECK-NEXT: movgt.w r8, #-13568; CHECK-NEXT: movgt.w r9, #-13569; CHECK-NEXT: bl __aeabi_f2ulz3570; CHECK-NEXT: mov r10, r03571; CHECK-NEXT: vcmp.f32 s26, #03572; CHECK-NEXT: mov r11, r13573; CHECK-NEXT: vmrs APSR_nzcv, fpscr3574; CHECK-NEXT: mov r0, r43575; CHECK-NEXT: itt lt3576; CHECK-NEXT: movlt.w r11, #03577; CHECK-NEXT: movlt.w r10, #03578; CHECK-NEXT: vcmp.f32 s26, s283579; CHECK-NEXT: vmrs APSR_nzcv, fpscr3580; CHECK-NEXT: itt gt3581; CHECK-NEXT: movgt.w r10, #-13582; CHECK-NEXT: movgt.w r11, #-13583; CHECK-NEXT: bl __aeabi_f2ulz3584; CHECK-NEXT: mov r5, r03585; CHECK-NEXT: vcmp.f32 s24, #03586; CHECK-NEXT: mov r4, r13587; CHECK-NEXT: vmrs APSR_nzcv, fpscr3588; CHECK-NEXT: mov r0, r63589; CHECK-NEXT: itt lt3590; CHECK-NEXT: movlt r5, #03591; CHECK-NEXT: movlt r4, #03592; CHECK-NEXT: vcmp.f32 s24, s283593; CHECK-NEXT: vmrs APSR_nzcv, fpscr3594; CHECK-NEXT: itt gt3595; CHECK-NEXT: movgt.w r4, #-13596; CHECK-NEXT: movgt.w r5, #-13597; CHECK-NEXT: bl __aeabi_f2ulz3598; CHECK-NEXT: vcvtb.f32.f16 s16, s163599; CHECK-NEXT: mov r7, r03600; CHECK-NEXT: vmov r0, s163601; CHECK-NEXT: mov r6, r13602; CHECK-NEXT: vcmp.f32 s20, #03603; CHECK-NEXT: vmrs APSR_nzcv, fpscr3604; CHECK-NEXT: itt lt3605; CHECK-NEXT: movlt r7, #03606; CHECK-NEXT: movlt r6, #03607; CHECK-NEXT: vcmp.f32 s20, s283608; CHECK-NEXT: vmrs APSR_nzcv, fpscr3609; CHECK-NEXT: itt gt3610; CHECK-NEXT: movgt.w r6, #-13611; CHECK-NEXT: movgt.w r7, #-13612; CHECK-NEXT: bl __aeabi_f2ulz3613; CHECK-NEXT: vcmp.f32 s16, #03614; CHECK-NEXT: vmrs APSR_nzcv, fpscr3615; CHECK-NEXT: vcmp.f32 s16, s283616; CHECK-NEXT: itt lt3617; CHECK-NEXT: movlt r1, #03618; CHECK-NEXT: movlt r0, #03619; CHECK-NEXT: vmrs APSR_nzcv, fpscr3620; CHECK-NEXT: it gt3621; CHECK-NEXT: movgt.w r0, #-13622; CHECK-NEXT: vcvtt.f32.f16 s16, s173623; CHECK-NEXT: vmov q5[2], q5[0], r0, r73624; CHECK-NEXT: vmov r0, s163625; CHECK-NEXT: it gt3626; CHECK-NEXT: movgt.w r1, #-13627; CHECK-NEXT: vmov q5[3], q5[1], r1, r63628; CHECK-NEXT: bl __aeabi_f2ulz3629; CHECK-NEXT: vcmp.f32 s16, #03630; CHECK-NEXT: mov r7, r03631; CHECK-NEXT: vmrs APSR_nzcv, fpscr3632; CHECK-NEXT: vcmp.f32 s16, s283633; CHECK-NEXT: vcvtb.f32.f16 s16, s173634; CHECK-NEXT: mov r6, r13635; CHECK-NEXT: vmov r0, s163636; CHECK-NEXT: itt lt3637; CHECK-NEXT: movlt r7, #03638; CHECK-NEXT: movlt r6, #03639; CHECK-NEXT: vmrs APSR_nzcv, fpscr3640; CHECK-NEXT: itt gt3641; CHECK-NEXT: movgt.w r6, #-13642; CHECK-NEXT: movgt.w r7, #-13643; CHECK-NEXT: bl __aeabi_f2ulz3644; CHECK-NEXT: vcmp.f32 s16, #03645; CHECK-NEXT: vmrs APSR_nzcv, fpscr3646; CHECK-NEXT: vcmp.f32 s16, s283647; CHECK-NEXT: itt lt3648; CHECK-NEXT: movlt r1, #03649; CHECK-NEXT: movlt r0, #03650; CHECK-NEXT: vmrs APSR_nzcv, fpscr3651; CHECK-NEXT: it gt3652; CHECK-NEXT: movgt.w r0, #-13653; CHECK-NEXT: vcvtb.f32.f16 s16, s183654; CHECK-NEXT: vmov q6[2], q6[0], r0, r73655; CHECK-NEXT: vmov r0, s163656; CHECK-NEXT: it gt3657; CHECK-NEXT: movgt.w r1, #-13658; CHECK-NEXT: vmov q6[3], q6[1], r1, r63659; CHECK-NEXT: bl __aeabi_f2ulz3660; CHECK-NEXT: vcmp.f32 s16, #03661; CHECK-NEXT: vmov q3[2], q3[0], r10, r93662; CHECK-NEXT: vmrs APSR_nzcv, fpscr3663; CHECK-NEXT: itt lt3664; CHECK-NEXT: movlt r1, #03665; CHECK-NEXT: movlt r0, #03666; CHECK-NEXT: vcmp.f32 s16, s283667; CHECK-NEXT: vmov q3[3], q3[1], r11, r83668; CHECK-NEXT: vmrs APSR_nzcv, fpscr3669; CHECK-NEXT: itt gt3670; CHECK-NEXT: movgt.w r0, #-13671; CHECK-NEXT: movgt.w r1, #-13672; CHECK-NEXT: vmov q2[2], q2[0], r0, r53673; CHECK-NEXT: vmov q0, q53674; CHECK-NEXT: vmov q2[3], q2[1], r1, r43675; CHECK-NEXT: vmov q1, q63676; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14}3677; CHECK-NEXT: add sp, #43678; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}3679; CHECK-NEXT: .p2align 23680; CHECK-NEXT: @ %bb.1:3681; CHECK-NEXT: .LCPI49_0:3682; CHECK-NEXT: .long 0x5f7fffff @ float 1.8446743E+193683 %x = call <8 x i64> @llvm.fptoui.sat.v8f16.v8i64(<8 x half> %f)3684 ret <8 x i64> %x3685}3686 3687define arm_aapcs_vfpcc <8 x i100> @test_unsigned_v8f16_v8i100(<8 x half> %f) {3688; CHECK-LABEL: test_unsigned_v8f16_v8i100:3689; CHECK: @ %bb.0:3690; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}3691; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}3692; CHECK-NEXT: .pad #43693; CHECK-NEXT: sub sp, #43694; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12}3695; CHECK-NEXT: vpush {d8, d9, d10, d11, d12}3696; CHECK-NEXT: .pad #563697; CHECK-NEXT: sub sp, #563698; CHECK-NEXT: vmov q4, q03699; CHECK-NEXT: mov r4, r03700; CHECK-NEXT: vcvtb.f32.f16 s22, s173701; CHECK-NEXT: vmov r0, s223702; CHECK-NEXT: bl __fixunssfti3703; CHECK-NEXT: vcvtb.f32.f16 s24, s183704; CHECK-NEXT: mov r8, r03705; CHECK-NEXT: vmov r0, s243706; CHECK-NEXT: vldr s20, .LCPI50_03707; CHECK-NEXT: vcmp.f32 s22, #03708; CHECK-NEXT: mov r9, r13709; CHECK-NEXT: mov r10, r23710; CHECK-NEXT: vmrs APSR_nzcv, fpscr3711; CHECK-NEXT: itttt lt3712; CHECK-NEXT: movlt.w r10, #03713; CHECK-NEXT: movlt.w r9, #03714; CHECK-NEXT: movlt.w r8, #03715; CHECK-NEXT: movlt r3, #03716; CHECK-NEXT: vcmp.f32 s22, s203717; CHECK-NEXT: vmrs APSR_nzcv, fpscr3718; CHECK-NEXT: it gt3719; CHECK-NEXT: movgt r3, #153720; CHECK-NEXT: str r3, [sp, #52] @ 4-byte Spill3721; CHECK-NEXT: ittt gt3722; CHECK-NEXT: movgt.w r8, #-13723; CHECK-NEXT: movgt.w r9, #-13724; CHECK-NEXT: movgt.w r10, #-13725; CHECK-NEXT: bl __fixunssfti3726; CHECK-NEXT: vcvtb.f32.f16 s22, s193727; CHECK-NEXT: mov r5, r03728; CHECK-NEXT: vmov r0, s223729; CHECK-NEXT: mov r6, r13730; CHECK-NEXT: vcmp.f32 s24, #03731; CHECK-NEXT: mov r7, r23732; CHECK-NEXT: vmrs APSR_nzcv, fpscr3733; CHECK-NEXT: itttt lt3734; CHECK-NEXT: movlt r7, #03735; CHECK-NEXT: movlt r6, #03736; CHECK-NEXT: movlt r5, #03737; CHECK-NEXT: movlt r3, #03738; CHECK-NEXT: vcmp.f32 s24, s203739; CHECK-NEXT: vmrs APSR_nzcv, fpscr3740; CHECK-NEXT: it gt3741; CHECK-NEXT: movgt r3, #153742; CHECK-NEXT: str r3, [sp, #48] @ 4-byte Spill3743; CHECK-NEXT: ittt gt3744; CHECK-NEXT: movgt.w r5, #-13745; CHECK-NEXT: movgt.w r6, #-13746; CHECK-NEXT: movgt.w r7, #-13747; CHECK-NEXT: bl __fixunssfti3748; CHECK-NEXT: vcmp.f32 s22, #03749; CHECK-NEXT: vmrs APSR_nzcv, fpscr3750; CHECK-NEXT: vcmp.f32 s22, s203751; CHECK-NEXT: itttt lt3752; CHECK-NEXT: movlt r3, #03753; CHECK-NEXT: movlt r0, #03754; CHECK-NEXT: movlt r1, #03755; CHECK-NEXT: movlt r2, #03756; CHECK-NEXT: vmrs APSR_nzcv, fpscr3757; CHECK-NEXT: it gt3758; CHECK-NEXT: movgt.w r2, #-13759; CHECK-NEXT: str.w r2, [r4, #83]3760; CHECK-NEXT: it gt3761; CHECK-NEXT: movgt.w r1, #-13762; CHECK-NEXT: str.w r1, [r4, #79]3763; CHECK-NEXT: it gt3764; CHECK-NEXT: movgt.w r0, #-13765; CHECK-NEXT: vcvtt.f32.f16 s22, s163766; CHECK-NEXT: str.w r0, [r4, #75]3767; CHECK-NEXT: vmov r0, s223768; CHECK-NEXT: str.w r7, [r4, #58]3769; CHECK-NEXT: str.w r6, [r4, #54]3770; CHECK-NEXT: str.w r5, [r4, #50]3771; CHECK-NEXT: str.w r10, [r4, #33]3772; CHECK-NEXT: str.w r9, [r4, #29]3773; CHECK-NEXT: str.w r8, [r4, #25]3774; CHECK-NEXT: it gt3775; CHECK-NEXT: movgt r3, #153776; CHECK-NEXT: str r3, [sp, #40] @ 4-byte Spill3777; CHECK-NEXT: bl __fixunssfti3778; CHECK-NEXT: vcmp.f32 s22, #03779; CHECK-NEXT: vmrs APSR_nzcv, fpscr3780; CHECK-NEXT: vcmp.f32 s22, s203781; CHECK-NEXT: itttt lt3782; CHECK-NEXT: movlt r0, #03783; CHECK-NEXT: movlt r1, #03784; CHECK-NEXT: movlt r2, #03785; CHECK-NEXT: movlt r3, #03786; CHECK-NEXT: vmrs APSR_nzcv, fpscr3787; CHECK-NEXT: it gt3788; CHECK-NEXT: movgt r3, #153789; CHECK-NEXT: str r3, [sp, #44] @ 4-byte Spill3790; CHECK-NEXT: it gt3791; CHECK-NEXT: movgt.w r2, #-13792; CHECK-NEXT: str r2, [sp, #36] @ 4-byte Spill3793; CHECK-NEXT: it gt3794; CHECK-NEXT: movgt.w r1, #-13795; CHECK-NEXT: str r1, [sp, #32] @ 4-byte Spill3796; CHECK-NEXT: it gt3797; CHECK-NEXT: movgt.w r0, #-13798; CHECK-NEXT: vcvtt.f32.f16 s22, s173799; CHECK-NEXT: str r0, [sp, #24] @ 4-byte Spill3800; CHECK-NEXT: vmov r0, s223801; CHECK-NEXT: bl __fixunssfti3802; CHECK-NEXT: vcmp.f32 s22, #03803; CHECK-NEXT: mov r5, r13804; CHECK-NEXT: vmrs APSR_nzcv, fpscr3805; CHECK-NEXT: itttt lt3806; CHECK-NEXT: movlt r5, #03807; CHECK-NEXT: movlt r0, #03808; CHECK-NEXT: movlt r2, #03809; CHECK-NEXT: movlt r3, #03810; CHECK-NEXT: vcmp.f32 s22, s203811; CHECK-NEXT: vcvtt.f32.f16 s18, s183812; CHECK-NEXT: vmrs APSR_nzcv, fpscr3813; CHECK-NEXT: it gt3814; CHECK-NEXT: movgt r3, #153815; CHECK-NEXT: str r3, [sp, #28] @ 4-byte Spill3816; CHECK-NEXT: it gt3817; CHECK-NEXT: movgt.w r2, #-13818; CHECK-NEXT: str r2, [sp, #20] @ 4-byte Spill3819; CHECK-NEXT: it gt3820; CHECK-NEXT: movgt.w r0, #-13821; CHECK-NEXT: str r0, [sp, #16] @ 4-byte Spill3822; CHECK-NEXT: vmov r0, s183823; CHECK-NEXT: it gt3824; CHECK-NEXT: movgt.w r5, #-13825; CHECK-NEXT: bl __fixunssfti3826; CHECK-NEXT: vcmp.f32 s18, #03827; CHECK-NEXT: mov r9, r13828; CHECK-NEXT: mov r8, r23829; CHECK-NEXT: vmrs APSR_nzcv, fpscr3830; CHECK-NEXT: vcmp.f32 s18, s203831; CHECK-NEXT: itttt lt3832; CHECK-NEXT: movlt r0, #03833; CHECK-NEXT: movlt.w r9, #03834; CHECK-NEXT: movlt.w r8, #03835; CHECK-NEXT: movlt r3, #03836; CHECK-NEXT: vmrs APSR_nzcv, fpscr3837; CHECK-NEXT: it gt3838; CHECK-NEXT: movgt r3, #153839; CHECK-NEXT: str r3, [sp, #12] @ 4-byte Spill3840; CHECK-NEXT: ittt gt3841; CHECK-NEXT: movgt.w r8, #-13842; CHECK-NEXT: movgt.w r9, #-13843; CHECK-NEXT: movgt.w r0, #-13844; CHECK-NEXT: vcvtt.f32.f16 s18, s193845; CHECK-NEXT: str r0, [sp, #8] @ 4-byte Spill3846; CHECK-NEXT: vmov r0, s183847; CHECK-NEXT: bl __fixunssfti3848; CHECK-NEXT: vcvtb.f32.f16 s16, s163849; CHECK-NEXT: mov r6, r03850; CHECK-NEXT: vmov r0, s163851; CHECK-NEXT: mov r11, r13852; CHECK-NEXT: vcmp.f32 s18, #03853; CHECK-NEXT: mov r10, r23854; CHECK-NEXT: mov r7, r33855; CHECK-NEXT: vmrs APSR_nzcv, fpscr3856; CHECK-NEXT: itttt lt3857; CHECK-NEXT: movlt.w r11, #03858; CHECK-NEXT: movlt r6, #03859; CHECK-NEXT: movlt.w r10, #03860; CHECK-NEXT: movlt r7, #03861; CHECK-NEXT: vcmp.f32 s18, s203862; CHECK-NEXT: vmrs APSR_nzcv, fpscr3863; CHECK-NEXT: itttt gt3864; CHECK-NEXT: movgt r7, #153865; CHECK-NEXT: movgt.w r10, #-13866; CHECK-NEXT: movgt.w r6, #-13867; CHECK-NEXT: movgt.w r11, #-13868; CHECK-NEXT: bl __fixunssfti3869; CHECK-NEXT: vcmp.f32 s16, #03870; CHECK-NEXT: vmrs APSR_nzcv, fpscr3871; CHECK-NEXT: itttt lt3872; CHECK-NEXT: movlt r3, #03873; CHECK-NEXT: movlt r0, #03874; CHECK-NEXT: movlt r1, #03875; CHECK-NEXT: movlt r2, #03876; CHECK-NEXT: vcmp.f32 s16, s203877; CHECK-NEXT: vmrs APSR_nzcv, fpscr3878; CHECK-NEXT: it gt3879; CHECK-NEXT: movgt.w r2, #-13880; CHECK-NEXT: str r2, [r4, #8]3881; CHECK-NEXT: it gt3882; CHECK-NEXT: movgt.w r1, #-13883; CHECK-NEXT: str r1, [r4, #4]3884; CHECK-NEXT: it gt3885; CHECK-NEXT: movgt.w r0, #-13886; CHECK-NEXT: str r0, [r4]3887; CHECK-NEXT: mov r0, r63888; CHECK-NEXT: lsrl r0, r11, #283889; CHECK-NEXT: and r1, r7, #153890; CHECK-NEXT: str.w r0, [r4, #91]3891; CHECK-NEXT: ldr r2, [sp, #8] @ 4-byte Reload3892; CHECK-NEXT: mov r0, r23893; CHECK-NEXT: lsrl r0, r9, #283894; CHECK-NEXT: str.w r0, [r4, #66]3895; CHECK-NEXT: ldr.w lr, [sp, #16] @ 4-byte Reload3896; CHECK-NEXT: mov r0, lr3897; CHECK-NEXT: lsrl r0, r5, #283898; CHECK-NEXT: str r5, [sp, #4] @ 4-byte Spill3899; CHECK-NEXT: str.w r0, [r4, #41]3900; CHECK-NEXT: ldr.w r12, [sp, #24] @ 4-byte Reload3901; CHECK-NEXT: ldr r5, [sp, #32] @ 4-byte Reload3902; CHECK-NEXT: mov r0, r123903; CHECK-NEXT: lsrl r0, r5, #283904; CHECK-NEXT: str r0, [r4, #16]3905; CHECK-NEXT: orr.w r0, r11, r10, lsl #43906; CHECK-NEXT: lsrl r10, r1, #283907; CHECK-NEXT: str.w r0, [r4, #95]3908; CHECK-NEXT: strb.w r10, [r4, #99]3909; CHECK-NEXT: ldr r0, [sp, #40] @ 4-byte Reload3910; CHECK-NEXT: and r0, r0, #153911; CHECK-NEXT: orr.w r0, r0, r6, lsl #43912; CHECK-NEXT: str.w r0, [r4, #87]3913; CHECK-NEXT: orr.w r0, r9, r8, lsl #43914; CHECK-NEXT: str.w r0, [r4, #70]3915; CHECK-NEXT: ldr r0, [sp, #12] @ 4-byte Reload3916; CHECK-NEXT: and r1, r0, #153917; CHECK-NEXT: lsrl r8, r1, #283918; CHECK-NEXT: strb.w r8, [r4, #74]3919; CHECK-NEXT: ldr r0, [sp, #48] @ 4-byte Reload3920; CHECK-NEXT: and r0, r0, #153921; CHECK-NEXT: orr.w r0, r0, r2, lsl #43922; CHECK-NEXT: str.w r0, [r4, #62]3923; CHECK-NEXT: ldr r2, [sp, #20] @ 4-byte Reload3924; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload3925; CHECK-NEXT: orr.w r0, r0, r2, lsl #43926; CHECK-NEXT: str.w r0, [r4, #45]3927; CHECK-NEXT: ldr r0, [sp, #28] @ 4-byte Reload3928; CHECK-NEXT: and r1, r0, #153929; CHECK-NEXT: lsrl r2, r1, #283930; CHECK-NEXT: strb.w r2, [r4, #49]3931; CHECK-NEXT: ldr r0, [sp, #52] @ 4-byte Reload3932; CHECK-NEXT: and r0, r0, #153933; CHECK-NEXT: orr.w r0, r0, lr, lsl #43934; CHECK-NEXT: str.w r0, [r4, #37]3935; CHECK-NEXT: ldr r2, [sp, #36] @ 4-byte Reload3936; CHECK-NEXT: orr.w r0, r5, r2, lsl #43937; CHECK-NEXT: str r0, [r4, #20]3938; CHECK-NEXT: ldr r0, [sp, #44] @ 4-byte Reload3939; CHECK-NEXT: and r1, r0, #153940; CHECK-NEXT: lsrl r2, r1, #283941; CHECK-NEXT: strb r2, [r4, #24]3942; CHECK-NEXT: it gt3943; CHECK-NEXT: movgt r3, #153944; CHECK-NEXT: and r0, r3, #153945; CHECK-NEXT: orr.w r0, r0, r12, lsl #43946; CHECK-NEXT: str r0, [r4, #12]3947; CHECK-NEXT: add sp, #563948; CHECK-NEXT: vpop {d8, d9, d10, d11, d12}3949; CHECK-NEXT: add sp, #43950; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}3951; CHECK-NEXT: .p2align 23952; CHECK-NEXT: @ %bb.1:3953; CHECK-NEXT: .LCPI50_0:3954; CHECK-NEXT: .long 0x717fffff @ float 1.26765052E+303955 %x = call <8 x i100> @llvm.fptoui.sat.v8f16.v8i100(<8 x half> %f)3956 ret <8 x i100> %x3957}3958 3959define arm_aapcs_vfpcc <8 x i128> @test_unsigned_v8f16_v8i128(<8 x half> %f) {3960; CHECK-LABEL: test_unsigned_v8f16_v8i128:3961; CHECK: @ %bb.0:3962; CHECK-NEXT: .save {r4, r5, r6, r7, lr}3963; CHECK-NEXT: push {r4, r5, r6, r7, lr}3964; CHECK-NEXT: .pad #43965; CHECK-NEXT: sub sp, #43966; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14}3967; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14}3968; CHECK-NEXT: vmov q4, q03969; CHECK-NEXT: mov r4, r03970; CHECK-NEXT: vcvtt.f32.f16 s24, s193971; CHECK-NEXT: vcvtb.f32.f16 s22, s163972; CHECK-NEXT: vmov r0, s243973; CHECK-NEXT: vcvtb.f32.f16 s28, s193974; CHECK-NEXT: vldr s20, .LCPI51_03975; CHECK-NEXT: vmov r5, s223976; CHECK-NEXT: vmov r7, s283977; CHECK-NEXT: vcvtt.f32.f16 s26, s183978; CHECK-NEXT: bl __fixunssfti3979; CHECK-NEXT: vcmp.f32 s24, #03980; CHECK-NEXT: add.w r12, r4, #1123981; CHECK-NEXT: vmrs APSR_nzcv, fpscr3982; CHECK-NEXT: itttt lt3983; CHECK-NEXT: movlt r0, #03984; CHECK-NEXT: movlt r1, #03985; CHECK-NEXT: movlt r2, #03986; CHECK-NEXT: movlt r3, #03987; CHECK-NEXT: vcmp.f32 s24, s203988; CHECK-NEXT: vcvtb.f32.f16 s18, s183989; CHECK-NEXT: vmrs APSR_nzcv, fpscr3990; CHECK-NEXT: it gt3991; CHECK-NEXT: movgt.w r3, #-13992; CHECK-NEXT: ittt gt3993; CHECK-NEXT: movgt.w r2, #-13994; CHECK-NEXT: movgt.w r1, #-13995; CHECK-NEXT: movgt.w r0, #-13996; CHECK-NEXT: stm.w r12, {r0, r1, r2, r3}3997; CHECK-NEXT: mov r0, r73998; CHECK-NEXT: vmov r6, s263999; CHECK-NEXT: bl __fixunssfti4000; CHECK-NEXT: vcmp.f32 s28, #04001; CHECK-NEXT: add.w r12, r4, #964002; CHECK-NEXT: vmrs APSR_nzcv, fpscr4003; CHECK-NEXT: itttt lt4004; CHECK-NEXT: movlt r0, #04005; CHECK-NEXT: movlt r1, #04006; CHECK-NEXT: movlt r2, #04007; CHECK-NEXT: movlt r3, #04008; CHECK-NEXT: vcmp.f32 s28, s204009; CHECK-NEXT: vcvtt.f32.f16 s24, s174010; CHECK-NEXT: vmrs APSR_nzcv, fpscr4011; CHECK-NEXT: it gt4012; CHECK-NEXT: movgt.w r3, #-14013; CHECK-NEXT: ittt gt4014; CHECK-NEXT: movgt.w r2, #-14015; CHECK-NEXT: movgt.w r1, #-14016; CHECK-NEXT: movgt.w r0, #-14017; CHECK-NEXT: stm.w r12, {r0, r1, r2, r3}4018; CHECK-NEXT: mov r0, r64019; CHECK-NEXT: vmov r7, s184020; CHECK-NEXT: bl __fixunssfti4021; CHECK-NEXT: vcmp.f32 s26, #04022; CHECK-NEXT: add.w r12, r4, #804023; CHECK-NEXT: vmrs APSR_nzcv, fpscr4024; CHECK-NEXT: vcmp.f32 s26, s204025; CHECK-NEXT: itttt lt4026; CHECK-NEXT: movlt r0, #04027; CHECK-NEXT: movlt r1, #04028; CHECK-NEXT: movlt r2, #04029; CHECK-NEXT: movlt r3, #04030; CHECK-NEXT: vmrs APSR_nzcv, fpscr4031; CHECK-NEXT: it gt4032; CHECK-NEXT: movgt.w r3, #-14033; CHECK-NEXT: ittt gt4034; CHECK-NEXT: movgt.w r2, #-14035; CHECK-NEXT: movgt.w r1, #-14036; CHECK-NEXT: movgt.w r0, #-14037; CHECK-NEXT: stm.w r12, {r0, r1, r2, r3}4038; CHECK-NEXT: mov r0, r74039; CHECK-NEXT: vmov r6, s244040; CHECK-NEXT: vcvtb.f32.f16 s26, s174041; CHECK-NEXT: bl __fixunssfti4042; CHECK-NEXT: vcmp.f32 s18, #04043; CHECK-NEXT: add.w r12, r4, #644044; CHECK-NEXT: vmrs APSR_nzcv, fpscr4045; CHECK-NEXT: itttt lt4046; CHECK-NEXT: movlt r0, #04047; CHECK-NEXT: movlt r1, #04048; CHECK-NEXT: movlt r2, #04049; CHECK-NEXT: movlt r3, #04050; CHECK-NEXT: vcmp.f32 s18, s204051; CHECK-NEXT: vcvtt.f32.f16 s16, s164052; CHECK-NEXT: vmrs APSR_nzcv, fpscr4053; CHECK-NEXT: it gt4054; CHECK-NEXT: movgt.w r3, #-14055; CHECK-NEXT: ittt gt4056; CHECK-NEXT: movgt.w r2, #-14057; CHECK-NEXT: movgt.w r1, #-14058; CHECK-NEXT: movgt.w r0, #-14059; CHECK-NEXT: stm.w r12, {r0, r1, r2, r3}4060; CHECK-NEXT: mov r0, r64061; CHECK-NEXT: vmov r7, s264062; CHECK-NEXT: bl __fixunssfti4063; CHECK-NEXT: vcmp.f32 s24, #04064; CHECK-NEXT: add.w r12, r4, #484065; CHECK-NEXT: vmrs APSR_nzcv, fpscr4066; CHECK-NEXT: itttt lt4067; CHECK-NEXT: movlt r0, #04068; CHECK-NEXT: movlt r1, #04069; CHECK-NEXT: movlt r2, #04070; CHECK-NEXT: movlt r3, #04071; CHECK-NEXT: vcmp.f32 s24, s204072; CHECK-NEXT: vmrs APSR_nzcv, fpscr4073; CHECK-NEXT: it gt4074; CHECK-NEXT: movgt.w r3, #-14075; CHECK-NEXT: ittt gt4076; CHECK-NEXT: movgt.w r2, #-14077; CHECK-NEXT: movgt.w r1, #-14078; CHECK-NEXT: movgt.w r0, #-14079; CHECK-NEXT: stm.w r12, {r0, r1, r2, r3}4080; CHECK-NEXT: mov r0, r74081; CHECK-NEXT: vmov r6, s164082; CHECK-NEXT: bl __fixunssfti4083; CHECK-NEXT: vcmp.f32 s26, #04084; CHECK-NEXT: add.w r12, r4, #324085; CHECK-NEXT: vmrs APSR_nzcv, fpscr4086; CHECK-NEXT: itttt lt4087; CHECK-NEXT: movlt r0, #04088; CHECK-NEXT: movlt r1, #04089; CHECK-NEXT: movlt r2, #04090; CHECK-NEXT: movlt r3, #04091; CHECK-NEXT: vcmp.f32 s26, s204092; CHECK-NEXT: vmrs APSR_nzcv, fpscr4093; CHECK-NEXT: itttt gt4094; CHECK-NEXT: movgt.w r3, #-14095; CHECK-NEXT: movgt.w r2, #-14096; CHECK-NEXT: movgt.w r1, #-14097; CHECK-NEXT: movgt.w r0, #-14098; CHECK-NEXT: stm.w r12, {r0, r1, r2, r3}4099; CHECK-NEXT: mov r0, r64100; CHECK-NEXT: bl __fixunssfti4101; CHECK-NEXT: vcmp.f32 s16, #04102; CHECK-NEXT: add.w r12, r4, #164103; CHECK-NEXT: vmrs APSR_nzcv, fpscr4104; CHECK-NEXT: itttt lt4105; CHECK-NEXT: movlt r0, #04106; CHECK-NEXT: movlt r1, #04107; CHECK-NEXT: movlt r2, #04108; CHECK-NEXT: movlt r3, #04109; CHECK-NEXT: vcmp.f32 s16, s204110; CHECK-NEXT: vmrs APSR_nzcv, fpscr4111; CHECK-NEXT: itttt gt4112; CHECK-NEXT: movgt.w r3, #-14113; CHECK-NEXT: movgt.w r2, #-14114; CHECK-NEXT: movgt.w r1, #-14115; CHECK-NEXT: movgt.w r0, #-14116; CHECK-NEXT: stm.w r12, {r0, r1, r2, r3}4117; CHECK-NEXT: mov r0, r54118; CHECK-NEXT: bl __fixunssfti4119; CHECK-NEXT: vcmp.f32 s22, #04120; CHECK-NEXT: vmrs APSR_nzcv, fpscr4121; CHECK-NEXT: itttt lt4122; CHECK-NEXT: movlt r0, #04123; CHECK-NEXT: movlt r1, #04124; CHECK-NEXT: movlt r2, #04125; CHECK-NEXT: movlt r3, #04126; CHECK-NEXT: vcmp.f32 s22, s204127; CHECK-NEXT: vmrs APSR_nzcv, fpscr4128; CHECK-NEXT: itttt gt4129; CHECK-NEXT: movgt.w r3, #-14130; CHECK-NEXT: movgt.w r2, #-14131; CHECK-NEXT: movgt.w r1, #-14132; CHECK-NEXT: movgt.w r0, #-14133; CHECK-NEXT: stm r4!, {r0, r1, r2, r3}4134; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14}4135; CHECK-NEXT: add sp, #44136; CHECK-NEXT: pop {r4, r5, r6, r7, pc}4137; CHECK-NEXT: .p2align 24138; CHECK-NEXT: @ %bb.1:4139; CHECK-NEXT: .LCPI51_0:4140; CHECK-NEXT: .long 0x7f7fffff @ float 3.40282347E+384141 %x = call <8 x i128> @llvm.fptoui.sat.v8f16.v8i128(<8 x half> %f)4142 ret <8 x i128> %x4143}4144 4145