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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -enable-arm-maskedldst -tail-predication=force-enabled %s -o - | FileCheck %s3 4define arm_aapcs_vfpcc void @gather_inc_v4i32_simple(ptr noalias nocapture readonly %data, ptr noalias nocapture %dst, i32 %n) {5; CHECK-LABEL: gather_inc_v4i32_simple:6; CHECK: @ %bb.0: @ %entry7; CHECK-NEXT: cmp r2, #18; CHECK-NEXT: it lt9; CHECK-NEXT: bxlt lr10; CHECK-NEXT: .LBB0_1: @ %vector.ph.preheader11; CHECK-NEXT: .save {r4, lr}12; CHECK-NEXT: push {r4, lr}13; CHECK-NEXT: bic r12, r2, #314; CHECK-NEXT: movs r3, #115; CHECK-NEXT: sub.w lr, r12, #416; CHECK-NEXT: add.w r4, r3, lr, lsr #217; CHECK-NEXT: adr r3, .LCPI0_018; CHECK-NEXT: vldrw.u32 q0, [r3]19; CHECK-NEXT: vadd.i32 q0, q0, r020; CHECK-NEXT: .LBB0_2: @ %vector.ph21; CHECK-NEXT: @ =>This Loop Header: Depth=122; CHECK-NEXT: @ Child Loop BB0_3 Depth 223; CHECK-NEXT: dls lr, r424; CHECK-NEXT: mov r0, r125; CHECK-NEXT: vmov q1, q026; CHECK-NEXT: .LBB0_3: @ %vector.body27; CHECK-NEXT: @ Parent Loop BB0_2 Depth=128; CHECK-NEXT: @ => This Inner Loop Header: Depth=229; CHECK-NEXT: vldrw.u32 q2, [q1, #16]!30; CHECK-NEXT: vstrb.8 q2, [r0], #1631; CHECK-NEXT: le lr, .LBB0_332; CHECK-NEXT: @ %bb.4: @ %middle.block33; CHECK-NEXT: @ in Loop: Header=BB0_2 Depth=134; CHECK-NEXT: cmp r12, r235; CHECK-NEXT: bne .LBB0_236; CHECK-NEXT: @ %bb.5:37; CHECK-NEXT: pop.w {r4, lr}38; CHECK-NEXT: bx lr39; CHECK-NEXT: .p2align 440; CHECK-NEXT: @ %bb.6:41; CHECK-NEXT: .LCPI0_0:42; CHECK-NEXT: .long 4294967280 @ 0xfffffff043; CHECK-NEXT: .long 4294967284 @ 0xfffffff444; CHECK-NEXT: .long 4294967288 @ 0xfffffff845; CHECK-NEXT: .long 4294967292 @ 0xfffffffc46entry:47 %cmp22 = icmp sgt i32 %n, 048 br i1 %cmp22, label %vector.ph, label %for.cond.cleanup49 50vector.ph: ; preds = %for.body.preheader51 %n.vec = and i32 %n, -452 br label %vector.body53 54vector.body: ; preds = %vector.body, %vector.ph55 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]56 %vec.ind = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %vector.ph ], [ %vec.ind.next, %vector.body ]57 %0 = getelementptr inbounds i32, ptr %data, <4 x i32> %vec.ind58 %wide.masked.gather = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %0, i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef)59 %1 = getelementptr inbounds i32, ptr %dst, i32 %index60 store <4 x i32> %wide.masked.gather, ptr %1, align 461 %index.next = add i32 %index, 462 %vec.ind.next = add <4 x i32> %vec.ind, <i32 4, i32 4, i32 4, i32 4>63 %2 = icmp eq i32 %index.next, %n.vec64 br i1 %2, label %middle.block, label %vector.body65 66middle.block: ; preds = %vector.body67 %cmp.n = icmp eq i32 %n.vec, %n68 br i1 %cmp.n, label %for.cond.cleanup, label %vector.ph69 70for.cond.cleanup: ; preds = %for.body, %middle.block, %entry71 ret void72}73 74declare <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr>, i32, <4 x i1>, <4 x i32>)75