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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -O3 -mattr=+mve.fp,+use-mipipeliner -mcpu=cortex-m55 %s -o - -verify-machineinstrs --pipeliner-force-issue-width=10 | FileCheck %s3 4define void @arm_cmplx_dot_prod_q15(ptr noundef %pSrcA, ptr noundef %pSrcB, i32 noundef %numSamples, ptr nocapture noundef writeonly %realResult, ptr nocapture noundef writeonly %imagResult) {5; CHECK-LABEL: arm_cmplx_dot_prod_q15:6; CHECK: @ %bb.0: @ %entry7; CHECK-NEXT: .save {r4, r5, r6, r7, r8, lr}8; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, lr}9; CHECK-NEXT: ldr.w r12, [sp, #24]10; CHECK-NEXT: cmp r2, #1611; CHECK-NEXT: blo .LBB0_512; CHECK-NEXT: @ %bb.1: @ %while.body.preheader13; CHECK-NEXT: movs r6, #214; CHECK-NEXT: lsrs r7, r2, #315; CHECK-NEXT: rsb r6, r6, r2, lsr #316; CHECK-NEXT: cmp r7, #217; CHECK-NEXT: mov.w r5, #018; CHECK-NEXT: csel r7, r6, r5, hs19; CHECK-NEXT: add.w lr, r7, #120; CHECK-NEXT: mov r4, r521; CHECK-NEXT: vldrh.u16 q0, [r0], #3222; CHECK-NEXT: movs r7, #023; CHECK-NEXT: mov r8, r524; CHECK-NEXT: vldrh.u16 q1, [r1], #3225; CHECK-NEXT: vmlsldava.s16 r4, r7, q0, q126; CHECK-NEXT: vldrh.u16 q2, [r0, #-16]27; CHECK-NEXT: vmlaldavax.s16 r8, r5, q0, q128; CHECK-NEXT: vldrh.u16 q3, [r1, #-16]29; CHECK-NEXT: vmlsldava.s16 r4, r7, q2, q330; CHECK-NEXT: vldrh.u16 q0, [r1], #3231; CHECK-NEXT: sub.w lr, lr, #132; CHECK-NEXT: cmp.w lr, #033; CHECK-NEXT: vldrh.u16 q1, [r0], #3234; CHECK-NEXT: beq .LBB0_335; CHECK-NEXT: .p2align 236; CHECK-NEXT: .LBB0_2: @ %while.body37; CHECK-NEXT: @ =>This Inner Loop Header: Depth=138; CHECK-NEXT: vmlaldavax.s16 r8, r5, q2, q339; CHECK-NEXT: vldrh.u16 q3, [r1, #-16]40; CHECK-NEXT: vmlsldava.s16 r4, r7, q1, q041; CHECK-NEXT: vldrh.u16 q2, [r0, #-16]42; CHECK-NEXT: vmlaldavax.s16 r8, r5, q1, q043; CHECK-NEXT: vldrh.u16 q1, [r0], #3244; CHECK-NEXT: vmlsldava.s16 r4, r7, q2, q345; CHECK-NEXT: vldrh.u16 q0, [r1], #3246; CHECK-NEXT: le lr, .LBB0_247; CHECK-NEXT: .LBB0_3:48; CHECK-NEXT: vmlaldavax.s16 r8, r5, q2, q349; CHECK-NEXT: movs r6, #1450; CHECK-NEXT: and.w r2, r6, r2, lsl #151; CHECK-NEXT: vmlaldavax.s16 r8, r5, q1, q052; CHECK-NEXT: vldrh.u16 q2, [r0, #-16]53; CHECK-NEXT: vmlsldava.s16 r4, r7, q1, q054; CHECK-NEXT: vldrh.u16 q0, [r1, #-16]55; CHECK-NEXT: vmlaldavax.s16 r8, r5, q2, q056; CHECK-NEXT: vctp.16 r257; CHECK-NEXT: vmlsldava.s16 r4, r7, q2, q058; CHECK-NEXT: vpst59; CHECK-NEXT: vldrht.u16 q1, [r0]60; CHECK-NEXT: cmp r2, #961; CHECK-NEXT: vpsttt62; CHECK-NEXT: vldrht.u16 q0, [r1]63; CHECK-NEXT: vmlsldavat.s16 r4, r7, q1, q064; CHECK-NEXT: vmlaldavaxt.s16 r8, r5, q1, q065; CHECK-NEXT: blo .LBB0_1066; CHECK-NEXT: @ %bb.4: @ %do.body.167; CHECK-NEXT: subs r2, #868; CHECK-NEXT: vctp.16 r269; CHECK-NEXT: vpstttt70; CHECK-NEXT: vldrht.u16 q0, [r0, #16]71; CHECK-NEXT: vldrht.u16 q1, [r1, #16]72; CHECK-NEXT: vmlsldavat.s16 r4, r7, q0, q173; CHECK-NEXT: vmlaldavaxt.s16 r8, r5, q0, q174; CHECK-NEXT: b .LBB0_1075; CHECK-NEXT: .p2align 276; CHECK-NEXT: .LBB0_5: @ %if.else77; CHECK-NEXT: mov.w r4, #078; CHECK-NEXT: cbz r2, .LBB0_979; CHECK-NEXT: @ %bb.6: @ %while.body14.preheader80; CHECK-NEXT: lsls r6, r2, #181; CHECK-NEXT: mov r5, r482; CHECK-NEXT: mov r7, r483; CHECK-NEXT: movs r2, #084; CHECK-NEXT: dlstp.16 lr, r685; CHECK-NEXT: .p2align 286; CHECK-NEXT: .LBB0_7: @ %while.body1487; CHECK-NEXT: @ =>This Inner Loop Header: Depth=188; CHECK-NEXT: vldrh.u16 q0, [r0], #1689; CHECK-NEXT: vldrh.u16 q1, [r1], #1690; CHECK-NEXT: vmlsldava.s16 r2, r7, q0, q191; CHECK-NEXT: vmlaldavax.s16 r4, r5, q0, q192; CHECK-NEXT: letp lr, .LBB0_793; CHECK-NEXT: @ %bb.8: @ %if.end.loopexit17794; CHECK-NEXT: mov r8, r495; CHECK-NEXT: mov r4, r296; CHECK-NEXT: b .LBB0_1097; CHECK-NEXT: .p2align 298; CHECK-NEXT: .LBB0_9:99; CHECK-NEXT: mov r7, r4100; CHECK-NEXT: mov.w r8, #0101; CHECK-NEXT: mov r5, r4102; CHECK-NEXT: .LBB0_10: @ %if.end103; CHECK-NEXT: asrl r4, r7, #6104; CHECK-NEXT: asrl r8, r5, #6105; CHECK-NEXT: str r4, [r3]106; CHECK-NEXT: str.w r8, [r12]107; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, pc}108entry:109 %cmp = icmp ugt i32 %numSamples, 15110 br i1 %cmp, label %while.body.preheader, label %if.else111 112while.body.preheader: ; preds = %entry113 %vecSrcA.0138 = load <8 x i16>, ptr %pSrcA, align 2114 %vecSrcB.0137 = load <8 x i16>, ptr %pSrcB, align 2115 %pSrcB.addr.0136 = getelementptr inbounds i16, ptr %pSrcB, i32 8116 %pSrcA.addr.0135 = getelementptr inbounds i16, ptr %pSrcA, i32 8117 %shr = lshr i32 %numSamples, 3118 br label %while.body119 120while.body: ; preds = %while.body.preheader, %while.body121 %vecSrcA.0150 = phi <8 x i16> [ %vecSrcA.0, %while.body ], [ %vecSrcA.0138, %while.body.preheader ]122 %vecSrcB.0149 = phi <8 x i16> [ %vecSrcB.0, %while.body ], [ %vecSrcB.0137, %while.body.preheader ]123 %pSrcB.addr.0148 = phi ptr [ %pSrcB.addr.0, %while.body ], [ %pSrcB.addr.0136, %while.body.preheader ]124 %pSrcA.addr.0147 = phi ptr [ %pSrcA.addr.0, %while.body ], [ %pSrcA.addr.0135, %while.body.preheader ]125 %vecSrcB.0.in146 = phi ptr [ %add.ptr4, %while.body ], [ %pSrcB, %while.body.preheader ]126 %vecSrcA.0.in145 = phi ptr [ %add.ptr3, %while.body ], [ %pSrcA, %while.body.preheader ]127 %accImag.0.off32144 = phi i32 [ %12, %while.body ], [ 0, %while.body.preheader ]128 %accImag.0.off0143 = phi i32 [ %13, %while.body ], [ 0, %while.body.preheader ]129 %accReal.0.off32142 = phi i32 [ %9, %while.body ], [ 0, %while.body.preheader ]130 %accReal.0.off0141 = phi i32 [ %10, %while.body ], [ 0, %while.body.preheader ]131 %blkCnt.0.in140 = phi i32 [ %blkCnt.0, %while.body ], [ %shr, %while.body.preheader ]132 %blkCnt.0 = add nsw i32 %blkCnt.0.in140, -1133 %0 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32 0, i32 1, i32 0, i32 %accReal.0.off0141, i32 %accReal.0.off32142, <8 x i16> %vecSrcA.0150, <8 x i16> %vecSrcB.0149)134 %1 = extractvalue { i32, i32 } %0, 1135 %2 = extractvalue { i32, i32 } %0, 0136 %3 = load <8 x i16>, ptr %pSrcA.addr.0147, align 2137 %add.ptr3 = getelementptr inbounds i16, ptr %vecSrcA.0.in145, i32 16138 %4 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32 0, i32 0, i32 1, i32 %accImag.0.off0143, i32 %accImag.0.off32144, <8 x i16> %vecSrcA.0150, <8 x i16> %vecSrcB.0149)139 %5 = extractvalue { i32, i32 } %4, 1140 %6 = extractvalue { i32, i32 } %4, 0141 %7 = load <8 x i16>, ptr %pSrcB.addr.0148, align 2142 %add.ptr4 = getelementptr inbounds i16, ptr %vecSrcB.0.in146, i32 16143 %8 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32 0, i32 1, i32 0, i32 %2, i32 %1, <8 x i16> %3, <8 x i16> %7)144 %9 = extractvalue { i32, i32 } %8, 1145 %10 = extractvalue { i32, i32 } %8, 0146 %11 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32 0, i32 0, i32 1, i32 %6, i32 %5, <8 x i16> %3, <8 x i16> %7)147 %12 = extractvalue { i32, i32 } %11, 1148 %13 = extractvalue { i32, i32 } %11, 0149 %pSrcA.addr.0 = getelementptr inbounds i16, ptr %vecSrcA.0.in145, i32 24150 %pSrcB.addr.0 = getelementptr inbounds i16, ptr %vecSrcB.0.in146, i32 24151 %vecSrcB.0 = load <8 x i16>, ptr %add.ptr4, align 2152 %vecSrcA.0 = load <8 x i16>, ptr %add.ptr3, align 2153 %cmp2 = icmp ugt i32 %blkCnt.0.in140, 2154 br i1 %cmp2, label %while.body, label %do.body155 156do.body: ; preds = %while.body157 %and = shl i32 %numSamples, 1158 %mul = and i32 %and, 14159 %14 = extractvalue { i32, i32 } %11, 0160 %15 = extractvalue { i32, i32 } %11, 1161 %16 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32 0, i32 0, i32 1, i32 %14, i32 %15, <8 x i16> %vecSrcA.0, <8 x i16> %vecSrcB.0)162 %17 = extractvalue { i32, i32 } %16, 0163 %18 = extractvalue { i32, i32 } %16, 1164 %19 = load <8 x i16>, ptr %pSrcA.addr.0, align 2165 %20 = load <8 x i16>, ptr %pSrcB.addr.0, align 2166 %21 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32 0, i32 0, i32 1, i32 %17, i32 %18, <8 x i16> %19, <8 x i16> %20)167 %22 = extractvalue { i32, i32 } %8, 0168 %23 = extractvalue { i32, i32 } %8, 1169 %24 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32 0, i32 1, i32 0, i32 %22, i32 %23, <8 x i16> %vecSrcA.0, <8 x i16> %vecSrcB.0)170 %25 = extractvalue { i32, i32 } %24, 0171 %26 = extractvalue { i32, i32 } %24, 1172 %27 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32 0, i32 1, i32 0, i32 %25, i32 %26, <8 x i16> %19, <8 x i16> %20)173 %accImag.1.off32 = extractvalue { i32, i32 } %21, 1174 %accImag.1.off0 = extractvalue { i32, i32 } %21, 0175 %accReal.1.off32 = extractvalue { i32, i32 } %27, 1176 %accReal.1.off0 = extractvalue { i32, i32 } %27, 0177 %28 = tail call <8 x i1> @llvm.arm.mve.vctp16(i32 %mul)178 %add.ptr7 = getelementptr inbounds i16, ptr %vecSrcA.0.in145, i32 32179 %add.ptr8 = getelementptr inbounds i16, ptr %vecSrcB.0.in146, i32 32180 %29 = tail call <8 x i16> @llvm.masked.load.v8i16.p0(ptr nonnull %add.ptr7, i32 2, <8 x i1> %28, <8 x i16> zeroinitializer)181 %30 = tail call <8 x i16> @llvm.masked.load.v8i16.p0(ptr nonnull %add.ptr8, i32 2, <8 x i1> %28, <8 x i16> zeroinitializer)182 %31 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.predicated.v8i16.v8i1(i32 0, i32 1, i32 0, i32 %accReal.1.off0, i32 %accReal.1.off32, <8 x i16> %29, <8 x i16> %30, <8 x i1> %28)183 %32 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 1, i32 %accImag.1.off0, i32 %accImag.1.off32, <8 x i16> %29, <8 x i16> %30, <8 x i1> %28)184 %cmp10 = icmp ugt i32 %mul, 8185 br i1 %cmp10, label %do.body.1, label %if.end.loopexit186 187do.body.1: ; preds = %do.body188 %sub9 = add nsw i32 %mul, -8189 %accImag.1.off32.1 = extractvalue { i32, i32 } %32, 1190 %accImag.1.off0.1 = extractvalue { i32, i32 } %32, 0191 %accReal.1.off32.1 = extractvalue { i32, i32 } %31, 1192 %accReal.1.off0.1 = extractvalue { i32, i32 } %31, 0193 %33 = tail call <8 x i1> @llvm.arm.mve.vctp16(i32 %sub9)194 %add.ptr7.1 = getelementptr inbounds i16, ptr %vecSrcA.0.in145, i32 40195 %add.ptr8.1 = getelementptr inbounds i16, ptr %vecSrcB.0.in146, i32 40196 %34 = tail call <8 x i16> @llvm.masked.load.v8i16.p0(ptr nonnull %add.ptr7.1, i32 2, <8 x i1> %33, <8 x i16> zeroinitializer)197 %35 = tail call <8 x i16> @llvm.masked.load.v8i16.p0(ptr nonnull %add.ptr8.1, i32 2, <8 x i1> %33, <8 x i16> zeroinitializer)198 %36 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.predicated.v8i16.v8i1(i32 0, i32 1, i32 0, i32 %accReal.1.off0.1, i32 %accReal.1.off32.1, <8 x i16> %34, <8 x i16> %35, <8 x i1> %33)199 %37 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 1, i32 %accImag.1.off0.1, i32 %accImag.1.off32.1, <8 x i16> %34, <8 x i16> %35, <8 x i1> %33)200 br label %if.end.loopexit201 202if.else: ; preds = %entry203 %cmp13120.not = icmp eq i32 %numSamples, 0204 br i1 %cmp13120.not, label %if.end, label %while.body14.preheader205 206while.body14.preheader: ; preds = %if.else207 %mul11 = shl nuw nsw i32 %numSamples, 1208 br label %while.body14209 210while.body14: ; preds = %while.body14.preheader, %while.body14211 %pSrcA.addr.2127 = phi ptr [ %add.ptr16, %while.body14 ], [ %pSrcA, %while.body14.preheader ]212 %pSrcB.addr.2126 = phi ptr [ %add.ptr17, %while.body14 ], [ %pSrcB, %while.body14.preheader ]213 %accImag.2.off32125 = phi i32 [ %45, %while.body14 ], [ 0, %while.body14.preheader ]214 %accImag.2.off0124 = phi i32 [ %46, %while.body14 ], [ 0, %while.body14.preheader ]215 %accReal.2.off32123 = phi i32 [ %42, %while.body14 ], [ 0, %while.body14.preheader ]216 %accReal.2.off0122 = phi i32 [ %43, %while.body14 ], [ 0, %while.body14.preheader ]217 %blkCnt.2121 = phi i32 [ %sub18, %while.body14 ], [ %mul11, %while.body14.preheader ]218 %38 = tail call <8 x i1> @llvm.arm.mve.vctp16(i32 %blkCnt.2121)219 %39 = tail call <8 x i16> @llvm.masked.load.v8i16.p0(ptr %pSrcA.addr.2127, i32 2, <8 x i1> %38, <8 x i16> zeroinitializer)220 %40 = tail call <8 x i16> @llvm.masked.load.v8i16.p0(ptr %pSrcB.addr.2126, i32 2, <8 x i1> %38, <8 x i16> zeroinitializer)221 %41 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.predicated.v8i16.v8i1(i32 0, i32 1, i32 0, i32 %accReal.2.off0122, i32 %accReal.2.off32123, <8 x i16> %39, <8 x i16> %40, <8 x i1> %38)222 %42 = extractvalue { i32, i32 } %41, 1223 %43 = extractvalue { i32, i32 } %41, 0224 %44 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 1, i32 %accImag.2.off0124, i32 %accImag.2.off32125, <8 x i16> %39, <8 x i16> %40, <8 x i1> %38)225 %45 = extractvalue { i32, i32 } %44, 1226 %46 = extractvalue { i32, i32 } %44, 0227 %add.ptr16 = getelementptr inbounds i16, ptr %pSrcA.addr.2127, i32 8228 %add.ptr17 = getelementptr inbounds i16, ptr %pSrcB.addr.2126, i32 8229 %sub18 = add nsw i32 %blkCnt.2121, -8230 %cmp13 = icmp ugt i32 %blkCnt.2121, 8231 br i1 %cmp13, label %while.body14, label %if.end.loopexit177232 233if.end.loopexit: ; preds = %do.body.1, %do.body234 %.lcssa200 = phi { i32, i32 } [ %31, %do.body ], [ %36, %do.body.1 ]235 %.lcssa = phi { i32, i32 } [ %32, %do.body ], [ %37, %do.body.1 ]236 %47 = extractvalue { i32, i32 } %.lcssa200, 1237 %48 = extractvalue { i32, i32 } %.lcssa200, 0238 %49 = extractvalue { i32, i32 } %.lcssa, 1239 %50 = extractvalue { i32, i32 } %.lcssa, 0240 br label %if.end241 242if.end.loopexit177: ; preds = %while.body14243 %51 = extractvalue { i32, i32 } %41, 1244 %52 = extractvalue { i32, i32 } %41, 0245 %53 = extractvalue { i32, i32 } %44, 1246 %54 = extractvalue { i32, i32 } %44, 0247 br label %if.end248 249if.end: ; preds = %if.end.loopexit177, %if.else, %if.end.loopexit250 %accReal.3.off0 = phi i32 [ %48, %if.end.loopexit ], [ 0, %if.else ], [ %52, %if.end.loopexit177 ]251 %accReal.3.off32 = phi i32 [ %47, %if.end.loopexit ], [ 0, %if.else ], [ %51, %if.end.loopexit177 ]252 %accImag.3.off0 = phi i32 [ %50, %if.end.loopexit ], [ 0, %if.else ], [ %54, %if.end.loopexit177 ]253 %accImag.3.off32 = phi i32 [ %49, %if.end.loopexit ], [ 0, %if.else ], [ %53, %if.end.loopexit177 ]254 %55 = tail call { i32, i32 } @llvm.arm.mve.asrl(i32 %accReal.3.off0, i32 %accReal.3.off32, i32 6)255 %56 = extractvalue { i32, i32 } %55, 0256 store i32 %56, ptr %realResult, align 4257 %57 = tail call { i32, i32 } @llvm.arm.mve.asrl(i32 %accImag.3.off0, i32 %accImag.3.off32, i32 6)258 %58 = extractvalue { i32, i32 } %57, 0259 store i32 %58, ptr %imagResult, align 4260 ret void261}262 263declare { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32, i32, i32, i32, i32, <8 x i16>, <8 x i16>) #1264declare <8 x i1> @llvm.arm.mve.vctp16(i32) #1265declare <8 x i16> @llvm.masked.load.v8i16.p0(ptr, i32 immarg, <8 x i1>, <8 x i16>) #2266declare { i32, i32 } @llvm.arm.mve.vmlldava.predicated.v8i16.v8i1(i32, i32, i32, i32, i32, <8 x i16>, <8 x i16>, <8 x i1>) #1267declare { i32, i32 } @llvm.arm.mve.asrl(i32, i32, i32) #1268