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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp %s -o - | FileCheck %s3 4%struct.DCT_InstanceTypeDef = type { ptr, i32, i32 }5 6define void @DCT_mve1(ptr nocapture readonly %S, ptr nocapture readonly %pIn, ptr nocapture %pOut) {7; CHECK-LABEL: DCT_mve1:8; CHECK: @ %bb.0: @ %entry9; CHECK-NEXT: ldr r3, [r0, #4]10; CHECK-NEXT: sub.w r12, r3, #111; CHECK-NEXT: cmp.w r12, #212; CHECK-NEXT: it lo13; CHECK-NEXT: bxlo lr14; CHECK-NEXT: .LBB0_1: @ %for.body.preheader15; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, lr}16; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, lr}17; CHECK-NEXT: ldr r5, [r0, #8]18; CHECK-NEXT: ldr r3, [r0]19; CHECK-NEXT: add.w r3, r3, r5, lsl #220; CHECK-NEXT: movs r0, #121; CHECK-NEXT: lsl.w r9, r5, #222; CHECK-NEXT: .LBB0_2: @ %for.body23; CHECK-NEXT: @ =>This Loop Header: Depth=124; CHECK-NEXT: @ Child Loop BB0_3 Depth 225; CHECK-NEXT: vmov.i32 q0, #0x026; CHECK-NEXT: mov r6, r127; CHECK-NEXT: mov r7, r328; CHECK-NEXT: dlstp.32 lr, r529; CHECK-NEXT: .LBB0_3: @ %vector.body30; CHECK-NEXT: @ Parent Loop BB0_2 Depth=131; CHECK-NEXT: @ => This Inner Loop Header: Depth=232; CHECK-NEXT: vldrw.u32 q1, [r6], #1633; CHECK-NEXT: vldrw.u32 q2, [r7], #1634; CHECK-NEXT: vfma.f32 q0, q2, q135; CHECK-NEXT: letp lr, .LBB0_336; CHECK-NEXT: @ %bb.4: @ %middle.block37; CHECK-NEXT: @ in Loop: Header=BB0_2 Depth=138; CHECK-NEXT: vadd.f32 s2, s2, s339; CHECK-NEXT: add.w r7, r2, r0, lsl #240; CHECK-NEXT: vadd.f32 s0, s0, s141; CHECK-NEXT: adds r0, #142; CHECK-NEXT: add r3, r943; CHECK-NEXT: cmp r0, r1244; CHECK-NEXT: vadd.f32 s0, s0, s245; CHECK-NEXT: vstr s0, [r7]46; CHECK-NEXT: bne .LBB0_247; CHECK-NEXT: @ %bb.5:48; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, lr}49; CHECK-NEXT: bx lr50entry:51 %NumInputs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 252 %i = load i32, ptr %NumInputs, align 453 %NumFilters = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 154 %i1 = load i32, ptr %NumFilters, align 455 %pDCTCoefs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 056 %i2 = load ptr, ptr %pDCTCoefs, align 457 %cmp = icmp ugt i32 %i, 158 tail call void @llvm.assume(i1 %cmp)59 %sub = add i32 %i1, -160 %cmp350 = icmp ugt i32 %sub, 161 br i1 %cmp350, label %for.body.preheader, label %for.cond.cleanup62 63for.body.preheader: ; preds = %entry64 %n.rnd.up = add i32 %i, 365 %n.vec = and i32 %n.rnd.up, -466 br label %for.body67 68for.cond.cleanup: ; preds = %middle.block, %entry69 ret void70 71for.body: ; preds = %middle.block, %for.body.preheader72 %k2.051 = phi i32 [ %add16, %middle.block ], [ 1, %for.body.preheader ]73 %mul4 = mul i32 %k2.051, %i74 br label %vector.body75 76vector.body: ; preds = %vector.body, %for.body77 %index = phi i32 [ 0, %for.body ], [ %index.next, %vector.body ]78 %vec.phi = phi <4 x float> [ zeroinitializer, %for.body ], [ %i10, %vector.body ]79 %active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %i)80 %i3 = getelementptr inbounds float, ptr %pIn, i32 %index81 %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i3, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)82 %i5 = add i32 %index, %mul483 %i6 = getelementptr inbounds float, ptr %i2, i32 %i584 %wide.masked.load53 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i6, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)85 %i8 = fmul fast <4 x float> %wide.masked.load53, %wide.masked.load86 %i9 = fadd fast <4 x float> %i8, %vec.phi87 %i10 = select <4 x i1> %active.lane.mask, <4 x float> %i9, <4 x float> %vec.phi88 %index.next = add i32 %index, 489 %i11 = icmp eq i32 %index.next, %n.vec90 br i1 %i11, label %middle.block, label %vector.body91 92middle.block: ; preds = %vector.body93 %i12 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i10)94 %arrayidx14 = getelementptr inbounds float, ptr %pOut, i32 %k2.05195 store float %i12, ptr %arrayidx14, align 496 %add16 = add nuw i32 %k2.051, 197 %exitcond52.not = icmp eq i32 %add16, %sub98 br i1 %exitcond52.not, label %for.cond.cleanup, label %for.body99}100 101define void @DCT_mve2(ptr nocapture readonly %S, ptr nocapture readonly %pIn, ptr nocapture %pOut) {102; CHECK-LABEL: DCT_mve2:103; CHECK: @ %bb.0: @ %entry104; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}105; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}106; CHECK-NEXT: .pad #4107; CHECK-NEXT: sub sp, #4108; CHECK-NEXT: str r1, [sp] @ 4-byte Spill109; CHECK-NEXT: ldr r1, [r0, #4]110; CHECK-NEXT: subs r1, #2111; CHECK-NEXT: cmp r1, #2112; CHECK-NEXT: blo .LBB1_5113; CHECK-NEXT: @ %bb.1: @ %for.body.preheader114; CHECK-NEXT: ldr.w r12, [r0, #8]115; CHECK-NEXT: movs r4, #1116; CHECK-NEXT: ldr r3, [r0]117; CHECK-NEXT: add.w r11, r3, r12, lsl #2118; CHECK-NEXT: add.w r6, r3, r12, lsl #3119; CHECK-NEXT: lsl.w r10, r12, #3120; CHECK-NEXT: .LBB1_2: @ %for.body121; CHECK-NEXT: @ =>This Loop Header: Depth=1122; CHECK-NEXT: @ Child Loop BB1_3 Depth 2123; CHECK-NEXT: ldr r5, [sp] @ 4-byte Reload124; CHECK-NEXT: add.w r9, r4, #1125; CHECK-NEXT: vmov.i32 q0, #0x0126; CHECK-NEXT: mov r3, r11127; CHECK-NEXT: mov r0, r6128; CHECK-NEXT: vmov.i32 q1, #0x0129; CHECK-NEXT: dlstp.32 lr, r12130; CHECK-NEXT: .LBB1_3: @ %vector.body131; CHECK-NEXT: @ Parent Loop BB1_2 Depth=1132; CHECK-NEXT: @ => This Inner Loop Header: Depth=2133; CHECK-NEXT: vldrw.u32 q2, [r5], #16134; CHECK-NEXT: vldrw.u32 q3, [r3], #16135; CHECK-NEXT: vfma.f32 q1, q3, q2136; CHECK-NEXT: vldrw.u32 q3, [r0], #16137; CHECK-NEXT: vfma.f32 q0, q3, q2138; CHECK-NEXT: letp lr, .LBB1_3139; CHECK-NEXT: @ %bb.4: @ %middle.block140; CHECK-NEXT: @ in Loop: Header=BB1_2 Depth=1141; CHECK-NEXT: vadd.f32 s2, s2, s3142; CHECK-NEXT: add.w r0, r2, r9, lsl #2143; CHECK-NEXT: vadd.f32 s0, s0, s1144; CHECK-NEXT: add r11, r10145; CHECK-NEXT: vadd.f32 s6, s6, s7146; CHECK-NEXT: add r6, r10147; CHECK-NEXT: vadd.f32 s4, s4, s5148; CHECK-NEXT: vadd.f32 s0, s0, s2149; CHECK-NEXT: vadd.f32 s2, s4, s6150; CHECK-NEXT: vstr s0, [r0]151; CHECK-NEXT: add.w r0, r2, r4, lsl #2152; CHECK-NEXT: adds r4, #2153; CHECK-NEXT: cmp r4, r1154; CHECK-NEXT: vstr s2, [r0]155; CHECK-NEXT: blo .LBB1_2156; CHECK-NEXT: .LBB1_5: @ %for.cond.cleanup157; CHECK-NEXT: add sp, #4158; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}159entry:160 %NumInputs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 2161 %i = load i32, ptr %NumInputs, align 4162 %NumFilters = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 1163 %i1 = load i32, ptr %NumFilters, align 4164 %pDCTCoefs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 0165 %i2 = load ptr, ptr %pDCTCoefs, align 4166 %cmp = icmp ugt i32 %i, 1167 tail call void @llvm.assume(i1 %cmp)168 %sub = add i32 %i1, -2169 %cmp371 = icmp ugt i32 %sub, 1170 br i1 %cmp371, label %for.body.preheader, label %for.cond.cleanup171 172for.body.preheader: ; preds = %entry173 %n.rnd.up = add i32 %i, 3174 %n.vec = and i32 %n.rnd.up, -4175 br label %for.body176 177for.cond.cleanup: ; preds = %middle.block, %entry178 ret void179 180for.body: ; preds = %middle.block, %for.body.preheader181 %k2.072 = phi i32 [ %add25, %middle.block ], [ 1, %for.body.preheader ]182 %mul4 = mul i32 %k2.072, %i183 %add = add nuw i32 %k2.072, 1184 %mul5 = mul i32 %add, %i185 br label %vector.body186 187vector.body: ; preds = %vector.body, %for.body188 %index = phi i32 [ 0, %for.body ], [ %index.next, %vector.body ]189 %vec.phi = phi <4 x float> [ zeroinitializer, %for.body ], [ %i15, %vector.body ]190 %vec.phi73 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i16, %vector.body ]191 %active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %i)192 %i3 = getelementptr inbounds float, ptr %pIn, i32 %index193 %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i3, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)194 %i5 = add i32 %index, %mul4195 %i6 = getelementptr inbounds float, ptr %i2, i32 %i5196 %wide.masked.load74 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i6, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)197 %i8 = fmul fast <4 x float> %wide.masked.load74, %wide.masked.load198 %i9 = fadd fast <4 x float> %i8, %vec.phi73199 %i10 = add i32 %index, %mul5200 %i11 = getelementptr inbounds float, ptr %i2, i32 %i10201 %wide.masked.load75 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i11, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)202 %i13 = fmul fast <4 x float> %wide.masked.load75, %wide.masked.load203 %i14 = fadd fast <4 x float> %i13, %vec.phi204 %i15 = select <4 x i1> %active.lane.mask, <4 x float> %i14, <4 x float> %vec.phi205 %i16 = select <4 x i1> %active.lane.mask, <4 x float> %i9, <4 x float> %vec.phi73206 %index.next = add i32 %index, 4207 %i17 = icmp eq i32 %index.next, %n.vec208 br i1 %i17, label %middle.block, label %vector.body209 210middle.block: ; preds = %vector.body211 %i18 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i16)212 %i19 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i15)213 %arrayidx21 = getelementptr inbounds float, ptr %pOut, i32 %k2.072214 store float %i18, ptr %arrayidx21, align 4215 %arrayidx23 = getelementptr inbounds float, ptr %pOut, i32 %add216 store float %i19, ptr %arrayidx23, align 4217 %add25 = add i32 %k2.072, 2218 %cmp3 = icmp ult i32 %add25, %sub219 br i1 %cmp3, label %for.body, label %for.cond.cleanup220}221 222define void @DCT_mve3(ptr nocapture readonly %S, ptr nocapture readonly %pIn, ptr nocapture %pOut) {223; CHECK-LABEL: DCT_mve3:224; CHECK: @ %bb.0: @ %entry225; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}226; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}227; CHECK-NEXT: .pad #4228; CHECK-NEXT: sub sp, #4229; CHECK-NEXT: .vsave {d8, d9}230; CHECK-NEXT: vpush {d8, d9}231; CHECK-NEXT: .pad #16232; CHECK-NEXT: sub sp, #16233; CHECK-NEXT: str r1, [sp, #12] @ 4-byte Spill234; CHECK-NEXT: ldr r1, [r0, #4]235; CHECK-NEXT: subs r1, #3236; CHECK-NEXT: str r1, [sp, #8] @ 4-byte Spill237; CHECK-NEXT: cmp r1, #2238; CHECK-NEXT: blo .LBB2_5239; CHECK-NEXT: @ %bb.1: @ %for.body.preheader240; CHECK-NEXT: ldr.w r9, [r0, #8]241; CHECK-NEXT: movs r5, #1242; CHECK-NEXT: ldr r1, [r0]243; CHECK-NEXT: add.w r3, r9, #3244; CHECK-NEXT: bic r3, r3, #3245; CHECK-NEXT: add.w r0, r9, r9, lsl #1246; CHECK-NEXT: subs r3, #4247; CHECK-NEXT: add.w r10, r1, r9, lsl #2248; CHECK-NEXT: add.w r12, r1, r9, lsl #3249; CHECK-NEXT: add.w r1, r1, r0, lsl #2250; CHECK-NEXT: add.w r3, r5, r3, lsr #2251; CHECK-NEXT: str r3, [sp, #4] @ 4-byte Spill252; CHECK-NEXT: ldr r7, [sp, #4] @ 4-byte Reload253; CHECK-NEXT: lsl.w r11, r0, #2254; CHECK-NEXT: .LBB2_2: @ %for.body255; CHECK-NEXT: @ =>This Loop Header: Depth=1256; CHECK-NEXT: @ Child Loop BB2_3 Depth 2257; CHECK-NEXT: ldr r6, [sp, #12] @ 4-byte Reload258; CHECK-NEXT: vmov.i32 q0, #0x0259; CHECK-NEXT: mov r3, r10260; CHECK-NEXT: mov r0, r12261; CHECK-NEXT: mov r4, r1262; CHECK-NEXT: vmov.i32 q2, #0x0263; CHECK-NEXT: vmov.i32 q1, #0x0264; CHECK-NEXT: dlstp.32 lr, r9265; CHECK-NEXT: .LBB2_3: @ %vector.body266; CHECK-NEXT: @ Parent Loop BB2_2 Depth=1267; CHECK-NEXT: @ => This Inner Loop Header: Depth=2268; CHECK-NEXT: vldrw.u32 q3, [r6], #16269; CHECK-NEXT: vldrw.u32 q4, [r3], #16270; CHECK-NEXT: vfma.f32 q1, q4, q3271; CHECK-NEXT: vldrw.u32 q4, [r0], #16272; CHECK-NEXT: vfma.f32 q2, q4, q3273; CHECK-NEXT: vldrw.u32 q4, [r4], #16274; CHECK-NEXT: vfma.f32 q0, q4, q3275; CHECK-NEXT: letp lr, .LBB2_3276; CHECK-NEXT: @ %bb.4: @ %middle.block277; CHECK-NEXT: @ in Loop: Header=BB2_2 Depth=1278; CHECK-NEXT: vadd.f32 s10, s10, s11279; CHECK-NEXT: adds r0, r5, #1280; CHECK-NEXT: vadd.f32 s8, s8, s9281; CHECK-NEXT: add r10, r11282; CHECK-NEXT: vadd.f32 s6, s6, s7283; CHECK-NEXT: add.w r0, r2, r0, lsl #2284; CHECK-NEXT: vadd.f32 s4, s4, s5285; CHECK-NEXT: add r12, r11286; CHECK-NEXT: vadd.f32 s2, s2, s3287; CHECK-NEXT: add r1, r11288; CHECK-NEXT: vadd.f32 s0, s0, s1289; CHECK-NEXT: vadd.f32 s8, s8, s10290; CHECK-NEXT: vadd.f32 s4, s4, s6291; CHECK-NEXT: vadd.f32 s0, s0, s2292; CHECK-NEXT: vstr s8, [r0]293; CHECK-NEXT: add.w r0, r2, r5, lsl #2294; CHECK-NEXT: vstr s4, [r0]295; CHECK-NEXT: adds r0, r5, #2296; CHECK-NEXT: adds r5, #3297; CHECK-NEXT: add.w r0, r2, r0, lsl #2298; CHECK-NEXT: vstr s0, [r0]299; CHECK-NEXT: ldr r0, [sp, #8] @ 4-byte Reload300; CHECK-NEXT: cmp r5, r0301; CHECK-NEXT: blo .LBB2_2302; CHECK-NEXT: .LBB2_5: @ %for.cond.cleanup303; CHECK-NEXT: add sp, #16304; CHECK-NEXT: vpop {d8, d9}305; CHECK-NEXT: add sp, #4306; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}307entry:308 %NumInputs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 2309 %i = load i32, ptr %NumInputs, align 4310 %NumFilters = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 1311 %i1 = load i32, ptr %NumFilters, align 4312 %pDCTCoefs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 0313 %i2 = load ptr, ptr %pDCTCoefs, align 4314 %cmp = icmp ugt i32 %i, 1315 tail call void @llvm.assume(i1 %cmp)316 %sub = add i32 %i1, -3317 %cmp392 = icmp ugt i32 %sub, 1318 br i1 %cmp392, label %for.body.preheader, label %for.cond.cleanup319 320for.body.preheader: ; preds = %entry321 %n.rnd.up = add i32 %i, 3322 %n.vec = and i32 %n.rnd.up, -4323 br label %for.body324 325for.cond.cleanup: ; preds = %middle.block, %entry326 ret void327 328for.body: ; preds = %middle.block, %for.body.preheader329 %k2.093 = phi i32 [ %add34, %middle.block ], [ 1, %for.body.preheader ]330 %mul4 = mul i32 %k2.093, %i331 %add = add nuw i32 %k2.093, 1332 %mul5 = mul i32 %add, %i333 %add6 = add i32 %k2.093, 2334 %mul7 = mul i32 %add6, %i335 br label %vector.body336 337vector.body: ; preds = %vector.body, %for.body338 %index = phi i32 [ 0, %for.body ], [ %index.next, %vector.body ]339 %vec.phi = phi <4 x float> [ zeroinitializer, %for.body ], [ %i20, %vector.body ]340 %vec.phi94 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i21, %vector.body ]341 %vec.phi95 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i22, %vector.body ]342 %active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %i)343 %i3 = getelementptr inbounds float, ptr %pIn, i32 %index344 %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i3, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)345 %i5 = add i32 %index, %mul4346 %i6 = getelementptr inbounds float, ptr %i2, i32 %i5347 %wide.masked.load96 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i6, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)348 %i8 = fmul fast <4 x float> %wide.masked.load96, %wide.masked.load349 %i9 = fadd fast <4 x float> %i8, %vec.phi95350 %i10 = add i32 %index, %mul5351 %i11 = getelementptr inbounds float, ptr %i2, i32 %i10352 %wide.masked.load97 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i11, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)353 %i13 = fmul fast <4 x float> %wide.masked.load97, %wide.masked.load354 %i14 = fadd fast <4 x float> %i13, %vec.phi94355 %i15 = add i32 %index, %mul7356 %i16 = getelementptr inbounds float, ptr %i2, i32 %i15357 %wide.masked.load98 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i16, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)358 %i18 = fmul fast <4 x float> %wide.masked.load98, %wide.masked.load359 %i19 = fadd fast <4 x float> %i18, %vec.phi360 %i20 = select <4 x i1> %active.lane.mask, <4 x float> %i19, <4 x float> %vec.phi361 %i21 = select <4 x i1> %active.lane.mask, <4 x float> %i14, <4 x float> %vec.phi94362 %i22 = select <4 x i1> %active.lane.mask, <4 x float> %i9, <4 x float> %vec.phi95363 %index.next = add i32 %index, 4364 %i23 = icmp eq i32 %index.next, %n.vec365 br i1 %i23, label %middle.block, label %vector.body366 367middle.block: ; preds = %vector.body368 %i24 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i22)369 %i25 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i21)370 %i26 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i20)371 %arrayidx28 = getelementptr inbounds float, ptr %pOut, i32 %k2.093372 store float %i24, ptr %arrayidx28, align 4373 %arrayidx30 = getelementptr inbounds float, ptr %pOut, i32 %add374 store float %i25, ptr %arrayidx30, align 4375 %arrayidx32 = getelementptr inbounds float, ptr %pOut, i32 %add6376 store float %i26, ptr %arrayidx32, align 4377 %add34 = add i32 %k2.093, 3378 %cmp3 = icmp ult i32 %add34, %sub379 br i1 %cmp3, label %for.body, label %for.cond.cleanup380}381 382define void @DCT_mve4(ptr nocapture readonly %S, ptr nocapture readonly %pIn, ptr nocapture %pOut) {383; CHECK-LABEL: DCT_mve4:384; CHECK: @ %bb.0: @ %entry385; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}386; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}387; CHECK-NEXT: .pad #4388; CHECK-NEXT: sub sp, #4389; CHECK-NEXT: .vsave {d8, d9, d10, d11}390; CHECK-NEXT: vpush {d8, d9, d10, d11}391; CHECK-NEXT: .pad #24392; CHECK-NEXT: sub sp, #24393; CHECK-NEXT: str r1, [sp, #20] @ 4-byte Spill394; CHECK-NEXT: ldr r1, [r0, #4]395; CHECK-NEXT: str r2, [sp, #12] @ 4-byte Spill396; CHECK-NEXT: subs r1, #4397; CHECK-NEXT: str r1, [sp, #16] @ 4-byte Spill398; CHECK-NEXT: cmp r1, #2399; CHECK-NEXT: blo .LBB3_5400; CHECK-NEXT: @ %bb.1: @ %for.body.preheader401; CHECK-NEXT: ldr r2, [r0, #8]402; CHECK-NEXT: movs r6, #1403; CHECK-NEXT: ldr r1, [r0]404; CHECK-NEXT: add.w r0, r2, r2, lsl #1405; CHECK-NEXT: add.w r12, r1, r2, lsl #2406; CHECK-NEXT: add.w r8, r1, r2, lsl #3407; CHECK-NEXT: add.w r10, r1, r2, lsl #4408; CHECK-NEXT: add.w r9, r1, r0, lsl #2409; CHECK-NEXT: adds r0, r2, #3410; CHECK-NEXT: bic r0, r0, #3411; CHECK-NEXT: subs r0, #4412; CHECK-NEXT: add.w r0, r6, r0, lsr #2413; CHECK-NEXT: strd r0, r2, [sp, #4] @ 8-byte Folded Spill414; CHECK-NEXT: lsls r0, r2, #4415; CHECK-NEXT: ldrd r2, r7, [sp, #4] @ 8-byte Folded Reload416; CHECK-NEXT: str r0, [sp] @ 4-byte Spill417; CHECK-NEXT: .LBB3_2: @ %for.body418; CHECK-NEXT: @ =>This Loop Header: Depth=1419; CHECK-NEXT: @ Child Loop BB3_3 Depth 2420; CHECK-NEXT: ldr r1, [sp, #20] @ 4-byte Reload421; CHECK-NEXT: vmov.i32 q0, #0x0422; CHECK-NEXT: mov r3, r12423; CHECK-NEXT: mov r0, r8424; CHECK-NEXT: mov r5, r9425; CHECK-NEXT: mov r4, r10426; CHECK-NEXT: vmov.i32 q1, #0x0427; CHECK-NEXT: vmov.i32 q2, #0x0428; CHECK-NEXT: vmov.i32 q3, #0x0429; CHECK-NEXT: dlstp.32 lr, r7430; CHECK-NEXT: .LBB3_3: @ %vector.body431; CHECK-NEXT: @ Parent Loop BB3_2 Depth=1432; CHECK-NEXT: @ => This Inner Loop Header: Depth=2433; CHECK-NEXT: vldrw.u32 q4, [r1], #16434; CHECK-NEXT: vldrw.u32 q5, [r0], #16435; CHECK-NEXT: vfma.f32 q3, q5, q4436; CHECK-NEXT: vldrw.u32 q5, [r3], #16437; CHECK-NEXT: vfma.f32 q2, q5, q4438; CHECK-NEXT: vldrw.u32 q5, [r5], #16439; CHECK-NEXT: vfma.f32 q1, q5, q4440; CHECK-NEXT: vldrw.u32 q5, [r4], #16441; CHECK-NEXT: vfma.f32 q0, q5, q4442; CHECK-NEXT: letp lr, .LBB3_3443; CHECK-NEXT: @ %bb.4: @ %middle.block444; CHECK-NEXT: @ in Loop: Header=BB3_2 Depth=1445; CHECK-NEXT: vadd.f32 s14, s14, s15446; CHECK-NEXT: ldr r1, [sp, #12] @ 4-byte Reload447; CHECK-NEXT: vadd.f32 s12, s12, s13448; CHECK-NEXT: adds r0, r6, #1449; CHECK-NEXT: vadd.f32 s10, s10, s11450; CHECK-NEXT: vadd.f32 s8, s8, s9451; CHECK-NEXT: add.w r0, r1, r0, lsl #2452; CHECK-NEXT: vadd.f32 s6, s6, s7453; CHECK-NEXT: vadd.f32 s4, s4, s5454; CHECK-NEXT: vadd.f32 s2, s2, s3455; CHECK-NEXT: vadd.f32 s0, s0, s1456; CHECK-NEXT: vadd.f32 s12, s12, s14457; CHECK-NEXT: vadd.f32 s8, s8, s10458; CHECK-NEXT: vadd.f32 s4, s4, s6459; CHECK-NEXT: vadd.f32 s0, s0, s2460; CHECK-NEXT: vstr s12, [r0]461; CHECK-NEXT: add.w r0, r1, r6, lsl #2462; CHECK-NEXT: vstr s8, [r0]463; CHECK-NEXT: adds r0, r6, #2464; CHECK-NEXT: add.w r0, r1, r0, lsl #2465; CHECK-NEXT: vstr s4, [r0]466; CHECK-NEXT: adds r0, r6, #3467; CHECK-NEXT: adds r6, #4468; CHECK-NEXT: add.w r0, r1, r0, lsl #2469; CHECK-NEXT: vstr s0, [r0]470; CHECK-NEXT: ldr r0, [sp] @ 4-byte Reload471; CHECK-NEXT: add r12, r0472; CHECK-NEXT: add r8, r0473; CHECK-NEXT: add r9, r0474; CHECK-NEXT: add r10, r0475; CHECK-NEXT: ldr r0, [sp, #16] @ 4-byte Reload476; CHECK-NEXT: cmp r6, r0477; CHECK-NEXT: blo .LBB3_2478; CHECK-NEXT: .LBB3_5: @ %for.cond.cleanup479; CHECK-NEXT: add sp, #24480; CHECK-NEXT: vpop {d8, d9, d10, d11}481; CHECK-NEXT: add sp, #4482; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}483entry:484 %NumInputs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 2485 %i = load i32, ptr %NumInputs, align 4486 %NumFilters = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 1487 %i1 = load i32, ptr %NumFilters, align 4488 %pDCTCoefs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 0489 %i2 = load ptr, ptr %pDCTCoefs, align 4490 %cmp = icmp ugt i32 %i, 1491 tail call void @llvm.assume(i1 %cmp)492 %sub = add i32 %i1, -4493 %cmp3113 = icmp ugt i32 %sub, 1494 br i1 %cmp3113, label %for.body.preheader, label %for.cond.cleanup495 496for.body.preheader: ; preds = %entry497 %n.rnd.up = add i32 %i, 3498 %n.vec = and i32 %n.rnd.up, -4499 br label %for.body500 501for.cond.cleanup: ; preds = %middle.block, %entry502 ret void503 504for.body: ; preds = %middle.block, %for.body.preheader505 %k2.0114 = phi i32 [ %add43, %middle.block ], [ 1, %for.body.preheader ]506 %mul4 = mul i32 %k2.0114, %i507 %add = add nuw nsw i32 %k2.0114, 1508 %mul5 = mul i32 %add, %i509 %add6 = add nuw nsw i32 %k2.0114, 2510 %mul7 = mul i32 %add6, %i511 %add8 = add i32 %k2.0114, 3512 %mul9 = mul i32 %add8, %i513 br label %vector.body514 515vector.body: ; preds = %vector.body, %for.body516 %index = phi i32 [ 0, %for.body ], [ %index.next, %vector.body ]517 %vec.phi = phi <4 x float> [ zeroinitializer, %for.body ], [ %i25, %vector.body ]518 %vec.phi115 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i26, %vector.body ]519 %vec.phi116 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i27, %vector.body ]520 %vec.phi117 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i28, %vector.body ]521 %active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %i)522 %i3 = getelementptr inbounds float, ptr %pIn, i32 %index523 %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i3, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)524 %i5 = add i32 %index, %mul4525 %i6 = getelementptr inbounds float, ptr %i2, i32 %i5526 %wide.masked.load118 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i6, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)527 %i8 = fmul fast <4 x float> %wide.masked.load118, %wide.masked.load528 %i9 = fadd fast <4 x float> %i8, %vec.phi116529 %i10 = add i32 %index, %mul5530 %i11 = getelementptr inbounds float, ptr %i2, i32 %i10531 %wide.masked.load119 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i11, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)532 %i13 = fmul fast <4 x float> %wide.masked.load119, %wide.masked.load533 %i14 = fadd fast <4 x float> %i13, %vec.phi117534 %i15 = add i32 %index, %mul7535 %i16 = getelementptr inbounds float, ptr %i2, i32 %i15536 %wide.masked.load120 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i16, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)537 %i18 = fmul fast <4 x float> %wide.masked.load120, %wide.masked.load538 %i19 = fadd fast <4 x float> %i18, %vec.phi115539 %i20 = add i32 %index, %mul9540 %i21 = getelementptr inbounds float, ptr %i2, i32 %i20541 %wide.masked.load121 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i21, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)542 %i23 = fmul fast <4 x float> %wide.masked.load121, %wide.masked.load543 %i24 = fadd fast <4 x float> %i23, %vec.phi544 %i25 = select <4 x i1> %active.lane.mask, <4 x float> %i24, <4 x float> %vec.phi545 %i26 = select <4 x i1> %active.lane.mask, <4 x float> %i19, <4 x float> %vec.phi115546 %i27 = select <4 x i1> %active.lane.mask, <4 x float> %i9, <4 x float> %vec.phi116547 %i28 = select <4 x i1> %active.lane.mask, <4 x float> %i14, <4 x float> %vec.phi117548 %index.next = add i32 %index, 4549 %i29 = icmp eq i32 %index.next, %n.vec550 br i1 %i29, label %middle.block, label %vector.body551 552middle.block: ; preds = %vector.body553 %i30 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i28)554 %i31 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i27)555 %i32 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i26)556 %i33 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i25)557 %arrayidx35 = getelementptr inbounds float, ptr %pOut, i32 %k2.0114558 store float %i31, ptr %arrayidx35, align 4559 %arrayidx37 = getelementptr inbounds float, ptr %pOut, i32 %add560 store float %i30, ptr %arrayidx37, align 4561 %arrayidx39 = getelementptr inbounds float, ptr %pOut, i32 %add6562 store float %i32, ptr %arrayidx39, align 4563 %arrayidx41 = getelementptr inbounds float, ptr %pOut, i32 %add8564 store float %i33, ptr %arrayidx41, align 4565 %add43 = add i32 %k2.0114, 4566 %cmp3 = icmp ult i32 %add43, %sub567 br i1 %cmp3, label %for.body, label %for.cond.cleanup568}569 570define void @DCT_mve5(ptr nocapture readonly %S, ptr nocapture readonly %pIn, ptr nocapture %pOut) {571; CHECK-LABEL: DCT_mve5:572; CHECK: @ %bb.0: @ %entry573; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}574; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}575; CHECK-NEXT: .pad #4576; CHECK-NEXT: sub sp, #4577; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13}578; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13}579; CHECK-NEXT: .pad #16580; CHECK-NEXT: sub sp, #16581; CHECK-NEXT: str r1, [sp, #12] @ 4-byte Spill582; CHECK-NEXT: ldr r1, [r0, #4]583; CHECK-NEXT: subs r1, #5584; CHECK-NEXT: str r1, [sp, #8] @ 4-byte Spill585; CHECK-NEXT: cmp r1, #2586; CHECK-NEXT: blo.w .LBB4_5587; CHECK-NEXT: @ %bb.1: @ %for.body.preheader588; CHECK-NEXT: ldr.w r12, [r0, #8]589; CHECK-NEXT: ldr r1, [r0]590; CHECK-NEXT: add.w r0, r12, #3591; CHECK-NEXT: bic r0, r0, #3592; CHECK-NEXT: add.w r8, r1, r12, lsl #2593; CHECK-NEXT: subs r1, r0, #4594; CHECK-NEXT: movs r0, #1595; CHECK-NEXT: lsl.w r5, r12, #2596; CHECK-NEXT: add.w r1, r0, r1, lsr #2597; CHECK-NEXT: str r1, [sp, #4] @ 4-byte Spill598; CHECK-NEXT: add.w r1, r12, r12, lsl #2599; CHECK-NEXT: lsls r1, r1, #2600; CHECK-NEXT: str r1, [sp] @ 4-byte Spill601; CHECK-NEXT: .LBB4_2: @ %for.body602; CHECK-NEXT: @ =>This Loop Header: Depth=1603; CHECK-NEXT: @ Child Loop BB4_3 Depth 2604; CHECK-NEXT: ldr r4, [sp, #12] @ 4-byte Reload605; CHECK-NEXT: add.w r11, r0, #1606; CHECK-NEXT: ldr r7, [sp, #4] @ 4-byte Reload607; CHECK-NEXT: vmov.i32 q1, #0x0608; CHECK-NEXT: mov r3, r8609; CHECK-NEXT: vmov.i32 q0, #0x0610; CHECK-NEXT: vmov.i32 q3, #0x0611; CHECK-NEXT: vmov.i32 q2, #0x0612; CHECK-NEXT: vmov.i32 q4, #0x0613; CHECK-NEXT: dlstp.32 lr, r12614; CHECK-NEXT: .LBB4_3: @ %vector.body615; CHECK-NEXT: @ Parent Loop BB4_2 Depth=1616; CHECK-NEXT: @ => This Inner Loop Header: Depth=2617; CHECK-NEXT: add.w r9, r3, r5618; CHECK-NEXT: vldrw.u32 q5, [r4], #16619; CHECK-NEXT: vldrw.u32 q6, [r3], #16620; CHECK-NEXT: add.w r10, r9, r5621; CHECK-NEXT: vfma.f32 q3, q6, q5622; CHECK-NEXT: vldrw.u32 q6, [r9]623; CHECK-NEXT: add.w r6, r10, r5624; CHECK-NEXT: vfma.f32 q4, q6, q5625; CHECK-NEXT: vldrw.u32 q6, [r10]626; CHECK-NEXT: adds r7, r6, r5627; CHECK-NEXT: vfma.f32 q2, q6, q5628; CHECK-NEXT: vldrw.u32 q6, [r6]629; CHECK-NEXT: vfma.f32 q0, q6, q5630; CHECK-NEXT: vldrw.u32 q6, [r7]631; CHECK-NEXT: vfma.f32 q1, q6, q5632; CHECK-NEXT: letp lr, .LBB4_3633; CHECK-NEXT: @ %bb.4: @ %middle.block634; CHECK-NEXT: @ in Loop: Header=BB4_2 Depth=1635; CHECK-NEXT: vadd.f32 s18, s18, s19636; CHECK-NEXT: add.w r1, r2, r11, lsl #2637; CHECK-NEXT: vadd.f32 s16, s16, s17638; CHECK-NEXT: vadd.f32 s14, s14, s15639; CHECK-NEXT: vadd.f32 s12, s12, s13640; CHECK-NEXT: vadd.f32 s6, s6, s7641; CHECK-NEXT: vadd.f32 s4, s4, s5642; CHECK-NEXT: vadd.f32 s10, s10, s11643; CHECK-NEXT: vadd.f32 s8, s8, s9644; CHECK-NEXT: vadd.f32 s0, s0, s1645; CHECK-NEXT: vadd.f32 s1, s16, s18646; CHECK-NEXT: vadd.f32 s12, s12, s14647; CHECK-NEXT: vadd.f32 s2, s2, s3648; CHECK-NEXT: vadd.f32 s4, s4, s6649; CHECK-NEXT: vadd.f32 s6, s8, s10650; CHECK-NEXT: vstr s1, [r1]651; CHECK-NEXT: add.w r1, r2, r0, lsl #2652; CHECK-NEXT: vstr s12, [r1]653; CHECK-NEXT: adds r1, r0, #2654; CHECK-NEXT: vadd.f32 s0, s0, s2655; CHECK-NEXT: add.w r1, r2, r1, lsl #2656; CHECK-NEXT: vstr s6, [r1]657; CHECK-NEXT: adds r1, r0, #3658; CHECK-NEXT: add.w r1, r2, r1, lsl #2659; CHECK-NEXT: vstr s0, [r1]660; CHECK-NEXT: adds r1, r0, #4661; CHECK-NEXT: adds r0, #5662; CHECK-NEXT: add.w r1, r2, r1, lsl #2663; CHECK-NEXT: vstr s4, [r1]664; CHECK-NEXT: ldr r1, [sp] @ 4-byte Reload665; CHECK-NEXT: add r8, r1666; CHECK-NEXT: ldr r1, [sp, #8] @ 4-byte Reload667; CHECK-NEXT: cmp r0, r1668; CHECK-NEXT: blo .LBB4_2669; CHECK-NEXT: .LBB4_5: @ %for.cond.cleanup670; CHECK-NEXT: add sp, #16671; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13}672; CHECK-NEXT: add sp, #4673; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}674entry:675 %NumInputs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 2676 %i = load i32, ptr %NumInputs, align 4677 %NumFilters = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 1678 %i1 = load i32, ptr %NumFilters, align 4679 %pDCTCoefs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 0680 %i2 = load ptr, ptr %pDCTCoefs, align 4681 %cmp = icmp ugt i32 %i, 1682 tail call void @llvm.assume(i1 %cmp)683 %sub = add i32 %i1, -5684 %cmp3134 = icmp ugt i32 %sub, 1685 br i1 %cmp3134, label %for.body.preheader, label %for.cond.cleanup686 687for.body.preheader: ; preds = %entry688 %n.rnd.up = add i32 %i, 3689 %n.vec = and i32 %n.rnd.up, -4690 br label %for.body691 692for.cond.cleanup: ; preds = %middle.block, %entry693 ret void694 695for.body: ; preds = %middle.block, %for.body.preheader696 %k2.0135 = phi i32 [ %add52, %middle.block ], [ 1, %for.body.preheader ]697 %mul4 = mul i32 %k2.0135, %i698 %add = add nuw i32 %k2.0135, 1699 %mul5 = mul i32 %add, %i700 %add6 = add i32 %k2.0135, 2701 %mul7 = mul i32 %add6, %i702 %add8 = add i32 %k2.0135, 3703 %mul9 = mul i32 %add8, %i704 %add10 = add i32 %k2.0135, 4705 %mul11 = mul i32 %add10, %i706 br label %vector.body707 708vector.body: ; preds = %vector.body, %for.body709 %index = phi i32 [ 0, %for.body ], [ %index.next, %vector.body ]710 %vec.phi = phi <4 x float> [ zeroinitializer, %for.body ], [ %i30, %vector.body ]711 %vec.phi136 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i31, %vector.body ]712 %vec.phi137 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i32, %vector.body ]713 %vec.phi138 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i33, %vector.body ]714 %vec.phi139 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i34, %vector.body ]715 %active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %i)716 %i3 = getelementptr inbounds float, ptr %pIn, i32 %index717 %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i3, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)718 %i5 = add i32 %index, %mul4719 %i6 = getelementptr inbounds float, ptr %i2, i32 %i5720 %wide.masked.load140 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i6, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)721 %i8 = fmul fast <4 x float> %wide.masked.load140, %wide.masked.load722 %i9 = fadd fast <4 x float> %i8, %vec.phi137723 %i10 = add i32 %index, %mul5724 %i11 = getelementptr inbounds float, ptr %i2, i32 %i10725 %wide.masked.load141 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i11, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)726 %i13 = fmul fast <4 x float> %wide.masked.load141, %wide.masked.load727 %i14 = fadd fast <4 x float> %i13, %vec.phi139728 %i15 = add i32 %index, %mul7729 %i16 = getelementptr inbounds float, ptr %i2, i32 %i15730 %wide.masked.load142 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i16, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)731 %i18 = fmul fast <4 x float> %wide.masked.load142, %wide.masked.load732 %i19 = fadd fast <4 x float> %i18, %vec.phi138733 %i20 = add i32 %index, %mul9734 %i21 = getelementptr inbounds float, ptr %i2, i32 %i20735 %wide.masked.load143 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i21, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)736 %i23 = fmul fast <4 x float> %wide.masked.load143, %wide.masked.load737 %i24 = fadd fast <4 x float> %i23, %vec.phi136738 %i25 = add i32 %index, %mul11739 %i26 = getelementptr inbounds float, ptr %i2, i32 %i25740 %wide.masked.load144 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i26, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)741 %i28 = fmul fast <4 x float> %wide.masked.load144, %wide.masked.load742 %i29 = fadd fast <4 x float> %i28, %vec.phi743 %i30 = select <4 x i1> %active.lane.mask, <4 x float> %i29, <4 x float> %vec.phi744 %i31 = select <4 x i1> %active.lane.mask, <4 x float> %i24, <4 x float> %vec.phi136745 %i32 = select <4 x i1> %active.lane.mask, <4 x float> %i9, <4 x float> %vec.phi137746 %i33 = select <4 x i1> %active.lane.mask, <4 x float> %i19, <4 x float> %vec.phi138747 %i34 = select <4 x i1> %active.lane.mask, <4 x float> %i14, <4 x float> %vec.phi139748 %index.next = add i32 %index, 4749 %i35 = icmp eq i32 %index.next, %n.vec750 br i1 %i35, label %middle.block, label %vector.body751 752middle.block: ; preds = %vector.body753 %i36 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i34)754 %i37 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i33)755 %i38 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i32)756 %i39 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i31)757 %i40 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i30)758 %arrayidx42 = getelementptr inbounds float, ptr %pOut, i32 %k2.0135759 store float %i38, ptr %arrayidx42, align 4760 %arrayidx44 = getelementptr inbounds float, ptr %pOut, i32 %add761 store float %i36, ptr %arrayidx44, align 4762 %arrayidx46 = getelementptr inbounds float, ptr %pOut, i32 %add6763 store float %i37, ptr %arrayidx46, align 4764 %arrayidx48 = getelementptr inbounds float, ptr %pOut, i32 %add8765 store float %i39, ptr %arrayidx48, align 4766 %arrayidx50 = getelementptr inbounds float, ptr %pOut, i32 %add10767 store float %i40, ptr %arrayidx50, align 4768 %add52 = add i32 %k2.0135, 5769 %cmp3 = icmp ult i32 %add52, %sub770 br i1 %cmp3, label %for.body, label %for.cond.cleanup771}772 773define void @DCT_mve6(ptr nocapture readonly %S, ptr nocapture readonly %pIn, ptr nocapture %pOut) {774; CHECK-LABEL: DCT_mve6:775; CHECK: @ %bb.0: @ %entry776; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}777; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}778; CHECK-NEXT: .pad #4779; CHECK-NEXT: sub sp, #4780; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14, d15}781; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}782; CHECK-NEXT: .pad #16783; CHECK-NEXT: sub sp, #16784; CHECK-NEXT: str r1, [sp, #12] @ 4-byte Spill785; CHECK-NEXT: ldr r1, [r0, #4]786; CHECK-NEXT: subs r1, #6787; CHECK-NEXT: str r1, [sp, #8] @ 4-byte Spill788; CHECK-NEXT: cmp r1, #2789; CHECK-NEXT: blo.w .LBB5_5790; CHECK-NEXT: @ %bb.1: @ %for.body.preheader791; CHECK-NEXT: ldr.w r12, [r0, #8]792; CHECK-NEXT: ldr r1, [r0]793; CHECK-NEXT: add.w r0, r12, #3794; CHECK-NEXT: bic r0, r0, #3795; CHECK-NEXT: add.w r8, r1, r12, lsl #2796; CHECK-NEXT: subs r1, r0, #4797; CHECK-NEXT: movs r0, #1798; CHECK-NEXT: lsl.w r5, r12, #2799; CHECK-NEXT: add.w r1, r0, r1, lsr #2800; CHECK-NEXT: str r1, [sp, #4] @ 4-byte Spill801; CHECK-NEXT: add.w r1, r12, r12, lsl #1802; CHECK-NEXT: lsls r1, r1, #3803; CHECK-NEXT: str r1, [sp] @ 4-byte Spill804; CHECK-NEXT: .LBB5_2: @ %for.body805; CHECK-NEXT: @ =>This Loop Header: Depth=1806; CHECK-NEXT: @ Child Loop BB5_3 Depth 2807; CHECK-NEXT: ldr r1, [sp, #12] @ 4-byte Reload808; CHECK-NEXT: adds r4, r0, #1809; CHECK-NEXT: ldr r7, [sp, #4] @ 4-byte Reload810; CHECK-NEXT: vmov.i32 q1, #0x0811; CHECK-NEXT: mov r3, r8812; CHECK-NEXT: vmov.i32 q3, #0x0813; CHECK-NEXT: vmov.i32 q4, #0x0814; CHECK-NEXT: vmov.i32 q0, #0x0815; CHECK-NEXT: vmov.i32 q5, #0x0816; CHECK-NEXT: vmov.i32 q2, #0x0817; CHECK-NEXT: dlstp.32 lr, r12818; CHECK-NEXT: .LBB5_3: @ %vector.body819; CHECK-NEXT: @ Parent Loop BB5_2 Depth=1820; CHECK-NEXT: @ => This Inner Loop Header: Depth=2821; CHECK-NEXT: add.w r10, r3, r5822; CHECK-NEXT: vldrw.u32 q6, [r1], #16823; CHECK-NEXT: vldrw.u32 q7, [r3], #16824; CHECK-NEXT: add.w r11, r10, r5825; CHECK-NEXT: vfma.f32 q4, q7, q6826; CHECK-NEXT: vldrw.u32 q7, [r10]827; CHECK-NEXT: add.w r6, r11, r5828; CHECK-NEXT: vfma.f32 q5, q7, q6829; CHECK-NEXT: vldrw.u32 q7, [r11]830; CHECK-NEXT: adds r7, r6, r5831; CHECK-NEXT: vfma.f32 q2, q7, q6832; CHECK-NEXT: vldrw.u32 q7, [r6]833; CHECK-NEXT: adds r6, r7, r5834; CHECK-NEXT: vfma.f32 q0, q7, q6835; CHECK-NEXT: vldrw.u32 q7, [r7]836; CHECK-NEXT: vfma.f32 q3, q7, q6837; CHECK-NEXT: vldrw.u32 q7, [r6]838; CHECK-NEXT: vfma.f32 q1, q7, q6839; CHECK-NEXT: letp lr, .LBB5_3840; CHECK-NEXT: @ %bb.4: @ %middle.block841; CHECK-NEXT: @ in Loop: Header=BB5_2 Depth=1842; CHECK-NEXT: vadd.f32 s22, s22, s23843; CHECK-NEXT: add.w r1, r2, r4, lsl #2844; CHECK-NEXT: vadd.f32 s20, s20, s21845; CHECK-NEXT: vadd.f32 s18, s18, s19846; CHECK-NEXT: vadd.f32 s16, s16, s17847; CHECK-NEXT: vadd.f32 s10, s10, s11848; CHECK-NEXT: vadd.f32 s8, s8, s9849; CHECK-NEXT: vadd.f32 s0, s0, s1850; CHECK-NEXT: vadd.f32 s2, s2, s3851; CHECK-NEXT: vadd.f32 s1, s20, s22852; CHECK-NEXT: vadd.f32 s6, s6, s7853; CHECK-NEXT: vadd.f32 s3, s16, s18854; CHECK-NEXT: vadd.f32 s4, s4, s5855; CHECK-NEXT: vadd.f32 s8, s8, s10856; CHECK-NEXT: vadd.f32 s14, s14, s15857; CHECK-NEXT: vadd.f32 s12, s12, s13858; CHECK-NEXT: vstr s1, [r1]859; CHECK-NEXT: add.w r1, r2, r0, lsl #2860; CHECK-NEXT: vadd.f32 s0, s0, s2861; CHECK-NEXT: vstr s3, [r1]862; CHECK-NEXT: adds r1, r0, #2863; CHECK-NEXT: vadd.f32 s4, s4, s6864; CHECK-NEXT: add.w r1, r2, r1, lsl #2865; CHECK-NEXT: vstr s8, [r1]866; CHECK-NEXT: adds r1, r0, #3867; CHECK-NEXT: vadd.f32 s6, s12, s14868; CHECK-NEXT: add.w r1, r2, r1, lsl #2869; CHECK-NEXT: vstr s0, [r1]870; CHECK-NEXT: adds r1, r0, #4871; CHECK-NEXT: add.w r1, r2, r1, lsl #2872; CHECK-NEXT: vstr s6, [r1]873; CHECK-NEXT: adds r1, r0, #5874; CHECK-NEXT: adds r0, #6875; CHECK-NEXT: add.w r1, r2, r1, lsl #2876; CHECK-NEXT: vstr s4, [r1]877; CHECK-NEXT: ldr r1, [sp] @ 4-byte Reload878; CHECK-NEXT: add r8, r1879; CHECK-NEXT: ldr r1, [sp, #8] @ 4-byte Reload880; CHECK-NEXT: cmp r0, r1881; CHECK-NEXT: blo.w .LBB5_2882; CHECK-NEXT: .LBB5_5: @ %for.cond.cleanup883; CHECK-NEXT: add sp, #16884; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}885; CHECK-NEXT: add sp, #4886; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}887entry:888 %NumInputs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 2889 %i = load i32, ptr %NumInputs, align 4890 %NumFilters = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 1891 %i1 = load i32, ptr %NumFilters, align 4892 %pDCTCoefs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 0893 %i2 = load ptr, ptr %pDCTCoefs, align 4894 %cmp = icmp ugt i32 %i, 1895 tail call void @llvm.assume(i1 %cmp)896 %sub = add i32 %i1, -6897 %cmp3155 = icmp ugt i32 %sub, 1898 br i1 %cmp3155, label %for.body.preheader, label %for.cond.cleanup899 900for.body.preheader: ; preds = %entry901 %n.rnd.up = add i32 %i, 3902 %n.vec = and i32 %n.rnd.up, -4903 br label %for.body904 905for.cond.cleanup: ; preds = %middle.block, %entry906 ret void907 908for.body: ; preds = %middle.block, %for.body.preheader909 %k2.0156 = phi i32 [ %add61, %middle.block ], [ 1, %for.body.preheader ]910 %mul4 = mul i32 %k2.0156, %i911 %add = add nuw i32 %k2.0156, 1912 %mul5 = mul i32 %add, %i913 %add6 = add i32 %k2.0156, 2914 %mul7 = mul i32 %add6, %i915 %add8 = add i32 %k2.0156, 3916 %mul9 = mul i32 %add8, %i917 %add10 = add i32 %k2.0156, 4918 %mul11 = mul i32 %add10, %i919 %add12 = add i32 %k2.0156, 5920 %mul13 = mul i32 %add12, %i921 br label %vector.body922 923vector.body: ; preds = %vector.body, %for.body924 %index = phi i32 [ 0, %for.body ], [ %index.next, %vector.body ]925 %vec.phi = phi <4 x float> [ zeroinitializer, %for.body ], [ %i35, %vector.body ]926 %vec.phi157 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i36, %vector.body ]927 %vec.phi158 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i37, %vector.body ]928 %vec.phi159 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i38, %vector.body ]929 %vec.phi160 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i39, %vector.body ]930 %vec.phi161 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i40, %vector.body ]931 %active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %i)932 %i3 = getelementptr inbounds float, ptr %pIn, i32 %index933 %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i3, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)934 %i5 = add i32 %index, %mul4935 %i6 = getelementptr inbounds float, ptr %i2, i32 %i5936 %wide.masked.load162 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i6, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)937 %i8 = fmul fast <4 x float> %wide.masked.load162, %wide.masked.load938 %i9 = fadd fast <4 x float> %i8, %vec.phi158939 %i10 = add i32 %index, %mul5940 %i11 = getelementptr inbounds float, ptr %i2, i32 %i10941 %wide.masked.load163 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i11, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)942 %i13 = fmul fast <4 x float> %wide.masked.load163, %wide.masked.load943 %i14 = fadd fast <4 x float> %i13, %vec.phi160944 %i15 = add i32 %index, %mul7945 %i16 = getelementptr inbounds float, ptr %i2, i32 %i15946 %wide.masked.load164 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i16, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)947 %i18 = fmul fast <4 x float> %wide.masked.load164, %wide.masked.load948 %i19 = fadd fast <4 x float> %i18, %vec.phi161949 %i20 = add i32 %index, %mul9950 %i21 = getelementptr inbounds float, ptr %i2, i32 %i20951 %wide.masked.load165 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i21, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)952 %i23 = fmul fast <4 x float> %wide.masked.load165, %wide.masked.load953 %i24 = fadd fast <4 x float> %i23, %vec.phi159954 %i25 = add i32 %index, %mul11955 %i26 = getelementptr inbounds float, ptr %i2, i32 %i25956 %wide.masked.load166 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i26, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)957 %i28 = fmul fast <4 x float> %wide.masked.load166, %wide.masked.load958 %i29 = fadd fast <4 x float> %i28, %vec.phi157959 %i30 = add i32 %index, %mul13960 %i31 = getelementptr inbounds float, ptr %i2, i32 %i30961 %wide.masked.load167 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i31, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)962 %i33 = fmul fast <4 x float> %wide.masked.load167, %wide.masked.load963 %i34 = fadd fast <4 x float> %i33, %vec.phi964 %i35 = select <4 x i1> %active.lane.mask, <4 x float> %i34, <4 x float> %vec.phi965 %i36 = select <4 x i1> %active.lane.mask, <4 x float> %i29, <4 x float> %vec.phi157966 %i37 = select <4 x i1> %active.lane.mask, <4 x float> %i9, <4 x float> %vec.phi158967 %i38 = select <4 x i1> %active.lane.mask, <4 x float> %i24, <4 x float> %vec.phi159968 %i39 = select <4 x i1> %active.lane.mask, <4 x float> %i14, <4 x float> %vec.phi160969 %i40 = select <4 x i1> %active.lane.mask, <4 x float> %i19, <4 x float> %vec.phi161970 %index.next = add i32 %index, 4971 %i41 = icmp eq i32 %index.next, %n.vec972 br i1 %i41, label %middle.block, label %vector.body973 974middle.block: ; preds = %vector.body975 %i42 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i40)976 %i43 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i39)977 %i44 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i38)978 %i45 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i37)979 %i46 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i36)980 %i47 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i35)981 %arrayidx49 = getelementptr inbounds float, ptr %pOut, i32 %k2.0156982 store float %i45, ptr %arrayidx49, align 4983 %arrayidx51 = getelementptr inbounds float, ptr %pOut, i32 %add984 store float %i43, ptr %arrayidx51, align 4985 %arrayidx53 = getelementptr inbounds float, ptr %pOut, i32 %add6986 store float %i42, ptr %arrayidx53, align 4987 %arrayidx55 = getelementptr inbounds float, ptr %pOut, i32 %add8988 store float %i44, ptr %arrayidx55, align 4989 %arrayidx57 = getelementptr inbounds float, ptr %pOut, i32 %add10990 store float %i46, ptr %arrayidx57, align 4991 %arrayidx59 = getelementptr inbounds float, ptr %pOut, i32 %add12992 store float %i47, ptr %arrayidx59, align 4993 %add61 = add i32 %k2.0156, 6994 %cmp3 = icmp ult i32 %add61, %sub995 br i1 %cmp3, label %for.body, label %for.cond.cleanup996}997 998define void @DCT_mve7(ptr nocapture readonly %S, ptr nocapture readonly %pIn, ptr nocapture %pOut) {999; CHECK-LABEL: DCT_mve7:1000; CHECK: @ %bb.0: @ %entry1001; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}1002; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}1003; CHECK-NEXT: .pad #41004; CHECK-NEXT: sub sp, #41005; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14, d15}1006; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}1007; CHECK-NEXT: .pad #481008; CHECK-NEXT: sub sp, #481009; CHECK-NEXT: str r1, [sp, #12] @ 4-byte Spill1010; CHECK-NEXT: ldr r1, [r0, #4]1011; CHECK-NEXT: subs r1, #71012; CHECK-NEXT: str r1, [sp, #8] @ 4-byte Spill1013; CHECK-NEXT: cmp r1, #21014; CHECK-NEXT: blo.w .LBB6_51015; CHECK-NEXT: @ %bb.1: @ %for.body.preheader1016; CHECK-NEXT: ldr.w r10, [r0, #8]1017; CHECK-NEXT: ldr r1, [r0]1018; CHECK-NEXT: add.w r0, r10, #31019; CHECK-NEXT: bic r0, r0, #31020; CHECK-NEXT: add.w r9, r1, r10, lsl #21021; CHECK-NEXT: subs r1, r0, #41022; CHECK-NEXT: movs r0, #11023; CHECK-NEXT: lsl.w r5, r10, #21024; CHECK-NEXT: add.w r1, r0, r1, lsr #21025; CHECK-NEXT: str r1, [sp, #4] @ 4-byte Spill1026; CHECK-NEXT: rsb r1, r10, r10, lsl #31027; CHECK-NEXT: lsls r1, r1, #21028; CHECK-NEXT: str r1, [sp] @ 4-byte Spill1029; CHECK-NEXT: .LBB6_2: @ %for.body1030; CHECK-NEXT: @ =>This Loop Header: Depth=11031; CHECK-NEXT: @ Child Loop BB6_3 Depth 21032; CHECK-NEXT: ldr r1, [sp, #12] @ 4-byte Reload1033; CHECK-NEXT: adds r4, r0, #21034; CHECK-NEXT: add.w r8, r0, #11035; CHECK-NEXT: ldr r7, [sp, #4] @ 4-byte Reload1036; CHECK-NEXT: vmov.i32 q0, #0x01037; CHECK-NEXT: vmov.i32 q2, #0x01038; CHECK-NEXT: mov r3, r91039; CHECK-NEXT: vmov.i32 q4, #0x01040; CHECK-NEXT: vmov.i32 q5, #0x01041; CHECK-NEXT: vmov.i32 q3, #0x01042; CHECK-NEXT: vmov.i32 q6, #0x01043; CHECK-NEXT: vmov.i32 q1, #0x01044; CHECK-NEXT: mov r12, r101045; CHECK-NEXT: vstrw.32 q0, [sp, #32] @ 16-byte Spill1046; CHECK-NEXT: dls lr, r71047; CHECK-NEXT: .LBB6_3: @ %vector.body1048; CHECK-NEXT: @ Parent Loop BB6_2 Depth=11049; CHECK-NEXT: @ => This Inner Loop Header: Depth=21050; CHECK-NEXT: vctp.32 r121051; CHECK-NEXT: add.w r11, r3, r51052; CHECK-NEXT: vpstt1053; CHECK-NEXT: vldrwt.u32 q7, [r1], #161054; CHECK-NEXT: vldrwt.u32 q0, [r3], #161055; CHECK-NEXT: add.w r6, r11, r51056; CHECK-NEXT: sub.w r12, r12, #41057; CHECK-NEXT: vpstt1058; CHECK-NEXT: vfmat.f32 q5, q0, q71059; CHECK-NEXT: vldrwt.u32 q0, [r11]1060; CHECK-NEXT: adds r7, r6, r51061; CHECK-NEXT: vpstt1062; CHECK-NEXT: vfmat.f32 q6, q0, q71063; CHECK-NEXT: vldrwt.u32 q0, [r6]1064; CHECK-NEXT: vstrw.32 q6, [sp, #16] @ 16-byte Spill1065; CHECK-NEXT: vmov q6, q51066; CHECK-NEXT: vpst1067; CHECK-NEXT: vfmat.f32 q1, q0, q71068; CHECK-NEXT: vmov q5, q41069; CHECK-NEXT: vmov q4, q31070; CHECK-NEXT: vmov q3, q11071; CHECK-NEXT: vpst1072; CHECK-NEXT: vldrwt.u32 q0, [r7]1073; CHECK-NEXT: vldrw.u32 q1, [sp, #32] @ 16-byte Reload1074; CHECK-NEXT: adds r6, r7, r51075; CHECK-NEXT: vpstt1076; CHECK-NEXT: vfmat.f32 q1, q0, q71077; CHECK-NEXT: vldrwt.u32 q0, [r6]1078; CHECK-NEXT: adds r7, r6, r51079; CHECK-NEXT: vstrw.32 q1, [sp, #32] @ 16-byte Spill1080; CHECK-NEXT: vmov q1, q31081; CHECK-NEXT: vmov q3, q41082; CHECK-NEXT: vpstt1083; CHECK-NEXT: vfmat.f32 q3, q0, q71084; CHECK-NEXT: vldrwt.u32 q0, [r7]1085; CHECK-NEXT: vmov q4, q51086; CHECK-NEXT: adds r6, r7, r51087; CHECK-NEXT: vpstt1088; CHECK-NEXT: vfmat.f32 q4, q0, q71089; CHECK-NEXT: vldrwt.u32 q0, [r6]1090; CHECK-NEXT: vmov q5, q61091; CHECK-NEXT: vldrw.u32 q6, [sp, #16] @ 16-byte Reload1092; CHECK-NEXT: vpst1093; CHECK-NEXT: vfmat.f32 q2, q0, q71094; CHECK-NEXT: le lr, .LBB6_31095; CHECK-NEXT: @ %bb.4: @ %middle.block1096; CHECK-NEXT: @ in Loop: Header=BB6_2 Depth=11097; CHECK-NEXT: vadd.f32 s0, s26, s271098; CHECK-NEXT: add.w r1, r2, r8, lsl #21099; CHECK-NEXT: vadd.f32 s2, s24, s251100; CHECK-NEXT: vadd.f32 s1, s22, s231101; CHECK-NEXT: vadd.f32 s3, s20, s211102; CHECK-NEXT: vadd.f32 s6, s6, s71103; CHECK-NEXT: vadd.f32 s4, s4, s51104; CHECK-NEXT: vadd.f32 s10, s10, s111105; CHECK-NEXT: vadd.f32 s8, s8, s91106; CHECK-NEXT: vadd.f32 s9, s18, s191107; CHECK-NEXT: vadd.f32 s11, s16, s171108; CHECK-NEXT: vldrw.u32 q4, [sp, #32] @ 16-byte Reload1109; CHECK-NEXT: vadd.f32 s0, s2, s01110; CHECK-NEXT: vadd.f32 s5, s18, s191111; CHECK-NEXT: vadd.f32 s7, s16, s171112; CHECK-NEXT: vadd.f32 s2, s3, s11113; CHECK-NEXT: vadd.f32 s4, s4, s61114; CHECK-NEXT: vadd.f32 s14, s14, s151115; CHECK-NEXT: vadd.f32 s12, s12, s131116; CHECK-NEXT: vstr s0, [r1]1117; CHECK-NEXT: add.w r1, r2, r0, lsl #21118; CHECK-NEXT: vadd.f32 s8, s8, s101119; CHECK-NEXT: vadd.f32 s6, s7, s51120; CHECK-NEXT: vstr s2, [r1]1121; CHECK-NEXT: add.w r1, r2, r4, lsl #21122; CHECK-NEXT: vadd.f32 s10, s11, s91123; CHECK-NEXT: vstr s4, [r1]1124; CHECK-NEXT: adds r1, r0, #31125; CHECK-NEXT: vadd.f32 s12, s12, s141126; CHECK-NEXT: add.w r1, r2, r1, lsl #21127; CHECK-NEXT: vstr s6, [r1]1128; CHECK-NEXT: adds r1, r0, #41129; CHECK-NEXT: add.w r1, r2, r1, lsl #21130; CHECK-NEXT: vstr s12, [r1]1131; CHECK-NEXT: adds r1, r0, #51132; CHECK-NEXT: add.w r1, r2, r1, lsl #21133; CHECK-NEXT: vstr s10, [r1]1134; CHECK-NEXT: adds r1, r0, #61135; CHECK-NEXT: adds r0, #71136; CHECK-NEXT: add.w r1, r2, r1, lsl #21137; CHECK-NEXT: vstr s8, [r1]1138; CHECK-NEXT: ldr r1, [sp] @ 4-byte Reload1139; CHECK-NEXT: add r9, r11140; CHECK-NEXT: ldr r1, [sp, #8] @ 4-byte Reload1141; CHECK-NEXT: cmp r0, r11142; CHECK-NEXT: blo.w .LBB6_21143; CHECK-NEXT: .LBB6_5: @ %for.cond.cleanup1144; CHECK-NEXT: add sp, #481145; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}1146; CHECK-NEXT: add sp, #41147; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}1148entry:1149 %NumInputs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 21150 %i = load i32, ptr %NumInputs, align 41151 %NumFilters = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 11152 %i1 = load i32, ptr %NumFilters, align 41153 %pDCTCoefs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 01154 %i2 = load ptr, ptr %pDCTCoefs, align 41155 %cmp = icmp ugt i32 %i, 11156 tail call void @llvm.assume(i1 %cmp)1157 %sub = add i32 %i1, -71158 %cmp3176 = icmp ugt i32 %sub, 11159 br i1 %cmp3176, label %for.body.preheader, label %for.cond.cleanup1160 1161for.body.preheader: ; preds = %entry1162 %n.rnd.up = add i32 %i, 31163 %n.vec = and i32 %n.rnd.up, -41164 br label %for.body1165 1166for.cond.cleanup: ; preds = %middle.block, %entry1167 ret void1168 1169for.body: ; preds = %middle.block, %for.body.preheader1170 %k2.0177 = phi i32 [ %add70, %middle.block ], [ 1, %for.body.preheader ]1171 %mul4 = mul i32 %k2.0177, %i1172 %add = add nuw i32 %k2.0177, 11173 %mul5 = mul i32 %add, %i1174 %add6 = add i32 %k2.0177, 21175 %mul7 = mul i32 %add6, %i1176 %add8 = add i32 %k2.0177, 31177 %mul9 = mul i32 %add8, %i1178 %add10 = add i32 %k2.0177, 41179 %mul11 = mul i32 %add10, %i1180 %add12 = add i32 %k2.0177, 51181 %mul13 = mul i32 %add12, %i1182 %add14 = add i32 %k2.0177, 61183 %mul15 = mul i32 %add14, %i1184 br label %vector.body1185 1186vector.body: ; preds = %vector.body, %for.body1187 %index = phi i32 [ 0, %for.body ], [ %index.next, %vector.body ]1188 %vec.phi = phi <4 x float> [ zeroinitializer, %for.body ], [ %i40, %vector.body ]1189 %vec.phi178 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i41, %vector.body ]1190 %vec.phi179 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i42, %vector.body ]1191 %vec.phi180 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i43, %vector.body ]1192 %vec.phi181 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i44, %vector.body ]1193 %vec.phi182 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i45, %vector.body ]1194 %vec.phi183 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i46, %vector.body ]1195 %active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %i)1196 %i3 = getelementptr inbounds float, ptr %pIn, i32 %index1197 %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i3, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1198 %i5 = add i32 %index, %mul41199 %i6 = getelementptr inbounds float, ptr %i2, i32 %i51200 %wide.masked.load184 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i6, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1201 %i8 = fmul fast <4 x float> %wide.masked.load184, %wide.masked.load1202 %i9 = fadd fast <4 x float> %i8, %vec.phi1791203 %i10 = add i32 %index, %mul51204 %i11 = getelementptr inbounds float, ptr %i2, i32 %i101205 %wide.masked.load185 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i11, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1206 %i13 = fmul fast <4 x float> %wide.masked.load185, %wide.masked.load1207 %i14 = fadd fast <4 x float> %i13, %vec.phi1811208 %i15 = add i32 %index, %mul71209 %i16 = getelementptr inbounds float, ptr %i2, i32 %i151210 %wide.masked.load186 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i16, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1211 %i18 = fmul fast <4 x float> %wide.masked.load186, %wide.masked.load1212 %i19 = fadd fast <4 x float> %i18, %vec.phi1831213 %i20 = add i32 %index, %mul91214 %i21 = getelementptr inbounds float, ptr %i2, i32 %i201215 %wide.masked.load187 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i21, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1216 %i23 = fmul fast <4 x float> %wide.masked.load187, %wide.masked.load1217 %i24 = fadd fast <4 x float> %i23, %vec.phi1821218 %i25 = add i32 %index, %mul111219 %i26 = getelementptr inbounds float, ptr %i2, i32 %i251220 %wide.masked.load188 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i26, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1221 %i28 = fmul fast <4 x float> %wide.masked.load188, %wide.masked.load1222 %i29 = fadd fast <4 x float> %i28, %vec.phi1801223 %i30 = add i32 %index, %mul131224 %i31 = getelementptr inbounds float, ptr %i2, i32 %i301225 %wide.masked.load189 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i31, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1226 %i33 = fmul fast <4 x float> %wide.masked.load189, %wide.masked.load1227 %i34 = fadd fast <4 x float> %i33, %vec.phi1781228 %i35 = add i32 %index, %mul151229 %i36 = getelementptr inbounds float, ptr %i2, i32 %i351230 %wide.masked.load190 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i36, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1231 %i38 = fmul fast <4 x float> %wide.masked.load190, %wide.masked.load1232 %i39 = fadd fast <4 x float> %i38, %vec.phi1233 %i40 = select <4 x i1> %active.lane.mask, <4 x float> %i39, <4 x float> %vec.phi1234 %i41 = select <4 x i1> %active.lane.mask, <4 x float> %i34, <4 x float> %vec.phi1781235 %i42 = select <4 x i1> %active.lane.mask, <4 x float> %i9, <4 x float> %vec.phi1791236 %i43 = select <4 x i1> %active.lane.mask, <4 x float> %i29, <4 x float> %vec.phi1801237 %i44 = select <4 x i1> %active.lane.mask, <4 x float> %i14, <4 x float> %vec.phi1811238 %i45 = select <4 x i1> %active.lane.mask, <4 x float> %i24, <4 x float> %vec.phi1821239 %i46 = select <4 x i1> %active.lane.mask, <4 x float> %i19, <4 x float> %vec.phi1831240 %index.next = add i32 %index, 41241 %i47 = icmp eq i32 %index.next, %n.vec1242 br i1 %i47, label %middle.block, label %vector.body1243 1244middle.block: ; preds = %vector.body1245 %i48 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i46)1246 %i49 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i45)1247 %i50 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i44)1248 %i51 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i43)1249 %i52 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i42)1250 %i53 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i41)1251 %i54 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i40)1252 %arrayidx56 = getelementptr inbounds float, ptr %pOut, i32 %k2.01771253 store float %i52, ptr %arrayidx56, align 41254 %arrayidx58 = getelementptr inbounds float, ptr %pOut, i32 %add1255 store float %i50, ptr %arrayidx58, align 41256 %arrayidx60 = getelementptr inbounds float, ptr %pOut, i32 %add61257 store float %i48, ptr %arrayidx60, align 41258 %arrayidx62 = getelementptr inbounds float, ptr %pOut, i32 %add81259 store float %i49, ptr %arrayidx62, align 41260 %arrayidx64 = getelementptr inbounds float, ptr %pOut, i32 %add101261 store float %i51, ptr %arrayidx64, align 41262 %arrayidx66 = getelementptr inbounds float, ptr %pOut, i32 %add121263 store float %i53, ptr %arrayidx66, align 41264 %arrayidx68 = getelementptr inbounds float, ptr %pOut, i32 %add141265 store float %i54, ptr %arrayidx68, align 41266 %add70 = add i32 %k2.0177, 71267 %cmp3 = icmp ult i32 %add70, %sub1268 br i1 %cmp3, label %for.body, label %for.cond.cleanup1269}1270 1271define void @DCT_mve8(ptr nocapture readonly %S, ptr nocapture readonly %pIn, ptr nocapture %pOut) {1272; CHECK-LABEL: DCT_mve8:1273; CHECK: @ %bb.0: @ %entry1274; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}1275; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}1276; CHECK-NEXT: .pad #41277; CHECK-NEXT: sub sp, #41278; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14, d15}1279; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}1280; CHECK-NEXT: .pad #641281; CHECK-NEXT: sub sp, #641282; CHECK-NEXT: str r1, [sp, #12] @ 4-byte Spill1283; CHECK-NEXT: ldr r1, [r0, #4]1284; CHECK-NEXT: subs r1, #81285; CHECK-NEXT: str r1, [sp, #8] @ 4-byte Spill1286; CHECK-NEXT: cmp r1, #21287; CHECK-NEXT: blo.w .LBB7_51288; CHECK-NEXT: @ %bb.1: @ %for.body.preheader1289; CHECK-NEXT: ldr.w r11, [r0, #8]1290; CHECK-NEXT: ldr r1, [r0]1291; CHECK-NEXT: add.w r0, r11, #31292; CHECK-NEXT: bic r0, r0, #31293; CHECK-NEXT: add.w r12, r1, r11, lsl #21294; CHECK-NEXT: subs r1, r0, #41295; CHECK-NEXT: movs r0, #11296; CHECK-NEXT: lsl.w r6, r11, #21297; CHECK-NEXT: add.w r1, r0, r1, lsr #21298; CHECK-NEXT: str r1, [sp, #4] @ 4-byte Spill1299; CHECK-NEXT: lsl.w r1, r11, #51300; CHECK-NEXT: str r1, [sp] @ 4-byte Spill1301; CHECK-NEXT: .LBB7_2: @ %for.body1302; CHECK-NEXT: @ =>This Loop Header: Depth=11303; CHECK-NEXT: @ Child Loop BB7_3 Depth 21304; CHECK-NEXT: ldr.w r9, [sp, #12] @ 4-byte Reload1305; CHECK-NEXT: vmov.i32 q0, #0x01306; CHECK-NEXT: adds r4, r0, #31307; CHECK-NEXT: add.w r8, r0, #21308; CHECK-NEXT: adds r1, r0, #11309; CHECK-NEXT: ldr r7, [sp, #4] @ 4-byte Reload1310; CHECK-NEXT: vstrw.32 q0, [sp, #32] @ 16-byte Spill1311; CHECK-NEXT: vmov.i32 q0, #0x01312; CHECK-NEXT: vmov.i32 q3, #0x01313; CHECK-NEXT: mov r3, r121314; CHECK-NEXT: vmov.i32 q5, #0x01315; CHECK-NEXT: vmov.i32 q6, #0x01316; CHECK-NEXT: vmov.i32 q4, #0x01317; CHECK-NEXT: vmov.i32 q7, #0x01318; CHECK-NEXT: vmov.i32 q2, #0x01319; CHECK-NEXT: mov r10, r111320; CHECK-NEXT: vstrw.32 q0, [sp, #48] @ 16-byte Spill1321; CHECK-NEXT: dls lr, r71322; CHECK-NEXT: .LBB7_3: @ %vector.body1323; CHECK-NEXT: @ Parent Loop BB7_2 Depth=11324; CHECK-NEXT: @ => This Inner Loop Header: Depth=21325; CHECK-NEXT: vctp.32 r101326; CHECK-NEXT: adds r5, r3, r61327; CHECK-NEXT: vpstt1328; CHECK-NEXT: vldrwt.u32 q0, [r9], #161329; CHECK-NEXT: vldrwt.u32 q1, [r3], #161330; CHECK-NEXT: adds r7, r5, r61331; CHECK-NEXT: sub.w r10, r10, #41332; CHECK-NEXT: vpstt1333; CHECK-NEXT: vfmat.f32 q6, q1, q01334; CHECK-NEXT: vldrwt.u32 q1, [r5]1335; CHECK-NEXT: vstrw.32 q6, [sp, #16] @ 16-byte Spill1336; CHECK-NEXT: vmov q6, q51337; CHECK-NEXT: vpst1338; CHECK-NEXT: vfmat.f32 q7, q1, q01339; CHECK-NEXT: vmov q5, q41340; CHECK-NEXT: vmov q4, q31341; CHECK-NEXT: vmov q3, q21342; CHECK-NEXT: vpst1343; CHECK-NEXT: vldrwt.u32 q1, [r7]1344; CHECK-NEXT: vldrw.u32 q2, [sp, #32] @ 16-byte Reload1345; CHECK-NEXT: adds r5, r7, r61346; CHECK-NEXT: vpstt1347; CHECK-NEXT: vfmat.f32 q2, q1, q01348; CHECK-NEXT: vldrwt.u32 q1, [r5]1349; CHECK-NEXT: vstrw.32 q2, [sp, #32] @ 16-byte Spill1350; CHECK-NEXT: vldrw.u32 q2, [sp, #48] @ 16-byte Reload1351; CHECK-NEXT: adds r7, r5, r61352; CHECK-NEXT: vpstt1353; CHECK-NEXT: vfmat.f32 q2, q1, q01354; CHECK-NEXT: vldrwt.u32 q1, [r7]1355; CHECK-NEXT: adds r5, r7, r61356; CHECK-NEXT: vstrw.32 q2, [sp, #48] @ 16-byte Spill1357; CHECK-NEXT: vmov q2, q31358; CHECK-NEXT: vmov q3, q41359; CHECK-NEXT: vpstt1360; CHECK-NEXT: vfmat.f32 q2, q1, q01361; CHECK-NEXT: vldrwt.u32 q1, [r5]1362; CHECK-NEXT: vmov q4, q51363; CHECK-NEXT: adds r7, r5, r61364; CHECK-NEXT: vpstt1365; CHECK-NEXT: vfmat.f32 q4, q1, q01366; CHECK-NEXT: vldrwt.u32 q1, [r7]1367; CHECK-NEXT: vmov q5, q61368; CHECK-NEXT: adds r5, r7, r61369; CHECK-NEXT: vpstt1370; CHECK-NEXT: vfmat.f32 q5, q1, q01371; CHECK-NEXT: vldrwt.u32 q1, [r5]1372; CHECK-NEXT: vldrw.u32 q6, [sp, #16] @ 16-byte Reload1373; CHECK-NEXT: vpst1374; CHECK-NEXT: vfmat.f32 q3, q1, q01375; CHECK-NEXT: le lr, .LBB7_31376; CHECK-NEXT: @ %bb.4: @ %middle.block1377; CHECK-NEXT: @ in Loop: Header=BB7_2 Depth=11378; CHECK-NEXT: vadd.f32 s0, s30, s311379; CHECK-NEXT: add.w r1, r2, r1, lsl #21380; CHECK-NEXT: vadd.f32 s2, s28, s291381; CHECK-NEXT: vadd.f32 s4, s26, s271382; CHECK-NEXT: vadd.f32 s6, s24, s251383; CHECK-NEXT: vadd.f32 s5, s18, s191384; CHECK-NEXT: vadd.f32 s7, s16, s171385; CHECK-NEXT: vldrw.u32 q4, [sp, #32] @ 16-byte Reload1386; CHECK-NEXT: vadd.f32 s10, s10, s111387; CHECK-NEXT: vadd.f32 s8, s8, s91388; CHECK-NEXT: vadd.f32 s9, s18, s191389; CHECK-NEXT: vadd.f32 s11, s16, s171390; CHECK-NEXT: vldrw.u32 q4, [sp, #48] @ 16-byte Reload1391; CHECK-NEXT: vadd.f32 s14, s14, s151392; CHECK-NEXT: vadd.f32 s12, s12, s131393; CHECK-NEXT: vadd.f32 s13, s18, s191394; CHECK-NEXT: vadd.f32 s15, s16, s171395; CHECK-NEXT: vadd.f32 s0, s2, s01396; CHECK-NEXT: vadd.f32 s2, s6, s41397; CHECK-NEXT: vadd.f32 s8, s8, s101398; CHECK-NEXT: vadd.f32 s10, s11, s91399; CHECK-NEXT: vadd.f32 s6, s12, s141400; CHECK-NEXT: vadd.f32 s1, s22, s231401; CHECK-NEXT: vadd.f32 s14, s15, s131402; CHECK-NEXT: vstr s0, [r1]1403; CHECK-NEXT: add.w r1, r2, r0, lsl #21404; CHECK-NEXT: vadd.f32 s3, s20, s211405; CHECK-NEXT: vstr s2, [r1]1406; CHECK-NEXT: add.w r1, r2, r8, lsl #21407; CHECK-NEXT: vadd.f32 s12, s7, s51408; CHECK-NEXT: vstr s10, [r1]1409; CHECK-NEXT: add.w r1, r2, r4, lsl #21410; CHECK-NEXT: vstr s14, [r1]1411; CHECK-NEXT: adds r1, r0, #41412; CHECK-NEXT: add.w r1, r2, r1, lsl #21413; CHECK-NEXT: vadd.f32 s4, s3, s11414; CHECK-NEXT: vstr s8, [r1]1415; CHECK-NEXT: adds r1, r0, #51416; CHECK-NEXT: add.w r1, r2, r1, lsl #21417; CHECK-NEXT: vstr s12, [r1]1418; CHECK-NEXT: adds r1, r0, #61419; CHECK-NEXT: add.w r1, r2, r1, lsl #21420; CHECK-NEXT: vstr s4, [r1]1421; CHECK-NEXT: adds r1, r0, #71422; CHECK-NEXT: adds r0, #81423; CHECK-NEXT: add.w r1, r2, r1, lsl #21424; CHECK-NEXT: vstr s6, [r1]1425; CHECK-NEXT: ldr r1, [sp] @ 4-byte Reload1426; CHECK-NEXT: add r12, r11427; CHECK-NEXT: ldr r1, [sp, #8] @ 4-byte Reload1428; CHECK-NEXT: cmp r0, r11429; CHECK-NEXT: blo.w .LBB7_21430; CHECK-NEXT: .LBB7_5: @ %for.cond.cleanup1431; CHECK-NEXT: add sp, #641432; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}1433; CHECK-NEXT: add sp, #41434; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}1435entry:1436 %NumInputs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 21437 %i = load i32, ptr %NumInputs, align 41438 %NumFilters = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 11439 %i1 = load i32, ptr %NumFilters, align 41440 %pDCTCoefs = getelementptr inbounds %struct.DCT_InstanceTypeDef, ptr %S, i32 0, i32 01441 %i2 = load ptr, ptr %pDCTCoefs, align 41442 %cmp = icmp ugt i32 %i, 11443 tail call void @llvm.assume(i1 %cmp)1444 %sub = add i32 %i1, -81445 %cmp3197 = icmp ugt i32 %sub, 11446 br i1 %cmp3197, label %for.body.preheader, label %for.cond.cleanup1447 1448for.body.preheader: ; preds = %entry1449 %n.rnd.up = add i32 %i, 31450 %n.vec = and i32 %n.rnd.up, -41451 br label %for.body1452 1453for.cond.cleanup: ; preds = %middle.block, %entry1454 ret void1455 1456for.body: ; preds = %middle.block, %for.body.preheader1457 %k2.0198 = phi i32 [ %add79, %middle.block ], [ 1, %for.body.preheader ]1458 %mul4 = mul i32 %k2.0198, %i1459 %add = add nuw nsw i32 %k2.0198, 11460 %mul5 = mul i32 %add, %i1461 %add6 = add nuw nsw i32 %k2.0198, 21462 %mul7 = mul i32 %add6, %i1463 %add8 = add nuw nsw i32 %k2.0198, 31464 %mul9 = mul i32 %add8, %i1465 %add10 = add nuw nsw i32 %k2.0198, 41466 %mul11 = mul i32 %add10, %i1467 %add12 = add nuw nsw i32 %k2.0198, 51468 %mul13 = mul i32 %add12, %i1469 %add14 = add nuw nsw i32 %k2.0198, 61470 %mul15 = mul i32 %add14, %i1471 %add16 = add i32 %k2.0198, 71472 %mul17 = mul i32 %add16, %i1473 br label %vector.body1474 1475vector.body: ; preds = %vector.body, %for.body1476 %index = phi i32 [ 0, %for.body ], [ %index.next, %vector.body ]1477 %vec.phi = phi <4 x float> [ zeroinitializer, %for.body ], [ %i45, %vector.body ]1478 %vec.phi199 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i46, %vector.body ]1479 %vec.phi200 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i47, %vector.body ]1480 %vec.phi201 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i48, %vector.body ]1481 %vec.phi202 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i49, %vector.body ]1482 %vec.phi203 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i50, %vector.body ]1483 %vec.phi204 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i51, %vector.body ]1484 %vec.phi205 = phi <4 x float> [ zeroinitializer, %for.body ], [ %i52, %vector.body ]1485 %active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %i)1486 %i3 = getelementptr inbounds float, ptr %pIn, i32 %index1487 %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i3, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1488 %i5 = add i32 %index, %mul41489 %i6 = getelementptr inbounds float, ptr %i2, i32 %i51490 %wide.masked.load206 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i6, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1491 %i8 = fmul fast <4 x float> %wide.masked.load206, %wide.masked.load1492 %i9 = fadd fast <4 x float> %i8, %vec.phi2001493 %i10 = add i32 %index, %mul51494 %i11 = getelementptr inbounds float, ptr %i2, i32 %i101495 %wide.masked.load207 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i11, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1496 %i13 = fmul fast <4 x float> %wide.masked.load207, %wide.masked.load1497 %i14 = fadd fast <4 x float> %i13, %vec.phi2021498 %i15 = add i32 %index, %mul71499 %i16 = getelementptr inbounds float, ptr %i2, i32 %i151500 %wide.masked.load208 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i16, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1501 %i18 = fmul fast <4 x float> %wide.masked.load208, %wide.masked.load1502 %i19 = fadd fast <4 x float> %i18, %vec.phi2041503 %i20 = add i32 %index, %mul91504 %i21 = getelementptr inbounds float, ptr %i2, i32 %i201505 %wide.masked.load209 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i21, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1506 %i23 = fmul fast <4 x float> %wide.masked.load209, %wide.masked.load1507 %i24 = fadd fast <4 x float> %i23, %vec.phi2051508 %i25 = add i32 %index, %mul111509 %i26 = getelementptr inbounds float, ptr %i2, i32 %i251510 %wide.masked.load210 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i26, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1511 %i28 = fmul fast <4 x float> %wide.masked.load210, %wide.masked.load1512 %i29 = fadd fast <4 x float> %i28, %vec.phi2031513 %i30 = add i32 %index, %mul131514 %i31 = getelementptr inbounds float, ptr %i2, i32 %i301515 %wide.masked.load211 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i31, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1516 %i33 = fmul fast <4 x float> %wide.masked.load211, %wide.masked.load1517 %i34 = fadd fast <4 x float> %i33, %vec.phi2011518 %i35 = add i32 %index, %mul151519 %i36 = getelementptr inbounds float, ptr %i2, i32 %i351520 %wide.masked.load212 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i36, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1521 %i38 = fmul fast <4 x float> %wide.masked.load212, %wide.masked.load1522 %i39 = fadd fast <4 x float> %i38, %vec.phi1991523 %i40 = add i32 %index, %mul171524 %i41 = getelementptr inbounds float, ptr %i2, i32 %i401525 %wide.masked.load213 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i41, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef)1526 %i43 = fmul fast <4 x float> %wide.masked.load213, %wide.masked.load1527 %i44 = fadd fast <4 x float> %i43, %vec.phi1528 %i45 = select <4 x i1> %active.lane.mask, <4 x float> %i44, <4 x float> %vec.phi1529 %i46 = select <4 x i1> %active.lane.mask, <4 x float> %i39, <4 x float> %vec.phi1991530 %i47 = select <4 x i1> %active.lane.mask, <4 x float> %i9, <4 x float> %vec.phi2001531 %i48 = select <4 x i1> %active.lane.mask, <4 x float> %i34, <4 x float> %vec.phi2011532 %i49 = select <4 x i1> %active.lane.mask, <4 x float> %i14, <4 x float> %vec.phi2021533 %i50 = select <4 x i1> %active.lane.mask, <4 x float> %i29, <4 x float> %vec.phi2031534 %i51 = select <4 x i1> %active.lane.mask, <4 x float> %i19, <4 x float> %vec.phi2041535 %i52 = select <4 x i1> %active.lane.mask, <4 x float> %i24, <4 x float> %vec.phi2051536 %index.next = add i32 %index, 41537 %i53 = icmp eq i32 %index.next, %n.vec1538 br i1 %i53, label %middle.block, label %vector.body1539 1540middle.block: ; preds = %vector.body1541 %i54 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i52)1542 %i55 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i51)1543 %i56 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i50)1544 %i57 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i49)1545 %i58 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i48)1546 %i59 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i47)1547 %i60 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i46)1548 %i61 = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> %i45)1549 %arrayidx63 = getelementptr inbounds float, ptr %pOut, i32 %k2.01981550 store float %i59, ptr %arrayidx63, align 41551 %arrayidx65 = getelementptr inbounds float, ptr %pOut, i32 %add1552 store float %i57, ptr %arrayidx65, align 41553 %arrayidx67 = getelementptr inbounds float, ptr %pOut, i32 %add61554 store float %i55, ptr %arrayidx67, align 41555 %arrayidx69 = getelementptr inbounds float, ptr %pOut, i32 %add81556 store float %i54, ptr %arrayidx69, align 41557 %arrayidx71 = getelementptr inbounds float, ptr %pOut, i32 %add101558 store float %i56, ptr %arrayidx71, align 41559 %arrayidx73 = getelementptr inbounds float, ptr %pOut, i32 %add121560 store float %i58, ptr %arrayidx73, align 41561 %arrayidx75 = getelementptr inbounds float, ptr %pOut, i32 %add141562 store float %i60, ptr %arrayidx75, align 41563 %arrayidx77 = getelementptr inbounds float, ptr %pOut, i32 %add161564 store float %i61, ptr %arrayidx77, align 41565 %add79 = add i32 %k2.0198, 81566 %cmp3 = icmp ult i32 %add79, %sub1567 br i1 %cmp3, label %for.body, label %for.cond.cleanup1568}1569 1570declare void @llvm.assume(i1 noundef)1571declare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32, i32)1572declare <4 x float> @llvm.masked.load.v4f32.p0(ptr, i32 immarg, <4 x i1>, <4 x float>)1573declare float @llvm.vector.reduce.fadd.v4f32(float, <4 x float>)1574