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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp %s -o - | FileCheck %s3 4; Check some LSR loop postinc5 6; fma loop with a destination that is the same as one of the sources7define void @fma(ptr noalias nocapture readonly %A, ptr noalias nocapture readonly %B, ptr noalias nocapture %C, i32 %n) {8; CHECK-LABEL: fma:9; CHECK:       @ %bb.0: @ %entry10; CHECK-NEXT:    .save {r4, r5, r6, lr}11; CHECK-NEXT:    push {r4, r5, r6, lr}12; CHECK-NEXT:    cmp r3, #113; CHECK-NEXT:    blt .LBB0_814; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader15; CHECK-NEXT:    cmp r3, #316; CHECK-NEXT:    bhi .LBB0_317; CHECK-NEXT:  @ %bb.2:18; CHECK-NEXT:    mov.w r12, #019; CHECK-NEXT:    b .LBB0_620; CHECK-NEXT:  .LBB0_3: @ %vector.ph21; CHECK-NEXT:    bic r12, r3, #322; CHECK-NEXT:    movs r5, #123; CHECK-NEXT:    sub.w r6, r12, #424; CHECK-NEXT:    mov r4, r025; CHECK-NEXT:    add.w lr, r5, r6, lsr #226; CHECK-NEXT:    mov r5, r127; CHECK-NEXT:    mov r6, r228; CHECK-NEXT:  .LBB0_4: @ %vector.body29; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=130; CHECK-NEXT:    vldrw.u32 q0, [r4], #1631; CHECK-NEXT:    vldrw.u32 q1, [r5], #1632; CHECK-NEXT:    vldrw.u32 q2, [r6]33; CHECK-NEXT:    vfma.f32 q2, q1, q034; CHECK-NEXT:    vstrb.8 q2, [r6], #1635; CHECK-NEXT:    le lr, .LBB0_436; CHECK-NEXT:  @ %bb.5: @ %middle.block37; CHECK-NEXT:    cmp r12, r338; CHECK-NEXT:    it eq39; CHECK-NEXT:    popeq {r4, r5, r6, pc}40; CHECK-NEXT:  .LBB0_6: @ %for.body.preheader1241; CHECK-NEXT:    sub.w lr, r3, r1242; CHECK-NEXT:    add.w r0, r0, r12, lsl #243; CHECK-NEXT:    add.w r1, r1, r12, lsl #244; CHECK-NEXT:    add.w r2, r2, r12, lsl #245; CHECK-NEXT:  .LBB0_7: @ %for.body46; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=147; CHECK-NEXT:    vldmia r0!, {s0}48; CHECK-NEXT:    vldmia r1!, {s2}49; CHECK-NEXT:    vldr s4, [r2]50; CHECK-NEXT:    vfma.f32 s4, s2, s051; CHECK-NEXT:    vstmia r2!, {s4}52; CHECK-NEXT:    le lr, .LBB0_753; CHECK-NEXT:  .LBB0_8: @ %for.cond.cleanup54; CHECK-NEXT:    pop {r4, r5, r6, pc}55entry:56  %cmp8 = icmp sgt i32 %n, 057  br i1 %cmp8, label %for.body.preheader, label %for.cond.cleanup58 59for.body.preheader:                               ; preds = %entry60  %min.iters.check = icmp ult i32 %n, 461  br i1 %min.iters.check, label %for.body.preheader12, label %vector.ph62 63for.body.preheader12:                             ; preds = %middle.block, %for.body.preheader64  %i.09.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]65  br label %for.body66 67vector.ph:                                        ; preds = %for.body.preheader68  %n.vec = and i32 %n, -469  br label %vector.body70 71vector.body:                                      ; preds = %vector.body, %vector.ph72  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]73  %0 = getelementptr inbounds float, ptr %A, i32 %index74  %1 = bitcast ptr %0 to ptr75  %wide.load = load <4 x float>, ptr %1, align 476  %2 = getelementptr inbounds float, ptr %B, i32 %index77  %3 = bitcast ptr %2 to ptr78  %wide.load10 = load <4 x float>, ptr %3, align 479  %4 = fmul fast <4 x float> %wide.load10, %wide.load80  %5 = getelementptr inbounds float, ptr %C, i32 %index81  %6 = bitcast ptr %5 to ptr82  %wide.load11 = load <4 x float>, ptr %6, align 483  %7 = fadd fast <4 x float> %wide.load11, %484  %8 = bitcast ptr %5 to ptr85  store <4 x float> %7, ptr %8, align 486  %index.next = add i32 %index, 487  %9 = icmp eq i32 %index.next, %n.vec88  br i1 %9, label %middle.block, label %vector.body89 90middle.block:                                     ; preds = %vector.body91  %cmp.n = icmp eq i32 %n.vec, %n92  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader1293 94for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry95  ret void96 97for.body:                                         ; preds = %for.body.preheader12, %for.body98  %i.09 = phi i32 [ %inc, %for.body ], [ %i.09.ph, %for.body.preheader12 ]99  %arrayidx = getelementptr inbounds float, ptr %A, i32 %i.09100  %10 = load float, ptr %arrayidx, align 4101  %arrayidx1 = getelementptr inbounds float, ptr %B, i32 %i.09102  %11 = load float, ptr %arrayidx1, align 4103  %mul = fmul fast float %11, %10104  %arrayidx2 = getelementptr inbounds float, ptr %C, i32 %i.09105  %12 = load float, ptr %arrayidx2, align 4106  %add = fadd fast float %12, %mul107  store float %add, ptr %arrayidx2, align 4108  %inc = add nuw nsw i32 %i.09, 1109  %exitcond = icmp eq i32 %inc, %n110  br i1 %exitcond, label %for.cond.cleanup, label %for.body111}112 113 114; Same as above but tail predicated115; FIXME: The postinc here is put on the load, not the store. An extra mov is needed in the loop because of it.116define void @fma_tailpred(ptr noalias nocapture readonly %A, ptr noalias nocapture readonly %B, ptr noalias nocapture %C, i32 %n) {117; CHECK-LABEL: fma_tailpred:118; CHECK:       @ %bb.0: @ %entry119; CHECK-NEXT:    .save {r4, lr}120; CHECK-NEXT:    push {r4, lr}121; CHECK-NEXT:    .vsave {d8, d9}122; CHECK-NEXT:    vpush {d8, d9}123; CHECK-NEXT:    cmp r3, #1124; CHECK-NEXT:    blt .LBB1_3125; CHECK-NEXT:  @ %bb.1: @ %vector.ph126; CHECK-NEXT:    add.w r12, r3, #3127; CHECK-NEXT:    mov.w lr, #1128; CHECK-NEXT:    bic r12, r12, #3129; CHECK-NEXT:    adr r4, .LCPI1_0130; CHECK-NEXT:    sub.w r12, r12, #4131; CHECK-NEXT:    vldrw.u32 q0, [r4]132; CHECK-NEXT:    add.w lr, lr, r12, lsr #2133; CHECK-NEXT:    sub.w r12, r3, #1134; CHECK-NEXT:    movs r3, #0135; CHECK-NEXT:    vdup.32 q1, r12136; CHECK-NEXT:  .LBB1_2: @ %vector.body137; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1138; CHECK-NEXT:    vdup.32 q2, r3139; CHECK-NEXT:    adds r3, #4140; CHECK-NEXT:    vorr q2, q2, q0141; CHECK-NEXT:    vpttt.u32 cs, q1, q2142; CHECK-NEXT:    vldrwt.u32 q2, [r0], #16143; CHECK-NEXT:    vldrwt.u32 q3, [r1], #16144; CHECK-NEXT:    vldrwt.u32 q4, [r2]145; CHECK-NEXT:    vfma.f32 q4, q3, q2146; CHECK-NEXT:    vpst147; CHECK-NEXT:    vstrwt.32 q4, [r2], #16148; CHECK-NEXT:    le lr, .LBB1_2149; CHECK-NEXT:  .LBB1_3: @ %for.cond.cleanup150; CHECK-NEXT:    vpop {d8, d9}151; CHECK-NEXT:    pop {r4, pc}152; CHECK-NEXT:    .p2align 4153; CHECK-NEXT:  @ %bb.4:154; CHECK-NEXT:  .LCPI1_0:155; CHECK-NEXT:    .long 0 @ 0x0156; CHECK-NEXT:    .long 1 @ 0x1157; CHECK-NEXT:    .long 2 @ 0x2158; CHECK-NEXT:    .long 3 @ 0x3159entry:160  %cmp8 = icmp sgt i32 %n, 0161  br i1 %cmp8, label %vector.ph, label %for.cond.cleanup162 163vector.ph:                                        ; preds = %entry164  %n.rnd.up = add i32 %n, 3165  %n.vec = and i32 %n.rnd.up, -4166  %trip.count.minus.1 = add i32 %n, -1167  %broadcast.splatinsert10 = insertelement <4 x i32> undef, i32 %trip.count.minus.1, i32 0168  %broadcast.splat11 = shufflevector <4 x i32> %broadcast.splatinsert10, <4 x i32> undef, <4 x i32> zeroinitializer169  br label %vector.body170 171vector.body:                                      ; preds = %vector.body, %vector.ph172  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]173  %broadcast.splatinsert = insertelement <4 x i32> undef, i32 %index, i32 0174  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer175  %induction = or <4 x i32> %broadcast.splat, <i32 0, i32 1, i32 2, i32 3>176  %0 = getelementptr inbounds float, ptr %A, i32 %index177  %1 = icmp ule <4 x i32> %induction, %broadcast.splat11178  %2 = bitcast ptr %0 to ptr179  %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %2, i32 4, <4 x i1> %1, <4 x float> undef)180  %3 = getelementptr inbounds float, ptr %B, i32 %index181  %4 = bitcast ptr %3 to ptr182  %wide.masked.load12 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %4, i32 4, <4 x i1> %1, <4 x float> undef)183  %5 = fmul fast <4 x float> %wide.masked.load12, %wide.masked.load184  %6 = getelementptr inbounds float, ptr %C, i32 %index185  %7 = bitcast ptr %6 to ptr186  %wide.masked.load13 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %7, i32 4, <4 x i1> %1, <4 x float> undef)187  %8 = fadd fast <4 x float> %wide.masked.load13, %5188  %9 = bitcast ptr %6 to ptr189  call void @llvm.masked.store.v4f32.p0(<4 x float> %8, ptr %9, i32 4, <4 x i1> %1)190  %index.next = add i32 %index, 4191  %10 = icmp eq i32 %index.next, %n.vec192  br i1 %10, label %for.cond.cleanup, label %vector.body193 194for.cond.cleanup:                                 ; preds = %vector.body, %entry195  ret void196}197 198 199; Multiple loads of the loop with a common base200define ptr @test(ptr nocapture readonly %input_row, ptr nocapture readonly %input_col, i16 zeroext %output_ch, i16 zeroext %num_cols, i32 %col_offset, i16 signext %activation_min, i16 zeroext %row_len, ptr nocapture readonly %bias, ptr returned %out) {201; CHECK-LABEL: test:202; CHECK:       @ %bb.0: @ %entry203; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}204; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}205; CHECK-NEXT:    .pad #20206; CHECK-NEXT:    sub sp, #20207; CHECK-NEXT:    cmp r3, #4208; CHECK-NEXT:    strd r0, r1, [sp, #12] @ 8-byte Folded Spill209; CHECK-NEXT:    bne .LBB2_8210; CHECK-NEXT:  @ %bb.1: @ %for.cond.preheader211; CHECK-NEXT:    cmp r2, #0212; CHECK-NEXT:    beq .LBB2_8213; CHECK-NEXT:  @ %bb.2: @ %for.body.lr.ph214; CHECK-NEXT:    ldr r3, [sp, #64]215; CHECK-NEXT:    mov.w r9, #0216; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload217; CHECK-NEXT:    ldr.w r11, [sp, #56]218; CHECK-NEXT:    add.w r0, r1, r3, lsl #1219; CHECK-NEXT:    str r0, [sp, #8] @ 4-byte Spill220; CHECK-NEXT:    adds r0, r1, r3221; CHECK-NEXT:    str r0, [sp, #4] @ 4-byte Spill222; CHECK-NEXT:    add.w r0, r3, r3, lsl #1223; CHECK-NEXT:    add r0, r1224; CHECK-NEXT:    str r0, [sp] @ 4-byte Spill225; CHECK-NEXT:    adds r0, r3, #7226; CHECK-NEXT:    lsrs r0, r0, #3227; CHECK-NEXT:    b .LBB2_5228; CHECK-NEXT:  .LBB2_3: @ in Loop: Header=BB2_5 Depth=1229; CHECK-NEXT:    mov r10, r12230; CHECK-NEXT:    mov r8, r12231; CHECK-NEXT:    mov r6, r12232; CHECK-NEXT:  .LBB2_4: @ %for.cond.cleanup23233; CHECK-NEXT:    @ in Loop: Header=BB2_5 Depth=1234; CHECK-NEXT:    ldr r3, [sp, #72]235; CHECK-NEXT:    add.w r1, r8, r10236; CHECK-NEXT:    add r1, r6237; CHECK-NEXT:    add r1, r12238; CHECK-NEXT:    strb.w r1, [r3, r9]239; CHECK-NEXT:    add.w r9, r9, #1240; CHECK-NEXT:    cmp r9, r2241; CHECK-NEXT:    beq .LBB2_8242; CHECK-NEXT:  .LBB2_5: @ %for.body243; CHECK-NEXT:    @ =>This Loop Header: Depth=1244; CHECK-NEXT:    @ Child Loop BB2_7 Depth 2245; CHECK-NEXT:    ldr r1, [sp, #68]246; CHECK-NEXT:    ldr.w r12, [r1, r9, lsl #2]247; CHECK-NEXT:    subs r1, r0, r0248; CHECK-NEXT:    ble .LBB2_3249; CHECK-NEXT:  @ %bb.6: @ %for.body24.preheader250; CHECK-NEXT:    @ in Loop: Header=BB2_5 Depth=1251; CHECK-NEXT:    ldr r7, [sp, #64]252; CHECK-NEXT:    mov r6, r12253; CHECK-NEXT:    ldr r3, [sp, #12] @ 4-byte Reload254; CHECK-NEXT:    dls lr, r1255; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload256; CHECK-NEXT:    mov r8, r12257; CHECK-NEXT:    mla r7, r9, r7, r3258; CHECK-NEXT:    ldr r5, [sp, #8] @ 4-byte Reload259; CHECK-NEXT:    ldrd r4, r3, [sp] @ 8-byte Folded Reload260; CHECK-NEXT:    mov r10, r12261; CHECK-NEXT:  .LBB2_7: @ %for.body24262; CHECK-NEXT:    @ Parent Loop BB2_5 Depth=1263; CHECK-NEXT:    @ => This Inner Loop Header: Depth=2264; CHECK-NEXT:    vldrb.s16 q0, [r4], #8265; CHECK-NEXT:    vadd.i16 q1, q0, r11266; CHECK-NEXT:    vldrb.s16 q0, [r7], #8267; CHECK-NEXT:    vmlava.s16 r12, q0, q1268; CHECK-NEXT:    vldrb.s16 q1, [r5], #8269; CHECK-NEXT:    vadd.i16 q1, q1, r11270; CHECK-NEXT:    vmlava.s16 r6, q0, q1271; CHECK-NEXT:    vldrb.s16 q1, [r3], #8272; CHECK-NEXT:    vadd.i16 q1, q1, r11273; CHECK-NEXT:    vmlava.s16 r8, q0, q1274; CHECK-NEXT:    vldrb.s16 q1, [r1], #8275; CHECK-NEXT:    vadd.i16 q1, q1, r11276; CHECK-NEXT:    vmlava.s16 r10, q0, q1277; CHECK-NEXT:    le lr, .LBB2_7278; CHECK-NEXT:    b .LBB2_4279; CHECK-NEXT:  .LBB2_8: @ %if.end280; CHECK-NEXT:    ldr r0, [sp, #72]281; CHECK-NEXT:    add sp, #20282; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}283entry:284  %cmp = icmp eq i16 %num_cols, 4285  br i1 %cmp, label %for.cond.preheader, label %if.end286 287for.cond.preheader:                               ; preds = %entry288  %conv2 = zext i16 %output_ch to i32289  %cmp3114 = icmp eq i16 %output_ch, 0290  br i1 %cmp3114, label %if.end, label %for.body.lr.ph291 292for.body.lr.ph:                                   ; preds = %for.cond.preheader293  %conv5 = zext i16 %row_len to i32294  %add.ptr9 = getelementptr inbounds i8, ptr %input_col, i32 %conv5295  %mul11 = shl nuw nsw i32 %conv5, 1296  %add.ptr12 = getelementptr inbounds i8, ptr %input_col, i32 %mul11297  %mul14 = mul nuw nsw i32 %conv5, 3298  %add.ptr15 = getelementptr inbounds i8, ptr %input_col, i32 %mul14299  %add = add nuw nsw i32 %conv5, 7300  %div = lshr i32 %add, 3301  %conv25 = trunc i32 %col_offset to i16302  %.splatinsert = insertelement <8 x i16> undef, i16 %conv25, i32 0303  %.splat = shufflevector <8 x i16> %.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer304  br label %for.body305 306for.body:                                         ; preds = %for.cond.cleanup23, %for.body.lr.ph307  %i_out_ch.0116 = phi i32 [ 0, %for.body.lr.ph ], [ %inc37, %for.cond.cleanup23 ]308  %i_row_loop.0115 = phi i32 [ undef, %for.body.lr.ph ], [ %i_row_loop.1.lcssa, %for.cond.cleanup23 ]309  %arrayidx = getelementptr inbounds i32, ptr %bias, i32 %i_out_ch.0116310  %0 = load i32, ptr %arrayidx, align 4311  %cmp2199 = icmp slt i32 %i_row_loop.0115, %div312  br i1 %cmp2199, label %for.body24.preheader, label %for.cond.cleanup23313 314for.body24.preheader:                             ; preds = %for.body315  %mul = mul nuw nsw i32 %i_out_ch.0116, %conv5316  %add.ptr = getelementptr inbounds i8, ptr %input_row, i32 %mul317  br label %for.body24318 319for.cond.cleanup23:                               ; preds = %for.body24, %for.body320  %acc_0.0.lcssa = phi i32 [ %0, %for.body ], [ %20, %for.body24 ]321  %acc_1.0.lcssa = phi i32 [ %0, %for.body ], [ %21, %for.body24 ]322  %acc_2.0.lcssa = phi i32 [ %0, %for.body ], [ %22, %for.body24 ]323  %acc_3.0.lcssa = phi i32 [ %0, %for.body ], [ %23, %for.body24 ]324  %i_row_loop.1.lcssa = phi i32 [ %i_row_loop.0115, %for.body ], [ %div, %for.body24 ]325  %add31 = add nsw i32 %acc_1.0.lcssa, %acc_0.0.lcssa326  %add32 = add nsw i32 %add31, %acc_2.0.lcssa327  %add33 = add nsw i32 %add32, %acc_3.0.lcssa328  %conv34 = trunc i32 %add33 to i8329  %arrayidx35 = getelementptr inbounds i8, ptr %out, i32 %i_out_ch.0116330  store i8 %conv34, ptr %arrayidx35, align 1331  %inc37 = add nuw nsw i32 %i_out_ch.0116, 1332  %exitcond120 = icmp eq i32 %inc37, %conv2333  br i1 %exitcond120, label %if.end, label %for.body334 335for.body24:                                       ; preds = %for.body24, %for.body24.preheader336  %ip_r0.0109 = phi ptr [ %add.ptr26, %for.body24 ], [ %add.ptr, %for.body24.preheader ]337  %ip_c0.0108 = phi ptr [ %add.ptr27, %for.body24 ], [ %input_col, %for.body24.preheader ]338  %ip_c1.0107 = phi ptr [ %add.ptr28, %for.body24 ], [ %add.ptr9, %for.body24.preheader ]339  %ip_c2.0106 = phi ptr [ %add.ptr29, %for.body24 ], [ %add.ptr12, %for.body24.preheader ]340  %i_row_loop.1105 = phi i32 [ %inc, %for.body24 ], [ %i_row_loop.0115, %for.body24.preheader ]341  %ip_c3.0104 = phi ptr [ %add.ptr30, %for.body24 ], [ %add.ptr15, %for.body24.preheader ]342  %acc_3.0103 = phi i32 [ %23, %for.body24 ], [ %0, %for.body24.preheader ]343  %acc_2.0102 = phi i32 [ %22, %for.body24 ], [ %0, %for.body24.preheader ]344  %acc_1.0101 = phi i32 [ %21, %for.body24 ], [ %0, %for.body24.preheader ]345  %acc_0.0100 = phi i32 [ %20, %for.body24 ], [ %0, %for.body24.preheader ]346  %1 = bitcast ptr %ip_r0.0109 to ptr347  %2 = load <8 x i8>, ptr %1, align 1348  %3 = sext <8 x i8> %2 to <8 x i16>349  %add.ptr26 = getelementptr inbounds i8, ptr %ip_r0.0109, i32 8350  %4 = bitcast ptr %ip_c0.0108 to ptr351  %5 = load <8 x i8>, ptr %4, align 1352  %6 = sext <8 x i8> %5 to <8 x i16>353  %add.ptr27 = getelementptr inbounds i8, ptr %ip_c0.0108, i32 8354  %7 = add <8 x i16> %.splat, %6355  %8 = bitcast ptr %ip_c1.0107 to ptr356  %9 = load <8 x i8>, ptr %8, align 1357  %10 = sext <8 x i8> %9 to <8 x i16>358  %add.ptr28 = getelementptr inbounds i8, ptr %ip_c1.0107, i32 8359  %11 = add <8 x i16> %.splat, %10360  %12 = bitcast ptr %ip_c2.0106 to ptr361  %13 = load <8 x i8>, ptr %12, align 1362  %14 = sext <8 x i8> %13 to <8 x i16>363  %add.ptr29 = getelementptr inbounds i8, ptr %ip_c2.0106, i32 8364  %15 = add <8 x i16> %.splat, %14365  %16 = bitcast ptr %ip_c3.0104 to ptr366  %17 = load <8 x i8>, ptr %16, align 1367  %18 = sext <8 x i8> %17 to <8 x i16>368  %add.ptr30 = getelementptr inbounds i8, ptr %ip_c3.0104, i32 8369  %19 = add <8 x i16> %.splat, %18370  %20 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_0.0100, <8 x i16> %3, <8 x i16> %7)371  %21 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_1.0101, <8 x i16> %3, <8 x i16> %11)372  %22 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_2.0102, <8 x i16> %3, <8 x i16> %15)373  %23 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_3.0103, <8 x i16> %3, <8 x i16> %19)374  %inc = add nsw i32 %i_row_loop.1105, 1375  %exitcond = icmp eq i32 %inc, %div376  br i1 %exitcond, label %for.cond.cleanup23, label %for.body24377 378if.end:                                           ; preds = %for.cond.cleanup23, %for.cond.preheader, %entry379  ret ptr %out380}381 382; Same as above with optsize383define ptr @test_optsize(ptr nocapture readonly %input_row, ptr nocapture readonly %input_col, i16 zeroext %output_ch, i16 zeroext %num_cols, i32 %col_offset, i16 signext %activation_min, i16 zeroext %row_len, ptr nocapture readonly %bias, ptr returned %out) optsize {384; CHECK-LABEL: test_optsize:385; CHECK:       @ %bb.0: @ %entry386; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}387; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}388; CHECK-NEXT:    .pad #20389; CHECK-NEXT:    sub sp, #20390; CHECK-NEXT:    cmp r3, #4391; CHECK-NEXT:    strd r0, r1, [sp, #12] @ 8-byte Folded Spill392; CHECK-NEXT:    bne .LBB3_8393; CHECK-NEXT:  @ %bb.1: @ %for.cond.preheader394; CHECK-NEXT:    cmp r2, #0395; CHECK-NEXT:    beq .LBB3_8396; CHECK-NEXT:  @ %bb.2: @ %for.body.lr.ph397; CHECK-NEXT:    ldr r3, [sp, #64]398; CHECK-NEXT:    mov.w r9, #0399; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload400; CHECK-NEXT:    ldr.w r11, [sp, #56]401; CHECK-NEXT:    add.w r0, r1, r3, lsl #1402; CHECK-NEXT:    str r0, [sp, #8] @ 4-byte Spill403; CHECK-NEXT:    adds r0, r1, r3404; CHECK-NEXT:    str r0, [sp, #4] @ 4-byte Spill405; CHECK-NEXT:    add.w r0, r3, r3, lsl #1406; CHECK-NEXT:    add r0, r1407; CHECK-NEXT:    str r0, [sp] @ 4-byte Spill408; CHECK-NEXT:    adds r0, r3, #7409; CHECK-NEXT:    lsrs r0, r0, #3410; CHECK-NEXT:  .LBB3_3: @ %for.body411; CHECK-NEXT:    @ =>This Loop Header: Depth=1412; CHECK-NEXT:    @ Child Loop BB3_5 Depth 2413; CHECK-NEXT:    ldr r1, [sp, #68]414; CHECK-NEXT:    ldr.w r12, [r1, r9, lsl #2]415; CHECK-NEXT:    subs r1, r0, r0416; CHECK-NEXT:    ble .LBB3_6417; CHECK-NEXT:  @ %bb.4: @ %for.body24.preheader418; CHECK-NEXT:    @ in Loop: Header=BB3_3 Depth=1419; CHECK-NEXT:    ldr r7, [sp, #64]420; CHECK-NEXT:    mov r6, r12421; CHECK-NEXT:    ldr r3, [sp, #12] @ 4-byte Reload422; CHECK-NEXT:    dls lr, r1423; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload424; CHECK-NEXT:    mov r8, r12425; CHECK-NEXT:    mla r7, r9, r7, r3426; CHECK-NEXT:    ldr r5, [sp, #8] @ 4-byte Reload427; CHECK-NEXT:    ldrd r4, r3, [sp] @ 8-byte Folded Reload428; CHECK-NEXT:    mov r10, r12429; CHECK-NEXT:  .LBB3_5: @ %for.body24430; CHECK-NEXT:    @ Parent Loop BB3_3 Depth=1431; CHECK-NEXT:    @ => This Inner Loop Header: Depth=2432; CHECK-NEXT:    vldrb.s16 q0, [r4], #8433; CHECK-NEXT:    vadd.i16 q1, q0, r11434; CHECK-NEXT:    vldrb.s16 q0, [r7], #8435; CHECK-NEXT:    vmlava.s16 r12, q0, q1436; CHECK-NEXT:    vldrb.s16 q1, [r5], #8437; CHECK-NEXT:    vadd.i16 q1, q1, r11438; CHECK-NEXT:    vmlava.s16 r6, q0, q1439; CHECK-NEXT:    vldrb.s16 q1, [r3], #8440; CHECK-NEXT:    vadd.i16 q1, q1, r11441; CHECK-NEXT:    vmlava.s16 r8, q0, q1442; CHECK-NEXT:    vldrb.s16 q1, [r1], #8443; CHECK-NEXT:    vadd.i16 q1, q1, r11444; CHECK-NEXT:    vmlava.s16 r10, q0, q1445; CHECK-NEXT:    le lr, .LBB3_5446; CHECK-NEXT:    b .LBB3_7447; CHECK-NEXT:  .LBB3_6: @ in Loop: Header=BB3_3 Depth=1448; CHECK-NEXT:    mov r10, r12449; CHECK-NEXT:    mov r8, r12450; CHECK-NEXT:    mov r6, r12451; CHECK-NEXT:  .LBB3_7: @ %for.cond.cleanup23452; CHECK-NEXT:    @ in Loop: Header=BB3_3 Depth=1453; CHECK-NEXT:    ldr r3, [sp, #72]454; CHECK-NEXT:    add.w r1, r8, r10455; CHECK-NEXT:    add r1, r6456; CHECK-NEXT:    add r1, r12457; CHECK-NEXT:    strb.w r1, [r3, r9]458; CHECK-NEXT:    add.w r9, r9, #1459; CHECK-NEXT:    cmp r9, r2460; CHECK-NEXT:    bne .LBB3_3461; CHECK-NEXT:  .LBB3_8: @ %if.end462; CHECK-NEXT:    ldr r0, [sp, #72]463; CHECK-NEXT:    add sp, #20464; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}465entry:466  %cmp = icmp eq i16 %num_cols, 4467  br i1 %cmp, label %for.cond.preheader, label %if.end468 469for.cond.preheader:                               ; preds = %entry470  %conv2 = zext i16 %output_ch to i32471  %cmp3114 = icmp eq i16 %output_ch, 0472  br i1 %cmp3114, label %if.end, label %for.body.lr.ph473 474for.body.lr.ph:                                   ; preds = %for.cond.preheader475  %conv5 = zext i16 %row_len to i32476  %add.ptr9 = getelementptr inbounds i8, ptr %input_col, i32 %conv5477  %mul11 = shl nuw nsw i32 %conv5, 1478  %add.ptr12 = getelementptr inbounds i8, ptr %input_col, i32 %mul11479  %mul14 = mul nuw nsw i32 %conv5, 3480  %add.ptr15 = getelementptr inbounds i8, ptr %input_col, i32 %mul14481  %add = add nuw nsw i32 %conv5, 7482  %div = lshr i32 %add, 3483  %conv25 = trunc i32 %col_offset to i16484  %.splatinsert = insertelement <8 x i16> undef, i16 %conv25, i32 0485  %.splat = shufflevector <8 x i16> %.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer486  br label %for.body487 488for.body:                                         ; preds = %for.cond.cleanup23, %for.body.lr.ph489  %i_out_ch.0116 = phi i32 [ 0, %for.body.lr.ph ], [ %inc37, %for.cond.cleanup23 ]490  %i_row_loop.0115 = phi i32 [ undef, %for.body.lr.ph ], [ %i_row_loop.1.lcssa, %for.cond.cleanup23 ]491  %arrayidx = getelementptr inbounds i32, ptr %bias, i32 %i_out_ch.0116492  %0 = load i32, ptr %arrayidx, align 4493  %cmp2199 = icmp slt i32 %i_row_loop.0115, %div494  br i1 %cmp2199, label %for.body24.preheader, label %for.cond.cleanup23495 496for.body24.preheader:                             ; preds = %for.body497  %mul = mul nuw nsw i32 %i_out_ch.0116, %conv5498  %add.ptr = getelementptr inbounds i8, ptr %input_row, i32 %mul499  br label %for.body24500 501for.cond.cleanup23:                               ; preds = %for.body24, %for.body502  %acc_0.0.lcssa = phi i32 [ %0, %for.body ], [ %20, %for.body24 ]503  %acc_1.0.lcssa = phi i32 [ %0, %for.body ], [ %21, %for.body24 ]504  %acc_2.0.lcssa = phi i32 [ %0, %for.body ], [ %22, %for.body24 ]505  %acc_3.0.lcssa = phi i32 [ %0, %for.body ], [ %23, %for.body24 ]506  %i_row_loop.1.lcssa = phi i32 [ %i_row_loop.0115, %for.body ], [ %div, %for.body24 ]507  %add31 = add nsw i32 %acc_1.0.lcssa, %acc_0.0.lcssa508  %add32 = add nsw i32 %add31, %acc_2.0.lcssa509  %add33 = add nsw i32 %add32, %acc_3.0.lcssa510  %conv34 = trunc i32 %add33 to i8511  %arrayidx35 = getelementptr inbounds i8, ptr %out, i32 %i_out_ch.0116512  store i8 %conv34, ptr %arrayidx35, align 1513  %inc37 = add nuw nsw i32 %i_out_ch.0116, 1514  %exitcond120 = icmp eq i32 %inc37, %conv2515  br i1 %exitcond120, label %if.end, label %for.body516 517for.body24:                                       ; preds = %for.body24, %for.body24.preheader518  %ip_r0.0109 = phi ptr [ %add.ptr26, %for.body24 ], [ %add.ptr, %for.body24.preheader ]519  %ip_c0.0108 = phi ptr [ %add.ptr27, %for.body24 ], [ %input_col, %for.body24.preheader ]520  %ip_c1.0107 = phi ptr [ %add.ptr28, %for.body24 ], [ %add.ptr9, %for.body24.preheader ]521  %ip_c2.0106 = phi ptr [ %add.ptr29, %for.body24 ], [ %add.ptr12, %for.body24.preheader ]522  %i_row_loop.1105 = phi i32 [ %inc, %for.body24 ], [ %i_row_loop.0115, %for.body24.preheader ]523  %ip_c3.0104 = phi ptr [ %add.ptr30, %for.body24 ], [ %add.ptr15, %for.body24.preheader ]524  %acc_3.0103 = phi i32 [ %23, %for.body24 ], [ %0, %for.body24.preheader ]525  %acc_2.0102 = phi i32 [ %22, %for.body24 ], [ %0, %for.body24.preheader ]526  %acc_1.0101 = phi i32 [ %21, %for.body24 ], [ %0, %for.body24.preheader ]527  %acc_0.0100 = phi i32 [ %20, %for.body24 ], [ %0, %for.body24.preheader ]528  %1 = bitcast ptr %ip_r0.0109 to ptr529  %2 = load <8 x i8>, ptr %1, align 1530  %3 = sext <8 x i8> %2 to <8 x i16>531  %add.ptr26 = getelementptr inbounds i8, ptr %ip_r0.0109, i32 8532  %4 = bitcast ptr %ip_c0.0108 to ptr533  %5 = load <8 x i8>, ptr %4, align 1534  %6 = sext <8 x i8> %5 to <8 x i16>535  %add.ptr27 = getelementptr inbounds i8, ptr %ip_c0.0108, i32 8536  %7 = add <8 x i16> %.splat, %6537  %8 = bitcast ptr %ip_c1.0107 to ptr538  %9 = load <8 x i8>, ptr %8, align 1539  %10 = sext <8 x i8> %9 to <8 x i16>540  %add.ptr28 = getelementptr inbounds i8, ptr %ip_c1.0107, i32 8541  %11 = add <8 x i16> %.splat, %10542  %12 = bitcast ptr %ip_c2.0106 to ptr543  %13 = load <8 x i8>, ptr %12, align 1544  %14 = sext <8 x i8> %13 to <8 x i16>545  %add.ptr29 = getelementptr inbounds i8, ptr %ip_c2.0106, i32 8546  %15 = add <8 x i16> %.splat, %14547  %16 = bitcast ptr %ip_c3.0104 to ptr548  %17 = load <8 x i8>, ptr %16, align 1549  %18 = sext <8 x i8> %17 to <8 x i16>550  %add.ptr30 = getelementptr inbounds i8, ptr %ip_c3.0104, i32 8551  %19 = add <8 x i16> %.splat, %18552  %20 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_0.0100, <8 x i16> %3, <8 x i16> %7)553  %21 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_1.0101, <8 x i16> %3, <8 x i16> %11)554  %22 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_2.0102, <8 x i16> %3, <8 x i16> %15)555  %23 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_3.0103, <8 x i16> %3, <8 x i16> %19)556  %inc = add nsw i32 %i_row_loop.1105, 1557  %exitcond = icmp eq i32 %inc, %div558  br i1 %exitcond, label %for.cond.cleanup23, label %for.body24559 560if.end:                                           ; preds = %for.cond.cleanup23, %for.cond.preheader, %entry561  ret ptr %out562}563 564 565; Similar but predicated566define i32 @arm_nn_mat_mul_core_4x_s8(i32 %row_elements, i32 %offset, ptr %row_base, ptr %col_base, ptr nocapture readnone %sum_col, ptr nocapture %output) {567; CHECK-LABEL: arm_nn_mat_mul_core_4x_s8:568; CHECK:       @ %bb.0: @ %entry569; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r10, lr}570; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r10, lr}571; CHECK-NEXT:    ldr.w r12, [sp, #32]572; CHECK-NEXT:    cmp r0, #1573; CHECK-NEXT:    blt .LBB4_3574; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader575; CHECK-NEXT:    add.w r5, r2, r1, lsl #1576; CHECK-NEXT:    mov.w r8, #0577; CHECK-NEXT:    movs r4, #0578; CHECK-NEXT:    mov.w r10, #0579; CHECK-NEXT:    movs r6, #0580; CHECK-NEXT:    adds r7, r2, r1581; CHECK-NEXT:    add.w r1, r1, r1, lsl #1582; CHECK-NEXT:    add r1, r2583; CHECK-NEXT:    dlstp.8 lr, r0584; CHECK-NEXT:  .LBB4_2: @ %for.body585; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1586; CHECK-NEXT:    vldrb.u8 q0, [r3], #16587; CHECK-NEXT:    vldrb.u8 q1, [r1], #16588; CHECK-NEXT:    vmlava.s8 r10, q1, q0589; CHECK-NEXT:    vldrb.u8 q1, [r5], #16590; CHECK-NEXT:    vmlava.s8 r4, q1, q0591; CHECK-NEXT:    vldrb.u8 q1, [r7], #16592; CHECK-NEXT:    vmlava.s8 r6, q1, q0593; CHECK-NEXT:    vldrb.u8 q1, [r2], #16594; CHECK-NEXT:    vmlava.s8 r8, q1, q0595; CHECK-NEXT:    letp lr, .LBB4_2596; CHECK-NEXT:    b .LBB4_4597; CHECK-NEXT:  .LBB4_3:598; CHECK-NEXT:    mov.w r10, #0599; CHECK-NEXT:    movs r4, #0600; CHECK-NEXT:    movs r6, #0601; CHECK-NEXT:    mov.w r8, #0602; CHECK-NEXT:  .LBB4_4: @ %for.cond.cleanup603; CHECK-NEXT:    movs r0, #0604; CHECK-NEXT:    strd r8, r6, [r12]605; CHECK-NEXT:    strd r4, r10, [r12, #8]606; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r10, pc}607entry:608  %add = add nsw i32 %row_elements, 15609  %div = sdiv i32 %add, 16610  %cmp84 = icmp sgt i32 %row_elements, 0611  br i1 %cmp84, label %for.body.preheader, label %for.cond.cleanup612 613for.body.preheader:                               ; preds = %entry614  %mul2 = mul nsw i32 %offset, 3615  %add.ptr3 = getelementptr inbounds i8, ptr %row_base, i32 %mul2616  %mul = shl nsw i32 %offset, 1617  %add.ptr1 = getelementptr inbounds i8, ptr %row_base, i32 %mul618  %add.ptr = getelementptr inbounds i8, ptr %row_base, i32 %offset619  %0 = icmp sgt i32 %div, 1620  %smax = select i1 %0, i32 %div, i32 1621  br label %for.body622 623for.cond.cleanup:                                 ; preds = %for.body, %entry624  %acc_n.sroa.12.0.lcssa = phi i32 [ 0, %entry ], [ %15, %for.body ]625  %acc_n.sroa.9.0.lcssa = phi i32 [ 0, %entry ], [ %12, %for.body ]626  %acc_n.sroa.6.0.lcssa = phi i32 [ 0, %entry ], [ %9, %for.body ]627  %acc_n.sroa.0.0.lcssa = phi i32 [ 0, %entry ], [ %6, %for.body ]628  store i32 %acc_n.sroa.0.0.lcssa, ptr %output, align 4629  %arrayidx19 = getelementptr inbounds i32, ptr %output, i32 1630  store i32 %acc_n.sroa.6.0.lcssa, ptr %arrayidx19, align 4631  %arrayidx21 = getelementptr inbounds i32, ptr %output, i32 2632  store i32 %acc_n.sroa.9.0.lcssa, ptr %arrayidx21, align 4633  %arrayidx23 = getelementptr inbounds i32, ptr %output, i32 3634  store i32 %acc_n.sroa.12.0.lcssa, ptr %arrayidx23, align 4635  ret i32 0636 637for.body:                                         ; preds = %for.body, %for.body.preheader638  %col_base.addr.095 = phi ptr [ %add.ptr4, %for.body ], [ %col_base, %for.body.preheader ]639  %acc_n.sroa.0.094 = phi i32 [ %6, %for.body ], [ 0, %for.body.preheader ]640  %acc_n.sroa.6.093 = phi i32 [ %9, %for.body ], [ 0, %for.body.preheader ]641  %acc_n.sroa.9.092 = phi i32 [ %12, %for.body ], [ 0, %for.body.preheader ]642  %i.091 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]643  %row_elem.090 = phi i32 [ %sub, %for.body ], [ %row_elements, %for.body.preheader ]644  %acc_n.sroa.12.089 = phi i32 [ %15, %for.body ], [ 0, %for.body.preheader ]645  %ip_row_3.088 = phi ptr [ %add.ptr15, %for.body ], [ %add.ptr3, %for.body.preheader ]646  %ip_row_2.087 = phi ptr [ %add.ptr14, %for.body ], [ %add.ptr1, %for.body.preheader ]647  %ip_row_1.086 = phi ptr [ %add.ptr13, %for.body ], [ %add.ptr, %for.body.preheader ]648  %ip_row_0.085 = phi ptr [ %add.ptr12, %for.body ], [ %row_base, %for.body.preheader ]649  %1 = tail call <16 x i1> @llvm.arm.mve.vctp8(i32 %row_elem.090)650  %sub = add nsw i32 %row_elem.090, -16651  %2 = bitcast ptr %col_base.addr.095 to ptr652  %3 = tail call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %2, i32 1, <16 x i1> %1, <16 x i8> zeroinitializer)653  %add.ptr4 = getelementptr inbounds i8, ptr %col_base.addr.095, i32 16654  %4 = bitcast ptr %ip_row_0.085 to ptr655  %5 = tail call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %4, i32 1, <16 x i1> %1, <16 x i8> zeroinitializer)656  %6 = tail call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 0, i32 0, i32 %acc_n.sroa.0.094, <16 x i8> %5, <16 x i8> %3, <16 x i1> %1)657  %7 = bitcast ptr %ip_row_1.086 to ptr658  %8 = tail call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %7, i32 1, <16 x i1> %1, <16 x i8> zeroinitializer)659  %9 = tail call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 0, i32 0, i32 %acc_n.sroa.6.093, <16 x i8> %8, <16 x i8> %3, <16 x i1> %1)660  %10 = bitcast ptr %ip_row_2.087 to ptr661  %11 = tail call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %10, i32 1, <16 x i1> %1, <16 x i8> zeroinitializer)662  %12 = tail call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 0, i32 0, i32 %acc_n.sroa.9.092, <16 x i8> %11, <16 x i8> %3, <16 x i1> %1)663  %13 = bitcast ptr %ip_row_3.088 to ptr664  %14 = tail call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %13, i32 1, <16 x i1> %1, <16 x i8> zeroinitializer)665  %15 = tail call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 0, i32 0, i32 %acc_n.sroa.12.089, <16 x i8> %14, <16 x i8> %3, <16 x i1> %1)666  %add.ptr12 = getelementptr inbounds i8, ptr %ip_row_0.085, i32 16667  %add.ptr13 = getelementptr inbounds i8, ptr %ip_row_1.086, i32 16668  %add.ptr14 = getelementptr inbounds i8, ptr %ip_row_2.087, i32 16669  %add.ptr15 = getelementptr inbounds i8, ptr %ip_row_3.088, i32 16670  %inc = add nuw nsw i32 %i.091, 1671  %exitcond = icmp eq i32 %inc, %smax672  br i1 %exitcond, label %for.cond.cleanup, label %for.body673}674 675define ptr @signext(ptr %input_row, ptr %input_col, i16 zeroext %output_ch, i16 zeroext %num_cols, ptr nocapture readnone %output_shift, ptr nocapture readnone %output_mult, i32 %out_offset, i32 %col_offset, i32 %row_offset, i16 signext %activation_min, i16 signext %activation_max, i16 zeroext %row_len, ptr nocapture readonly %bias, ptr returned %out) {676; CHECK-LABEL: signext:677; CHECK:       @ %bb.0: @ %entry678; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}679; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}680; CHECK-NEXT:    .pad #28681; CHECK-NEXT:    sub sp, #28682; CHECK-NEXT:    add.w r12, sp, #12683; CHECK-NEXT:    cmp r3, #4684; CHECK-NEXT:    stm.w r12, {r0, r1, r2} @ 12-byte Folded Spill685; CHECK-NEXT:    bne .LBB5_8686; CHECK-NEXT:  @ %bb.1: @ %for.cond.preheader687; CHECK-NEXT:    ldr r0, [sp, #20] @ 4-byte Reload688; CHECK-NEXT:    cmp r0, #0689; CHECK-NEXT:    beq .LBB5_8690; CHECK-NEXT:  @ %bb.2: @ %for.body.lr.ph691; CHECK-NEXT:    ldr r2, [sp, #92]692; CHECK-NEXT:    mov.w r11, #0693; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload694; CHECK-NEXT:    ldr r4, [sp, #76]695; CHECK-NEXT:    add.w r0, r1, r2, lsl #1696; CHECK-NEXT:    str r0, [sp, #8] @ 4-byte Spill697; CHECK-NEXT:    adds r0, r1, r2698; CHECK-NEXT:    str r0, [sp, #4] @ 4-byte Spill699; CHECK-NEXT:    add.w r0, r2, r2, lsl #1700; CHECK-NEXT:    add r0, r1701; CHECK-NEXT:    str r0, [sp] @ 4-byte Spill702; CHECK-NEXT:    adds r0, r2, #7703; CHECK-NEXT:    lsrs r1, r0, #3704; CHECK-NEXT:    b .LBB5_5705; CHECK-NEXT:  .LBB5_3: @ in Loop: Header=BB5_5 Depth=1706; CHECK-NEXT:    mov r10, r12707; CHECK-NEXT:    mov r8, r12708; CHECK-NEXT:    mov r6, r12709; CHECK-NEXT:  .LBB5_4: @ %for.cond.cleanup23710; CHECK-NEXT:    @ in Loop: Header=BB5_5 Depth=1711; CHECK-NEXT:    ldr r1, [sp, #100]712; CHECK-NEXT:    add.w r0, r8, r10713; CHECK-NEXT:    add r0, r6714; CHECK-NEXT:    add r0, r12715; CHECK-NEXT:    strb.w r0, [r1, r11]716; CHECK-NEXT:    add.w r11, r11, #1717; CHECK-NEXT:    ldr r1, [sp, #24] @ 4-byte Reload718; CHECK-NEXT:    ldr r0, [sp, #20] @ 4-byte Reload719; CHECK-NEXT:    cmp r11, r0720; CHECK-NEXT:    beq .LBB5_8721; CHECK-NEXT:  .LBB5_5: @ %for.body722; CHECK-NEXT:    @ =>This Loop Header: Depth=1723; CHECK-NEXT:    @ Child Loop BB5_7 Depth 2724; CHECK-NEXT:    ldr r0, [sp, #96]725; CHECK-NEXT:    cmp r1, r1726; CHECK-NEXT:    str r1, [sp, #24] @ 4-byte Spill727; CHECK-NEXT:    ldr.w r12, [r0, r11, lsl #2]728; CHECK-NEXT:    ble .LBB5_3729; CHECK-NEXT:  @ %bb.6: @ %for.body24.preheader730; CHECK-NEXT:    @ in Loop: Header=BB5_5 Depth=1731; CHECK-NEXT:    ldr.w lr, [sp, #92]732; CHECK-NEXT:    ldr r0, [sp, #12] @ 4-byte Reload733; CHECK-NEXT:    mov r6, r12734; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload735; CHECK-NEXT:    mov r8, r12736; CHECK-NEXT:    mla r3, r11, lr, r0737; CHECK-NEXT:    mov r10, r12738; CHECK-NEXT:    ldm.w sp, {r0, r5, r7} @ 12-byte Folded Reload739; CHECK-NEXT:    dlstp.16 lr, lr740; CHECK-NEXT:  .LBB5_7: @ %for.body24741; CHECK-NEXT:    @ Parent Loop BB5_5 Depth=1742; CHECK-NEXT:    @ => This Inner Loop Header: Depth=2743; CHECK-NEXT:    vldrb.s16 q0, [r0], #8744; CHECK-NEXT:    vadd.i16 q1, q0, r4745; CHECK-NEXT:    vldrb.s16 q0, [r3], #8746; CHECK-NEXT:    vmlava.s16 r12, q0, q1747; CHECK-NEXT:    vldrb.s16 q1, [r7], #8748; CHECK-NEXT:    vadd.i16 q1, q1, r4749; CHECK-NEXT:    vmlava.s16 r6, q0, q1750; CHECK-NEXT:    vldrb.s16 q1, [r5], #8751; CHECK-NEXT:    vadd.i16 q1, q1, r4752; CHECK-NEXT:    vmlava.s16 r8, q0, q1753; CHECK-NEXT:    vldrb.s16 q1, [r1], #8754; CHECK-NEXT:    vadd.i16 q1, q1, r4755; CHECK-NEXT:    vmlava.s16 r10, q0, q1756; CHECK-NEXT:    letp lr, .LBB5_7757; CHECK-NEXT:    b .LBB5_4758; CHECK-NEXT:  .LBB5_8: @ %if.end759; CHECK-NEXT:    ldr r0, [sp, #100]760; CHECK-NEXT:    add sp, #28761; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}762entry:763  %cmp = icmp eq i16 %num_cols, 4764  br i1 %cmp, label %for.cond.preheader, label %if.end765 766for.cond.preheader:                               ; preds = %entry767  %conv2 = zext i16 %output_ch to i32768  %cmp3127 = icmp eq i16 %output_ch, 0769  br i1 %cmp3127, label %if.end, label %for.body.lr.ph770 771for.body.lr.ph:                                   ; preds = %for.cond.preheader772  %conv5 = zext i16 %row_len to i32773  %add.ptr9 = getelementptr inbounds i8, ptr %input_col, i32 %conv5774  %mul11 = shl nuw nsw i32 %conv5, 1775  %add.ptr12 = getelementptr inbounds i8, ptr %input_col, i32 %mul11776  %mul14 = mul nuw nsw i32 %conv5, 3777  %add.ptr15 = getelementptr inbounds i8, ptr %input_col, i32 %mul14778  %add = add nuw nsw i32 %conv5, 7779  %div = lshr i32 %add, 3780  %conv25 = trunc i32 %col_offset to i16781  %.splatinsert.i = insertelement <8 x i16> undef, i16 %conv25, i32 0782  %.splat.i = shufflevector <8 x i16> %.splatinsert.i, <8 x i16> undef, <8 x i32> zeroinitializer783  br label %for.body784 785for.body:                                         ; preds = %for.cond.cleanup23, %for.body.lr.ph786  %i_out_ch.0129 = phi i32 [ 0, %for.body.lr.ph ], [ %inc37, %for.cond.cleanup23 ]787  %i_row_loop.0128 = phi i32 [ undef, %for.body.lr.ph ], [ %i_row_loop.1.lcssa, %for.cond.cleanup23 ]788  %arrayidx = getelementptr inbounds i32, ptr %bias, i32 %i_out_ch.0129789  %0 = load i32, ptr %arrayidx, align 4790  %cmp21111 = icmp slt i32 %i_row_loop.0128, %div791  br i1 %cmp21111, label %for.body24.preheader, label %for.cond.cleanup23792 793for.body24.preheader:                             ; preds = %for.body794  %mul = mul nuw nsw i32 %i_out_ch.0129, %conv5795  %add.ptr = getelementptr inbounds i8, ptr %input_row, i32 %mul796  br label %for.body24797 798for.cond.cleanup23:                               ; preds = %for.body24, %for.body799  %acc_0.0.lcssa = phi i32 [ %0, %for.body ], [ %21, %for.body24 ]800  %acc_1.0.lcssa = phi i32 [ %0, %for.body ], [ %22, %for.body24 ]801  %acc_2.0.lcssa = phi i32 [ %0, %for.body ], [ %23, %for.body24 ]802  %acc_3.0.lcssa = phi i32 [ %0, %for.body ], [ %24, %for.body24 ]803  %i_row_loop.1.lcssa = phi i32 [ %i_row_loop.0128, %for.body ], [ %div, %for.body24 ]804  %add31 = add nsw i32 %acc_1.0.lcssa, %acc_0.0.lcssa805  %add32 = add nsw i32 %add31, %acc_2.0.lcssa806  %add33 = add nsw i32 %add32, %acc_3.0.lcssa807  %conv34 = trunc i32 %add33 to i8808  %arrayidx35 = getelementptr inbounds i8, ptr %out, i32 %i_out_ch.0129809  store i8 %conv34, ptr %arrayidx35, align 1810  %inc37 = add nuw nsw i32 %i_out_ch.0129, 1811  %exitcond133 = icmp eq i32 %inc37, %conv2812  br i1 %exitcond133, label %if.end, label %for.body813 814for.body24:                                       ; preds = %for.body24, %for.body24.preheader815  %row_len_tmp.0122 = phi i32 [ %sub, %for.body24 ], [ %conv5, %for.body24.preheader ]816  %ip_r0.0121 = phi ptr [ %add.ptr26, %for.body24 ], [ %add.ptr, %for.body24.preheader ]817  %ip_c0.0120 = phi ptr [ %add.ptr27, %for.body24 ], [ %input_col, %for.body24.preheader ]818  %ip_c1.0119 = phi ptr [ %add.ptr28, %for.body24 ], [ %add.ptr9, %for.body24.preheader ]819  %ip_c2.0118 = phi ptr [ %add.ptr29, %for.body24 ], [ %add.ptr12, %for.body24.preheader ]820  %i_row_loop.1117 = phi i32 [ %inc, %for.body24 ], [ %i_row_loop.0128, %for.body24.preheader ]821  %ip_c3.0116 = phi ptr [ %add.ptr30, %for.body24 ], [ %add.ptr15, %for.body24.preheader ]822  %acc_3.0115 = phi i32 [ %24, %for.body24 ], [ %0, %for.body24.preheader ]823  %acc_2.0114 = phi i32 [ %23, %for.body24 ], [ %0, %for.body24.preheader ]824  %acc_1.0113 = phi i32 [ %22, %for.body24 ], [ %0, %for.body24.preheader ]825  %acc_0.0112 = phi i32 [ %21, %for.body24 ], [ %0, %for.body24.preheader ]826  %1 = tail call <8 x i1> @llvm.arm.mve.vctp16(i32 %row_len_tmp.0122)827  %sub = add nsw i32 %row_len_tmp.0122, -8828  %2 = bitcast ptr %ip_r0.0121 to ptr829  %3 = tail call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %2, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)830  %4 = sext <8 x i8> %3 to <8 x i16>831  %add.ptr26 = getelementptr inbounds i8, ptr %ip_r0.0121, i32 8832  %5 = bitcast ptr %ip_c0.0120 to ptr833  %6 = tail call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %5, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)834  %7 = sext <8 x i8> %6 to <8 x i16>835  %add.ptr27 = getelementptr inbounds i8, ptr %ip_c0.0120, i32 8836  %8 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %7, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)837  %9 = bitcast ptr %ip_c1.0119 to ptr838  %10 = tail call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %9, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)839  %11 = sext <8 x i8> %10 to <8 x i16>840  %add.ptr28 = getelementptr inbounds i8, ptr %ip_c1.0119, i32 8841  %12 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %11, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)842  %13 = bitcast ptr %ip_c2.0118 to ptr843  %14 = tail call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %13, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)844  %15 = sext <8 x i8> %14 to <8 x i16>845  %add.ptr29 = getelementptr inbounds i8, ptr %ip_c2.0118, i32 8846  %16 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %15, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)847  %17 = bitcast ptr %ip_c3.0116 to ptr848  %18 = tail call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %17, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)849  %19 = sext <8 x i8> %18 to <8 x i16>850  %add.ptr30 = getelementptr inbounds i8, ptr %ip_c3.0116, i32 8851  %20 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %19, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)852  %21 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_0.0112, <8 x i16> %4, <8 x i16> %8, <8 x i1> %1)853  %22 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_1.0113, <8 x i16> %4, <8 x i16> %12, <8 x i1> %1)854  %23 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_2.0114, <8 x i16> %4, <8 x i16> %16, <8 x i1> %1)855  %24 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_3.0115, <8 x i16> %4, <8 x i16> %20, <8 x i1> %1)856  %inc = add nsw i32 %i_row_loop.1117, 1857  %exitcond = icmp eq i32 %inc, %div858  br i1 %exitcond, label %for.cond.cleanup23, label %for.body24859 860if.end:                                           ; preds = %for.cond.cleanup23, %for.cond.preheader, %entry861  ret ptr %out862}863 864define ptr @signext_optsize(ptr %input_row, ptr %input_col, i16 zeroext %output_ch, i16 zeroext %num_cols, ptr nocapture readnone %output_shift, ptr nocapture readnone %output_mult, i32 %out_offset, i32 %col_offset, i32 %row_offset, i16 signext %activation_min, i16 signext %activation_max, i16 zeroext %row_len, ptr nocapture readonly %bias, ptr returned %out) optsize {865; CHECK-LABEL: signext_optsize:866; CHECK:       @ %bb.0: @ %entry867; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}868; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}869; CHECK-NEXT:    .pad #28870; CHECK-NEXT:    sub sp, #28871; CHECK-NEXT:    add.w r12, sp, #12872; CHECK-NEXT:    cmp r3, #4873; CHECK-NEXT:    stm.w r12, {r0, r1, r2} @ 12-byte Folded Spill874; CHECK-NEXT:    bne .LBB6_8875; CHECK-NEXT:  @ %bb.1: @ %for.cond.preheader876; CHECK-NEXT:    ldr r0, [sp, #20] @ 4-byte Reload877; CHECK-NEXT:    cmp r0, #0878; CHECK-NEXT:    beq .LBB6_8879; CHECK-NEXT:  @ %bb.2: @ %for.body.lr.ph880; CHECK-NEXT:    ldr r2, [sp, #92]881; CHECK-NEXT:    mov.w r11, #0882; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload883; CHECK-NEXT:    ldr r4, [sp, #76]884; CHECK-NEXT:    add.w r0, r1, r2, lsl #1885; CHECK-NEXT:    str r0, [sp, #8] @ 4-byte Spill886; CHECK-NEXT:    adds r0, r1, r2887; CHECK-NEXT:    str r0, [sp, #4] @ 4-byte Spill888; CHECK-NEXT:    add.w r0, r2, r2, lsl #1889; CHECK-NEXT:    add r0, r1890; CHECK-NEXT:    str r0, [sp] @ 4-byte Spill891; CHECK-NEXT:    adds r0, r2, #7892; CHECK-NEXT:    lsrs r1, r0, #3893; CHECK-NEXT:  .LBB6_3: @ %for.body894; CHECK-NEXT:    @ =>This Loop Header: Depth=1895; CHECK-NEXT:    @ Child Loop BB6_5 Depth 2896; CHECK-NEXT:    ldr r0, [sp, #96]897; CHECK-NEXT:    cmp r1, r1898; CHECK-NEXT:    str r1, [sp, #24] @ 4-byte Spill899; CHECK-NEXT:    ldr.w r12, [r0, r11, lsl #2]900; CHECK-NEXT:    ble .LBB6_6901; CHECK-NEXT:  @ %bb.4: @ %for.body24.preheader902; CHECK-NEXT:    @ in Loop: Header=BB6_3 Depth=1903; CHECK-NEXT:    ldr.w lr, [sp, #92]904; CHECK-NEXT:    ldr r0, [sp, #12] @ 4-byte Reload905; CHECK-NEXT:    mov r6, r12906; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload907; CHECK-NEXT:    mov r8, r12908; CHECK-NEXT:    mla r3, r11, lr, r0909; CHECK-NEXT:    mov r10, r12910; CHECK-NEXT:    ldm.w sp, {r0, r5, r7} @ 12-byte Folded Reload911; CHECK-NEXT:    dlstp.16 lr, lr912; CHECK-NEXT:  .LBB6_5: @ %for.body24913; CHECK-NEXT:    @ Parent Loop BB6_3 Depth=1914; CHECK-NEXT:    @ => This Inner Loop Header: Depth=2915; CHECK-NEXT:    vldrb.s16 q0, [r0], #8916; CHECK-NEXT:    vadd.i16 q1, q0, r4917; CHECK-NEXT:    vldrb.s16 q0, [r3], #8918; CHECK-NEXT:    vmlava.s16 r12, q0, q1919; CHECK-NEXT:    vldrb.s16 q1, [r7], #8920; CHECK-NEXT:    vadd.i16 q1, q1, r4921; CHECK-NEXT:    vmlava.s16 r6, q0, q1922; CHECK-NEXT:    vldrb.s16 q1, [r5], #8923; CHECK-NEXT:    vadd.i16 q1, q1, r4924; CHECK-NEXT:    vmlava.s16 r8, q0, q1925; CHECK-NEXT:    vldrb.s16 q1, [r1], #8926; CHECK-NEXT:    vadd.i16 q1, q1, r4927; CHECK-NEXT:    vmlava.s16 r10, q0, q1928; CHECK-NEXT:    letp lr, .LBB6_5929; CHECK-NEXT:    b .LBB6_7930; CHECK-NEXT:  .LBB6_6: @ in Loop: Header=BB6_3 Depth=1931; CHECK-NEXT:    mov r10, r12932; CHECK-NEXT:    mov r8, r12933; CHECK-NEXT:    mov r6, r12934; CHECK-NEXT:  .LBB6_7: @ %for.cond.cleanup23935; CHECK-NEXT:    @ in Loop: Header=BB6_3 Depth=1936; CHECK-NEXT:    ldr r1, [sp, #100]937; CHECK-NEXT:    add.w r0, r8, r10938; CHECK-NEXT:    add r0, r6939; CHECK-NEXT:    add r0, r12940; CHECK-NEXT:    strb.w r0, [r1, r11]941; CHECK-NEXT:    add.w r11, r11, #1942; CHECK-NEXT:    ldr r1, [sp, #24] @ 4-byte Reload943; CHECK-NEXT:    ldr r0, [sp, #20] @ 4-byte Reload944; CHECK-NEXT:    cmp r11, r0945; CHECK-NEXT:    bne .LBB6_3946; CHECK-NEXT:  .LBB6_8: @ %if.end947; CHECK-NEXT:    ldr r0, [sp, #100]948; CHECK-NEXT:    add sp, #28949; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}950entry:951  %cmp = icmp eq i16 %num_cols, 4952  br i1 %cmp, label %for.cond.preheader, label %if.end953 954for.cond.preheader:                               ; preds = %entry955  %conv2 = zext i16 %output_ch to i32956  %cmp3127 = icmp eq i16 %output_ch, 0957  br i1 %cmp3127, label %if.end, label %for.body.lr.ph958 959for.body.lr.ph:                                   ; preds = %for.cond.preheader960  %conv5 = zext i16 %row_len to i32961  %add.ptr9 = getelementptr inbounds i8, ptr %input_col, i32 %conv5962  %mul11 = shl nuw nsw i32 %conv5, 1963  %add.ptr12 = getelementptr inbounds i8, ptr %input_col, i32 %mul11964  %mul14 = mul nuw nsw i32 %conv5, 3965  %add.ptr15 = getelementptr inbounds i8, ptr %input_col, i32 %mul14966  %add = add nuw nsw i32 %conv5, 7967  %div = lshr i32 %add, 3968  %conv25 = trunc i32 %col_offset to i16969  %.splatinsert.i = insertelement <8 x i16> undef, i16 %conv25, i32 0970  %.splat.i = shufflevector <8 x i16> %.splatinsert.i, <8 x i16> undef, <8 x i32> zeroinitializer971  br label %for.body972 973for.body:                                         ; preds = %for.cond.cleanup23, %for.body.lr.ph974  %i_out_ch.0129 = phi i32 [ 0, %for.body.lr.ph ], [ %inc37, %for.cond.cleanup23 ]975  %i_row_loop.0128 = phi i32 [ undef, %for.body.lr.ph ], [ %i_row_loop.1.lcssa, %for.cond.cleanup23 ]976  %arrayidx = getelementptr inbounds i32, ptr %bias, i32 %i_out_ch.0129977  %0 = load i32, ptr %arrayidx, align 4978  %cmp21111 = icmp slt i32 %i_row_loop.0128, %div979  br i1 %cmp21111, label %for.body24.preheader, label %for.cond.cleanup23980 981for.body24.preheader:                             ; preds = %for.body982  %mul = mul nuw nsw i32 %i_out_ch.0129, %conv5983  %add.ptr = getelementptr inbounds i8, ptr %input_row, i32 %mul984  br label %for.body24985 986for.cond.cleanup23:                               ; preds = %for.body24, %for.body987  %acc_0.0.lcssa = phi i32 [ %0, %for.body ], [ %21, %for.body24 ]988  %acc_1.0.lcssa = phi i32 [ %0, %for.body ], [ %22, %for.body24 ]989  %acc_2.0.lcssa = phi i32 [ %0, %for.body ], [ %23, %for.body24 ]990  %acc_3.0.lcssa = phi i32 [ %0, %for.body ], [ %24, %for.body24 ]991  %i_row_loop.1.lcssa = phi i32 [ %i_row_loop.0128, %for.body ], [ %div, %for.body24 ]992  %add31 = add nsw i32 %acc_1.0.lcssa, %acc_0.0.lcssa993  %add32 = add nsw i32 %add31, %acc_2.0.lcssa994  %add33 = add nsw i32 %add32, %acc_3.0.lcssa995  %conv34 = trunc i32 %add33 to i8996  %arrayidx35 = getelementptr inbounds i8, ptr %out, i32 %i_out_ch.0129997  store i8 %conv34, ptr %arrayidx35, align 1998  %inc37 = add nuw nsw i32 %i_out_ch.0129, 1999  %exitcond133 = icmp eq i32 %inc37, %conv21000  br i1 %exitcond133, label %if.end, label %for.body1001 1002for.body24:                                       ; preds = %for.body24, %for.body24.preheader1003  %row_len_tmp.0122 = phi i32 [ %sub, %for.body24 ], [ %conv5, %for.body24.preheader ]1004  %ip_r0.0121 = phi ptr [ %add.ptr26, %for.body24 ], [ %add.ptr, %for.body24.preheader ]1005  %ip_c0.0120 = phi ptr [ %add.ptr27, %for.body24 ], [ %input_col, %for.body24.preheader ]1006  %ip_c1.0119 = phi ptr [ %add.ptr28, %for.body24 ], [ %add.ptr9, %for.body24.preheader ]1007  %ip_c2.0118 = phi ptr [ %add.ptr29, %for.body24 ], [ %add.ptr12, %for.body24.preheader ]1008  %i_row_loop.1117 = phi i32 [ %inc, %for.body24 ], [ %i_row_loop.0128, %for.body24.preheader ]1009  %ip_c3.0116 = phi ptr [ %add.ptr30, %for.body24 ], [ %add.ptr15, %for.body24.preheader ]1010  %acc_3.0115 = phi i32 [ %24, %for.body24 ], [ %0, %for.body24.preheader ]1011  %acc_2.0114 = phi i32 [ %23, %for.body24 ], [ %0, %for.body24.preheader ]1012  %acc_1.0113 = phi i32 [ %22, %for.body24 ], [ %0, %for.body24.preheader ]1013  %acc_0.0112 = phi i32 [ %21, %for.body24 ], [ %0, %for.body24.preheader ]1014  %1 = tail call <8 x i1> @llvm.arm.mve.vctp16(i32 %row_len_tmp.0122)1015  %sub = add nsw i32 %row_len_tmp.0122, -81016  %2 = bitcast ptr %ip_r0.0121 to ptr1017  %3 = tail call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %2, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)1018  %4 = sext <8 x i8> %3 to <8 x i16>1019  %add.ptr26 = getelementptr inbounds i8, ptr %ip_r0.0121, i32 81020  %5 = bitcast ptr %ip_c0.0120 to ptr1021  %6 = tail call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %5, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)1022  %7 = sext <8 x i8> %6 to <8 x i16>1023  %add.ptr27 = getelementptr inbounds i8, ptr %ip_c0.0120, i32 81024  %8 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %7, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)1025  %9 = bitcast ptr %ip_c1.0119 to ptr1026  %10 = tail call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %9, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)1027  %11 = sext <8 x i8> %10 to <8 x i16>1028  %add.ptr28 = getelementptr inbounds i8, ptr %ip_c1.0119, i32 81029  %12 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %11, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)1030  %13 = bitcast ptr %ip_c2.0118 to ptr1031  %14 = tail call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %13, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)1032  %15 = sext <8 x i8> %14 to <8 x i16>1033  %add.ptr29 = getelementptr inbounds i8, ptr %ip_c2.0118, i32 81034  %16 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %15, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)1035  %17 = bitcast ptr %ip_c3.0116 to ptr1036  %18 = tail call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %17, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)1037  %19 = sext <8 x i8> %18 to <8 x i16>1038  %add.ptr30 = getelementptr inbounds i8, ptr %ip_c3.0116, i32 81039  %20 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %19, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)1040  %21 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_0.0112, <8 x i16> %4, <8 x i16> %8, <8 x i1> %1)1041  %22 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_1.0113, <8 x i16> %4, <8 x i16> %12, <8 x i1> %1)1042  %23 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_2.0114, <8 x i16> %4, <8 x i16> %16, <8 x i1> %1)1043  %24 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_3.0115, <8 x i16> %4, <8 x i16> %20, <8 x i1> %1)1044  %inc = add nsw i32 %i_row_loop.1117, 11045  %exitcond = icmp eq i32 %inc, %div1046  br i1 %exitcond, label %for.cond.cleanup23, label %for.body241047 1048if.end:                                           ; preds = %for.cond.cleanup23, %for.cond.preheader, %entry1049  ret ptr %out1050}1051 1052%struct.arm_cfft_instance_f32 = type { i16, ptr, ptr, i16, ptr, ptr, ptr, ptr, ptr, ptr }1053define arm_aapcs_vfpcc void @_Z37_arm_radix4_butterfly_inverse_f32_mvePK21arm_cfft_instance_f32Pfjf(ptr nocapture readonly %0, ptr %1, i32 %2, float %3) {1054; CHECK-LABEL: _Z37_arm_radix4_butterfly_inverse_f32_mvePK21arm_cfft_instance_f32Pfjf:1055; CHECK:       @ %bb.0:1056; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}1057; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}1058; CHECK-NEXT:    .pad #41059; CHECK-NEXT:    sub sp, #41060; CHECK-NEXT:    .vsave {d8, d9, d10, d11, d12, d13, d14, d15}1061; CHECK-NEXT:    vpush {d8, d9, d10, d11, d12, d13, d14, d15}1062; CHECK-NEXT:    .pad #401063; CHECK-NEXT:    sub sp, #401064; CHECK-NEXT:    cmp r2, #81065; CHECK-NEXT:    vstr s0, [sp] @ 4-byte Spill1066; CHECK-NEXT:    str r1, [sp, #16] @ 4-byte Spill1067; CHECK-NEXT:    str r2, [sp, #4] @ 4-byte Spill1068; CHECK-NEXT:    blo .LBB7_91069; CHECK-NEXT:  @ %bb.1:1070; CHECK-NEXT:    ldr r2, [sp, #4] @ 4-byte Reload1071; CHECK-NEXT:    mov.w r11, #01072; CHECK-NEXT:    mov.w r12, #11073; CHECK-NEXT:    str r2, [sp, #12] @ 4-byte Spill1074; CHECK-NEXT:    lsrs r1, r2, #21075; CHECK-NEXT:    b .LBB7_31076; CHECK-NEXT:  .LBB7_2: @ in Loop: Header=BB7_3 Depth=11077; CHECK-NEXT:    ldr r2, [sp, #8] @ 4-byte Reload1078; CHECK-NEXT:    add.w r11, r11, #11079; CHECK-NEXT:    lsl.w r12, r12, #21080; CHECK-NEXT:    cmp r2, #71081; CHECK-NEXT:    asr.w r1, r2, #21082; CHECK-NEXT:    ble .LBB7_91083; CHECK-NEXT:  .LBB7_3: @ =>This Loop Header: Depth=11084; CHECK-NEXT:    @ Child Loop BB7_6 Depth 21085; CHECK-NEXT:    @ Child Loop BB7_7 Depth 31086; CHECK-NEXT:    str r1, [sp, #8] @ 4-byte Spill1087; CHECK-NEXT:    cmp.w r12, #11088; CHECK-NEXT:    ldr r1, [sp, #12] @ 4-byte Reload1089; CHECK-NEXT:    lsr.w r2, r1, #21090; CHECK-NEXT:    str r2, [sp, #12] @ 4-byte Spill1091; CHECK-NEXT:    blt .LBB7_21092; CHECK-NEXT:  @ %bb.4: @ in Loop: Header=BB7_3 Depth=11093; CHECK-NEXT:    lsrs r2, r1, #31094; CHECK-NEXT:    str r2, [sp, #24] @ 4-byte Spill1095; CHECK-NEXT:    beq .LBB7_21096; CHECK-NEXT:  @ %bb.5: @ %.preheader1097; CHECK-NEXT:    @ in Loop: Header=BB7_3 Depth=11098; CHECK-NEXT:    ldr r2, [sp, #12] @ 4-byte Reload1099; CHECK-NEXT:    lsls r1, r1, #11100; CHECK-NEXT:    movs r4, #01101; CHECK-NEXT:    str r1, [sp, #20] @ 4-byte Spill1102; CHECK-NEXT:    lsl.w r10, r2, #11103; CHECK-NEXT:  .LBB7_6: @ Parent Loop BB7_3 Depth=11104; CHECK-NEXT:    @ => This Loop Header: Depth=21105; CHECK-NEXT:    @ Child Loop BB7_7 Depth 31106; CHECK-NEXT:    ldr r1, [sp, #20] @ 4-byte Reload1107; CHECK-NEXT:    ldrd lr, r2, [r0, #16]1108; CHECK-NEXT:    ldrd r3, r8, [r0, #24]1109; CHECK-NEXT:    muls r1, r4, r11110; CHECK-NEXT:    ldr.w r2, [r2, r11, lsl #2]1111; CHECK-NEXT:    ldrd r7, r5, [r0, #32]1112; CHECK-NEXT:    ldr.w r3, [r3, r11, lsl #2]1113; CHECK-NEXT:    ldr.w r6, [lr, r11, lsl #2]1114; CHECK-NEXT:    add.w r7, r7, r2, lsl #21115; CHECK-NEXT:    ldr r2, [sp, #16] @ 4-byte Reload1116; CHECK-NEXT:    add.w r5, r5, r3, lsl #21117; CHECK-NEXT:    add.w r1, r2, r1, lsl #21118; CHECK-NEXT:    add.w r3, r8, r6, lsl #21119; CHECK-NEXT:    ldr r6, [sp, #24] @ 4-byte Reload1120; CHECK-NEXT:    add.w r2, r1, r10, lsl #21121; CHECK-NEXT:    add.w r8, r2, r10, lsl #21122; CHECK-NEXT:    add.w r9, r8, r10, lsl #21123; CHECK-NEXT:    dls lr, r61124; CHECK-NEXT:  .LBB7_7: @ Parent Loop BB7_3 Depth=11125; CHECK-NEXT:    @ Parent Loop BB7_6 Depth=21126; CHECK-NEXT:    @ => This Inner Loop Header: Depth=31127; CHECK-NEXT:    vldrw.u32 q3, [r9]1128; CHECK-NEXT:    vldrw.u32 q4, [r2]1129; CHECK-NEXT:    vldrw.u32 q6, [r8]1130; CHECK-NEXT:    vldrw.u32 q7, [r1]1131; CHECK-NEXT:    vsub.f32 q5, q4, q31132; CHECK-NEXT:    vsub.f32 q0, q7, q61133; CHECK-NEXT:    vcadd.f32 q1, q0, q5, #2701134; CHECK-NEXT:    vcadd.f32 q2, q0, q5, #901135; CHECK-NEXT:    vadd.f32 q0, q4, q31136; CHECK-NEXT:    vadd.f32 q3, q6, q71137; CHECK-NEXT:    vsub.f32 q4, q3, q01138; CHECK-NEXT:    vadd.f32 q0, q3, q01139; CHECK-NEXT:    vstrb.8 q0, [r1], #161140; CHECK-NEXT:    vldrw.u32 q0, [r7], #161141; CHECK-NEXT:    vcmul.f32 q3, q0, q4, #01142; CHECK-NEXT:    vcmla.f32 q3, q0, q4, #901143; CHECK-NEXT:    vstrb.8 q3, [r2], #161144; CHECK-NEXT:    vldrw.u32 q0, [r3], #161145; CHECK-NEXT:    vcmul.f32 q3, q0, q2, #01146; CHECK-NEXT:    vcmla.f32 q3, q0, q2, #901147; CHECK-NEXT:    vstrb.8 q3, [r8], #161148; CHECK-NEXT:    vldrw.u32 q0, [r5], #161149; CHECK-NEXT:    vcmul.f32 q2, q0, q1, #01150; CHECK-NEXT:    vcmla.f32 q2, q0, q1, #901151; CHECK-NEXT:    vstrb.8 q2, [r9], #161152; CHECK-NEXT:    le lr, .LBB7_71153; CHECK-NEXT:  @ %bb.8: @ in Loop: Header=BB7_6 Depth=21154; CHECK-NEXT:    adds r4, #11155; CHECK-NEXT:    cmp r4, r121156; CHECK-NEXT:    bne .LBB7_61157; CHECK-NEXT:    b .LBB7_21158; CHECK-NEXT:  .LBB7_9:1159; CHECK-NEXT:    ldr r0, [sp, #4] @ 4-byte Reload1160; CHECK-NEXT:    lsrs r0, r0, #31161; CHECK-NEXT:    wls lr, r0, .LBB7_121162; CHECK-NEXT:  @ %bb.10:1163; CHECK-NEXT:    adr r0, .LCPI7_01164; CHECK-NEXT:    vldr s0, [sp] @ 4-byte Reload1165; CHECK-NEXT:    vldrw.u32 q1, [r0]1166; CHECK-NEXT:    ldr r0, [sp, #16] @ 4-byte Reload1167; CHECK-NEXT:    vadd.i32 q1, q1, r01168; CHECK-NEXT:    vmov r0, s01169; CHECK-NEXT:    vldrw.u32 q2, [q1, #64]!1170; CHECK-NEXT:    vldrw.u32 q0, [q1, #16]1171; CHECK-NEXT:  .LBB7_11: @ =>This Inner Loop Header: Depth=11172; CHECK-NEXT:    vldrw.u32 q3, [q1, #24]1173; CHECK-NEXT:    vldrw.u32 q4, [q1, #8]1174; CHECK-NEXT:    vsub.f32 q6, q2, q01175; CHECK-NEXT:    vadd.f32 q0, q2, q01176; CHECK-NEXT:    vsub.f32 q5, q4, q31177; CHECK-NEXT:    vadd.f32 q3, q4, q31178; CHECK-NEXT:    vcadd.f32 q7, q6, q5, #2701179; CHECK-NEXT:    vsub.f32 q2, q0, q31180; CHECK-NEXT:    vmul.f32 q7, q7, r01181; CHECK-NEXT:    vadd.f32 q3, q0, q31182; CHECK-NEXT:    vstrw.32 q7, [sp, #24] @ 16-byte Spill1183; CHECK-NEXT:    vcadd.f32 q7, q6, q5, #901184; CHECK-NEXT:    vmul.f32 q4, q2, r01185; CHECK-NEXT:    vldrw.u32 q2, [q1, #64]!1186; CHECK-NEXT:    vmul.f32 q5, q7, r01187; CHECK-NEXT:    vmul.f32 q3, q3, r01188; CHECK-NEXT:    vldrw.u32 q0, [q1, #16]1189; CHECK-NEXT:    vstrw.32 q3, [q1, #-64]1190; CHECK-NEXT:    vstrw.32 q4, [q1, #-56]1191; CHECK-NEXT:    vstrw.32 q5, [q1, #-48]1192; CHECK-NEXT:    vldrw.u32 q3, [sp, #24] @ 16-byte Reload1193; CHECK-NEXT:    vstrw.32 q3, [q1, #-40]1194; CHECK-NEXT:    le lr, .LBB7_111195; CHECK-NEXT:  .LBB7_12:1196; CHECK-NEXT:    add sp, #401197; CHECK-NEXT:    vpop {d8, d9, d10, d11, d12, d13, d14, d15}1198; CHECK-NEXT:    add sp, #41199; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}1200; CHECK-NEXT:    .p2align 41201; CHECK-NEXT:  @ %bb.13:1202; CHECK-NEXT:  .LCPI7_0:1203; CHECK-NEXT:    .long 4294967232 @ 0xffffffc01204; CHECK-NEXT:    .long 4294967236 @ 0xffffffc41205; CHECK-NEXT:    .long 4294967264 @ 0xffffffe01206; CHECK-NEXT:    .long 4294967268 @ 0xffffffe41207  %5 = icmp ugt i32 %2, 71208  br i1 %5, label %6, label %261209 12106: ; preds = %41211  %7 = lshr i32 %2, 21212  %8 = getelementptr inbounds %struct.arm_cfft_instance_f32, ptr %0, i32 0, i32 71213  %9 = getelementptr inbounds %struct.arm_cfft_instance_f32, ptr %0, i32 0, i32 41214  %10 = getelementptr inbounds %struct.arm_cfft_instance_f32, ptr %0, i32 0, i32 81215  %11 = getelementptr inbounds %struct.arm_cfft_instance_f32, ptr %0, i32 0, i32 51216  %12 = getelementptr inbounds %struct.arm_cfft_instance_f32, ptr %0, i32 0, i32 91217  %13 = getelementptr inbounds %struct.arm_cfft_instance_f32, ptr %0, i32 0, i32 61218  br label %141219 122014: ; preds = %6, %401221  %15 = phi i32 [ %2, %6 ], [ %19, %40 ]1222  %16 = phi i32 [ %7, %6 ], [ %43, %40 ]1223  %17 = phi i32 [ 1, %6 ], [ %41, %40 ]1224  %18 = phi i32 [ 0, %6 ], [ %42, %40 ]1225  %19 = lshr i32 %15, 21226  %20 = icmp sgt i32 %17, 01227  br i1 %20, label %21, label %401228 122921: ; preds = %141230  %22 = shl i32 %15, 11231  %23 = shl nuw nsw i32 %19, 11232  %24 = lshr i32 %15, 31233  %25 = icmp eq i32 %24, 01234  br i1 %25, label %40, label %451235 123626: ; preds = %40, %41237  %27 = ptrtoint ptr %1 to i321238  %28 = insertelement <4 x i32> undef, i32 %27, i32 01239  %29 = shufflevector <4 x i32> %28, <4 x i32> undef, <4 x i32> zeroinitializer1240  %30 = add <4 x i32> %29, <i32 -64, i32 -60, i32 -32, i32 -28>1241  %31 = tail call { <4 x float>, <4 x i32> } @llvm.arm.mve.vldr.gather.base.wb.v4f32.v4i32(<4 x i32> %30, i32 64)1242  %32 = extractvalue { <4 x float>, <4 x i32> } %31, 11243  %33 = lshr i32 %2, 31244  %34 = icmp eq i32 %33, 01245  br i1 %34, label %141, label %351246 124735: ; preds = %261248  %36 = tail call <4 x float> @llvm.arm.mve.vldr.gather.base.v4f32.v4i32(<4 x i32> %32, i32 16)1249  %37 = extractvalue { <4 x float>, <4 x i32> } %31, 01250  %38 = insertelement <4 x float> undef, float %3, i32 01251  %39 = shufflevector <4 x float> %38, <4 x float> undef, <4 x i32> zeroinitializer1252  br label %1161253 125440: ; preds = %113, %21, %141255  %41 = shl i32 %17, 21256  %42 = add nuw nsw i32 %18, 11257  %43 = ashr i32 %16, 21258  %44 = icmp sgt i32 %16, 71259  br i1 %44, label %14, label %261260 126145: ; preds = %21, %1131262  %46 = phi i32 [ %114, %113 ], [ 0, %21 ]1263  %47 = load ptr, ptr %8, align 41264  %48 = load ptr, ptr %9, align 41265  %49 = getelementptr inbounds i32, ptr %48, i32 %181266  %50 = load i32, ptr %49, align 41267  %51 = getelementptr inbounds float, ptr %47, i32 %501268  %52 = load ptr, ptr %10, align 41269  %53 = load ptr, ptr %11, align 41270  %54 = getelementptr inbounds i32, ptr %53, i32 %181271  %55 = load i32, ptr %54, align 41272  %56 = getelementptr inbounds float, ptr %52, i32 %551273  %57 = load ptr, ptr %12, align 41274  %58 = load ptr, ptr %13, align 41275  %59 = getelementptr inbounds i32, ptr %58, i32 %181276  %60 = load i32, ptr %59, align 41277  %61 = getelementptr inbounds float, ptr %57, i32 %601278  %62 = mul i32 %22, %461279  %63 = getelementptr inbounds float, ptr %1, i32 %621280  %64 = getelementptr inbounds float, ptr %63, i32 %231281  %65 = getelementptr inbounds float, ptr %64, i32 %231282  %66 = getelementptr inbounds float, ptr %65, i32 %231283  br label %671284 128567: ; preds = %45, %671286  %68 = phi ptr [ %63, %45 ], [ %89, %67 ]1287  %69 = phi ptr [ %65, %45 ], [ %103, %67 ]1288  %70 = phi ptr [ %66, %45 ], [ %110, %67 ]1289  %71 = phi ptr [ %64, %45 ], [ %96, %67 ]1290  %72 = phi ptr [ %61, %45 ], [ %107, %67 ]1291  %73 = phi ptr [ %56, %45 ], [ %93, %67 ]1292  %74 = phi ptr [ %51, %45 ], [ %100, %67 ]1293  %75 = phi i32 [ %24, %45 ], [ %111, %67 ]1294  %76 = bitcast ptr %69 to ptr1295  %77 = bitcast ptr %68 to ptr1296  %78 = load <4 x float>, ptr %76, align 41297  %79 = load <4 x float>, ptr %77, align 41298  %80 = bitcast ptr %71 to ptr1299  %81 = load <4 x float>, ptr %80, align 41300  %82 = bitcast ptr %70 to ptr1301  %83 = load <4 x float>, ptr %82, align 41302  %84 = fadd <4 x float> %78, %791303  %85 = fsub <4 x float> %79, %781304  %86 = fadd <4 x float> %81, %831305  %87 = fsub <4 x float> %81, %831306  %88 = fadd <4 x float> %84, %861307  store <4 x float> %88, ptr %77, align 41308  %89 = getelementptr inbounds float, ptr %68, i32 41309  %90 = fsub <4 x float> %84, %861310  %91 = bitcast ptr %73 to ptr1311  %92 = load <4 x float>, ptr %91, align 41312  %93 = getelementptr inbounds float, ptr %73, i32 41313  %94 = tail call <4 x float> @llvm.arm.mve.vcmulq.v4f32(i32 0, <4 x float> %92, <4 x float> %90)1314  %95 = tail call <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32 1, <4 x float> %94, <4 x float> %92, <4 x float> %90)1315  store <4 x float> %95, ptr %80, align 41316  %96 = getelementptr inbounds float, ptr %71, i32 41317  %97 = tail call <4 x float> @llvm.arm.mve.vcaddq.v4f32(i32 1, i32 0, <4 x float> %85, <4 x float> %87)1318  %98 = bitcast ptr %74 to ptr1319  %99 = load <4 x float>, ptr %98, align 41320  %100 = getelementptr inbounds float, ptr %74, i32 41321  %101 = tail call <4 x float> @llvm.arm.mve.vcmulq.v4f32(i32 0, <4 x float> %99, <4 x float> %97)1322  %102 = tail call <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32 1, <4 x float> %101, <4 x float> %99, <4 x float> %97)1323  store <4 x float> %102, ptr %76, align 41324  %103 = getelementptr inbounds float, ptr %69, i32 41325  %104 = tail call <4 x float> @llvm.arm.mve.vcaddq.v4f32(i32 1, i32 1, <4 x float> %85, <4 x float> %87)1326  %105 = bitcast ptr %72 to ptr1327  %106 = load <4 x float>, ptr %105, align 41328  %107 = getelementptr inbounds float, ptr %72, i32 41329  %108 = tail call <4 x float> @llvm.arm.mve.vcmulq.v4f32(i32 0, <4 x float> %106, <4 x float> %104)1330  %109 = tail call <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32 1, <4 x float> %108, <4 x float> %106, <4 x float> %104)1331  store <4 x float> %109, ptr %82, align 41332  %110 = getelementptr inbounds float, ptr %70, i32 41333  %111 = add nsw i32 %75, -11334  %112 = icmp eq i32 %111, 01335  br i1 %112, label %113, label %671336 1337113: ; preds = %671338  %114 = add nuw nsw i32 %46, 11339  %115 = icmp eq i32 %114, %171340  br i1 %115, label %40, label %451341 1342116: ; preds = %35, %1161343  %117 = phi <4 x i32> [ %32, %35 ], [ %128, %116 ]1344  %118 = phi i32 [ %33, %35 ], [ %139, %116 ]1345  %119 = phi <4 x float> [ %36, %35 ], [ %130, %116 ]1346  %120 = phi <4 x float> [ %37, %35 ], [ %129, %116 ]1347  %121 = fadd <4 x float> %120, %1191348  %122 = fsub <4 x float> %120, %1191349  %123 = tail call <4 x float> @llvm.arm.mve.vldr.gather.base.v4f32.v4i32(<4 x i32> %117, i32 8)1350  %124 = tail call <4 x float> @llvm.arm.mve.vldr.gather.base.v4f32.v4i32(<4 x i32> %117, i32 24)1351  %125 = fadd <4 x float> %123, %1241352  %126 = fsub <4 x float> %123, %1241353  %127 = tail call { <4 x float>, <4 x i32> } @llvm.arm.mve.vldr.gather.base.wb.v4f32.v4i32(<4 x i32> %117, i32 64)1354  %128 = extractvalue { <4 x float>, <4 x i32> } %127, 11355  %129 = extractvalue { <4 x float>, <4 x i32> } %127, 01356  %130 = tail call <4 x float> @llvm.arm.mve.vldr.gather.base.v4f32.v4i32(<4 x i32> %128, i32 16)1357  %131 = fadd <4 x float> %121, %1251358  %132 = fmul <4 x float> %39, %1311359  tail call void @llvm.arm.mve.vstr.scatter.base.v4i32.v4f32(<4 x i32> %128, i32 -64, <4 x float> %132)1360  %133 = fsub <4 x float> %121, %1251361  %134 = fmul <4 x float> %39, %1331362  tail call void @llvm.arm.mve.vstr.scatter.base.v4i32.v4f32(<4 x i32> %128, i32 -56, <4 x float> %134)1363  %135 = tail call <4 x float> @llvm.arm.mve.vcaddq.v4f32(i32 1, i32 0, <4 x float> %122, <4 x float> %126)1364  %136 = fmul <4 x float> %39, %1351365  tail call void @llvm.arm.mve.vstr.scatter.base.v4i32.v4f32(<4 x i32> %128, i32 -48, <4 x float> %136)1366  %137 = tail call <4 x float> @llvm.arm.mve.vcaddq.v4f32(i32 1, i32 1, <4 x float> %122, <4 x float> %126)1367  %138 = fmul <4 x float> %39, %1371368  tail call void @llvm.arm.mve.vstr.scatter.base.v4i32.v4f32(<4 x i32> %128, i32 -40, <4 x float> %138)1369  %139 = add nsw i32 %118, -11370  %140 = icmp eq i32 %139, 01371  br i1 %140, label %141, label %1161372 1373141: ; preds = %116, %261374  ret void1375}1376 1377declare <16 x i1> @llvm.arm.mve.vctp8(i32)1378declare <8 x i1> @llvm.arm.mve.vctp16(i32)1379declare i32 @llvm.arm.mve.pred.v2i.v16i1(<16 x i1>)1380declare <4 x float> @llvm.masked.load.v4f32.p0(ptr, i32 immarg, <4 x i1>, <4 x float>)1381declare <8 x i8> @llvm.masked.load.v8i8.p0(ptr, i32, <8 x i1>, <8 x i8>)1382declare <16 x i8> @llvm.masked.load.v16i8.p0(ptr, i32 immarg, <16 x i1>, <16 x i8>)1383declare void @llvm.masked.store.v4f32.p0(<4 x float>, ptr, i32 immarg, <4 x i1>)1384declare i32 @llvm.vector.reduce.add.v16i8(<16 x i32> %ext4)1385declare i32 @llvm.arm.mve.vmldava.v8i16(i32, i32, i32, i32, <8 x i16>, <8 x i16>)1386declare i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32, i32, i32, i32, <16 x i8>, <16 x i8>, <16 x i1>)1387declare i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32, i32, i32, i32, <8 x i16>, <8 x i16>, <8 x i1>)1388declare <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, <8 x i1>, <8 x i16>)1389 1390declare <4 x float> @llvm.arm.mve.vcmulq.v4f32(i32, <4 x float>, <4 x float>)1391declare <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32, <4 x float>, <4 x float>, <4 x float>)1392declare <4 x float> @llvm.arm.mve.vcaddq.v4f32(i32, i32, <4 x float>, <4 x float>)1393declare { <4 x float>, <4 x i32> } @llvm.arm.mve.vldr.gather.base.wb.v4f32.v4i32(<4 x i32>, i32)1394declare <4 x float> @llvm.arm.mve.vldr.gather.base.v4f32.v4i32(<4 x i32>, i32)1395declare void @llvm.arm.mve.vstr.scatter.base.v4i32.v4f32(<4 x i32>, i32, <4 x float>)1396