839 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s3 4define <2 x i64> @shuffle1_v2i64(<2 x i64> %src, <2 x i64> %a, <2 x i64> %b) {5; CHECK-LABEL: shuffle1_v2i64:6; CHECK: @ %bb.0: @ %entry7; CHECK-NEXT: orrs r2, r38; CHECK-NEXT: mov.w r3, #09; CHECK-NEXT: csetm r2, eq10; CHECK-NEXT: orrs r0, r111; CHECK-NEXT: bfi r3, r2, #0, #812; CHECK-NEXT: csetm r0, eq13; CHECK-NEXT: bfi r3, r0, #8, #814; CHECK-NEXT: add r0, sp, #1615; CHECK-NEXT: vldrw.u32 q0, [r0]16; CHECK-NEXT: mov r0, sp17; CHECK-NEXT: vldrw.u32 q1, [r0]18; CHECK-NEXT: vmsr p0, r319; CHECK-NEXT: vpsel q0, q1, q020; CHECK-NEXT: vmov r0, r1, d021; CHECK-NEXT: vmov r2, r3, d122; CHECK-NEXT: bx lr23entry:24 %c = icmp eq <2 x i64> %src, zeroinitializer25 %sh = shufflevector <2 x i1> %c, <2 x i1> undef, <2 x i32> <i32 1, i32 0>26 %s = select <2 x i1> %sh, <2 x i64> %a, <2 x i64> %b27 ret <2 x i64> %s28}29 30define <4 x i32> @shuffle1_v4i32(<4 x i32> %src, <4 x i32> %a, <4 x i32> %b) {31; CHECK-LABEL: shuffle1_v4i32:32; CHECK: @ %bb.0: @ %entry33; CHECK-NEXT: vmov d1, r2, r334; CHECK-NEXT: vmov d0, r0, r135; CHECK-NEXT: vcmp.i32 eq, q0, zr36; CHECK-NEXT: vmrs r0, p037; CHECK-NEXT: rbit r0, r038; CHECK-NEXT: lsrs r0, r0, #1639; CHECK-NEXT: vmsr p0, r040; CHECK-NEXT: add r0, sp, #1641; CHECK-NEXT: vldrw.u32 q0, [r0]42; CHECK-NEXT: mov r0, sp43; CHECK-NEXT: vldrw.u32 q1, [r0]44; CHECK-NEXT: vpsel q0, q1, q045; CHECK-NEXT: vmov r0, r1, d046; CHECK-NEXT: vmov r2, r3, d147; CHECK-NEXT: bx lr48entry:49 %c = icmp eq <4 x i32> %src, zeroinitializer50 %sh = shufflevector <4 x i1> %c, <4 x i1> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>51 %s = select <4 x i1> %sh, <4 x i32> %a, <4 x i32> %b52 ret <4 x i32> %s53}54 55define <8 x i16> @shuffle1_v8i16(<8 x i16> %src, <8 x i16> %a, <8 x i16> %b) {56; CHECK-LABEL: shuffle1_v8i16:57; CHECK: @ %bb.0: @ %entry58; CHECK-NEXT: vmov d1, r2, r359; CHECK-NEXT: vmov d0, r0, r160; CHECK-NEXT: vcmp.i16 eq, q0, zr61; CHECK-NEXT: vmrs r0, p062; CHECK-NEXT: rbit r0, r063; CHECK-NEXT: lsrs r0, r0, #1664; CHECK-NEXT: vmsr p0, r065; CHECK-NEXT: add r0, sp, #1666; CHECK-NEXT: vldrw.u32 q0, [r0]67; CHECK-NEXT: mov r0, sp68; CHECK-NEXT: vldrw.u32 q1, [r0]69; CHECK-NEXT: vpsel q0, q1, q070; CHECK-NEXT: vmov r0, r1, d071; CHECK-NEXT: vmov r2, r3, d172; CHECK-NEXT: bx lr73entry:74 %c = icmp eq <8 x i16> %src, zeroinitializer75 %sh = shufflevector <8 x i1> %c, <8 x i1> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>76 %s = select <8 x i1> %sh, <8 x i16> %a, <8 x i16> %b77 ret <8 x i16> %s78}79 80define <16 x i8> @shuffle1_v16i8(<16 x i8> %src, <16 x i8> %a, <16 x i8> %b) {81; CHECK-LABEL: shuffle1_v16i8:82; CHECK: @ %bb.0: @ %entry83; CHECK-NEXT: vmov d1, r2, r384; CHECK-NEXT: vmov d0, r0, r185; CHECK-NEXT: vcmp.i8 eq, q0, zr86; CHECK-NEXT: vmrs r0, p087; CHECK-NEXT: rbit r0, r088; CHECK-NEXT: lsrs r0, r0, #1689; CHECK-NEXT: vmsr p0, r090; CHECK-NEXT: add r0, sp, #1691; CHECK-NEXT: vldrw.u32 q0, [r0]92; CHECK-NEXT: mov r0, sp93; CHECK-NEXT: vldrw.u32 q1, [r0]94; CHECK-NEXT: vpsel q0, q1, q095; CHECK-NEXT: vmov r0, r1, d096; CHECK-NEXT: vmov r2, r3, d197; CHECK-NEXT: bx lr98entry:99 %c = icmp eq <16 x i8> %src, zeroinitializer100 %sh = shufflevector <16 x i1> %c, <16 x i1> undef, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>101 %s = select <16 x i1> %sh, <16 x i8> %a, <16 x i8> %b102 ret <16 x i8> %s103}104 105define <2 x i64> @shuffle2_v2i64(<2 x i64> %src, <2 x i64> %a, <2 x i64> %b) {106; CHECK-LABEL: shuffle2_v2i64:107; CHECK: @ %bb.0: @ %entry108; CHECK-NEXT: orrs r0, r1109; CHECK-NEXT: mov.w r1, #0110; CHECK-NEXT: csetm r0, eq111; CHECK-NEXT: bfi r1, r0, #0, #8112; CHECK-NEXT: orrs.w r0, r2, r3113; CHECK-NEXT: csetm r0, eq114; CHECK-NEXT: bfi r1, r0, #8, #8115; CHECK-NEXT: add r0, sp, #16116; CHECK-NEXT: vldrw.u32 q0, [r0]117; CHECK-NEXT: mov r0, sp118; CHECK-NEXT: vldrw.u32 q1, [r0]119; CHECK-NEXT: vmsr p0, r1120; CHECK-NEXT: vpsel q0, q1, q0121; CHECK-NEXT: vmov r0, r1, d0122; CHECK-NEXT: vmov r2, r3, d1123; CHECK-NEXT: bx lr124entry:125 %c = icmp eq <2 x i64> %src, zeroinitializer126 %sh = shufflevector <2 x i1> %c, <2 x i1> undef, <2 x i32> <i32 0, i32 1>127 %s = select <2 x i1> %sh, <2 x i64> %a, <2 x i64> %b128 ret <2 x i64> %s129}130 131define <4 x i32> @shuffle2_v4i32(<4 x i32> %src, <4 x i32> %a, <4 x i32> %b) {132; CHECK-LABEL: shuffle2_v4i32:133; CHECK: @ %bb.0: @ %entry134; CHECK-NEXT: vmov d0, r0, r1135; CHECK-NEXT: add r0, sp, #16136; CHECK-NEXT: vmov d1, r2, r3137; CHECK-NEXT: vcmp.i32 eq, q0, zr138; CHECK-NEXT: vldrw.u32 q0, [r0]139; CHECK-NEXT: mov r0, sp140; CHECK-NEXT: vldrw.u32 q1, [r0]141; CHECK-NEXT: vpsel q0, q1, q0142; CHECK-NEXT: vmov r0, r1, d0143; CHECK-NEXT: vmov r2, r3, d1144; CHECK-NEXT: bx lr145entry:146 %c = icmp eq <4 x i32> %src, zeroinitializer147 %sh = shufflevector <4 x i1> %c, <4 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>148 %s = select <4 x i1> %sh, <4 x i32> %a, <4 x i32> %b149 ret <4 x i32> %s150}151 152define <8 x i16> @shuffle2_v8i16(<8 x i16> %src, <8 x i16> %a, <8 x i16> %b) {153; CHECK-LABEL: shuffle2_v8i16:154; CHECK: @ %bb.0: @ %entry155; CHECK-NEXT: vmov d0, r0, r1156; CHECK-NEXT: add r0, sp, #16157; CHECK-NEXT: vmov d1, r2, r3158; CHECK-NEXT: vcmp.i16 eq, q0, zr159; CHECK-NEXT: vldrw.u32 q0, [r0]160; CHECK-NEXT: mov r0, sp161; CHECK-NEXT: vldrw.u32 q1, [r0]162; CHECK-NEXT: vpsel q0, q1, q0163; CHECK-NEXT: vmov r0, r1, d0164; CHECK-NEXT: vmov r2, r3, d1165; CHECK-NEXT: bx lr166entry:167 %c = icmp eq <8 x i16> %src, zeroinitializer168 %sh = shufflevector <8 x i1> %c, <8 x i1> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>169 %s = select <8 x i1> %sh, <8 x i16> %a, <8 x i16> %b170 ret <8 x i16> %s171}172 173define <16 x i8> @shuffle2_v16i8(<16 x i8> %src, <16 x i8> %a, <16 x i8> %b) {174; CHECK-LABEL: shuffle2_v16i8:175; CHECK: @ %bb.0: @ %entry176; CHECK-NEXT: vmov d0, r0, r1177; CHECK-NEXT: add r0, sp, #16178; CHECK-NEXT: vmov d1, r2, r3179; CHECK-NEXT: vcmp.i8 eq, q0, zr180; CHECK-NEXT: vldrw.u32 q0, [r0]181; CHECK-NEXT: mov r0, sp182; CHECK-NEXT: vldrw.u32 q1, [r0]183; CHECK-NEXT: vpsel q0, q1, q0184; CHECK-NEXT: vmov r0, r1, d0185; CHECK-NEXT: vmov r2, r3, d1186; CHECK-NEXT: bx lr187entry:188 %c = icmp eq <16 x i8> %src, zeroinitializer189 %sh = shufflevector <16 x i1> %c, <16 x i1> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>190 %s = select <16 x i1> %sh, <16 x i8> %a, <16 x i8> %b191 ret <16 x i8> %s192}193 194define <2 x i64> @shuffle3_v2i64(<2 x i64> %src, <2 x i64> %a, <2 x i64> %b) {195; CHECK-LABEL: shuffle3_v2i64:196; CHECK: @ %bb.0: @ %entry197; CHECK-NEXT: orrs r0, r1198; CHECK-NEXT: csetm r0, eq199; CHECK-NEXT: vmsr p0, r0200; CHECK-NEXT: add r0, sp, #16201; CHECK-NEXT: vldrw.u32 q0, [r0]202; CHECK-NEXT: mov r0, sp203; CHECK-NEXT: vldrw.u32 q1, [r0]204; CHECK-NEXT: vpsel q0, q1, q0205; CHECK-NEXT: vmov r0, r1, d0206; CHECK-NEXT: vmov r2, r3, d1207; CHECK-NEXT: bx lr208entry:209 %c = icmp eq <2 x i64> %src, zeroinitializer210 %sh = shufflevector <2 x i1> %c, <2 x i1> undef, <2 x i32> <i32 0, i32 0>211 %s = select <2 x i1> %sh, <2 x i64> %a, <2 x i64> %b212 ret <2 x i64> %s213}214 215define <4 x i32> @shuffle3_v4i32(<4 x i32> %src, <4 x i32> %a, <4 x i32> %b) {216; CHECK-LABEL: shuffle3_v4i32:217; CHECK: @ %bb.0: @ %entry218; CHECK-NEXT: vmov d1, r2, r3219; CHECK-NEXT: vmov.i8 q1, #0xff220; CHECK-NEXT: vmov d0, r0, r1221; CHECK-NEXT: vcmp.i32 eq, q0, zr222; CHECK-NEXT: vmov.i8 q0, #0x0223; CHECK-NEXT: vpsel q0, q1, q0224; CHECK-NEXT: vmov r0, s0225; CHECK-NEXT: vdup.32 q0, r0226; CHECK-NEXT: add r0, sp, #16227; CHECK-NEXT: vcmp.i32 ne, q0, zr228; CHECK-NEXT: vldrw.u32 q0, [r0]229; CHECK-NEXT: mov r0, sp230; CHECK-NEXT: vldrw.u32 q1, [r0]231; CHECK-NEXT: vpsel q0, q1, q0232; CHECK-NEXT: vmov r0, r1, d0233; CHECK-NEXT: vmov r2, r3, d1234; CHECK-NEXT: bx lr235entry:236 %c = icmp eq <4 x i32> %src, zeroinitializer237 %sh = shufflevector <4 x i1> %c, <4 x i1> undef, <4 x i32> <i32 0, i32 0, i32 0, i32 0>238 %s = select <4 x i1> %sh, <4 x i32> %a, <4 x i32> %b239 ret <4 x i32> %s240}241 242define <8 x i16> @shuffle3_v8i16(<8 x i16> %src, <8 x i16> %a, <8 x i16> %b) {243; CHECK-LABEL: shuffle3_v8i16:244; CHECK: @ %bb.0: @ %entry245; CHECK-NEXT: vmov d1, r2, r3246; CHECK-NEXT: vmov.i8 q1, #0xff247; CHECK-NEXT: vmov d0, r0, r1248; CHECK-NEXT: vcmp.i16 eq, q0, zr249; CHECK-NEXT: vmov.i8 q0, #0x0250; CHECK-NEXT: vpsel q0, q1, q0251; CHECK-NEXT: vmov.u16 r0, q0[0]252; CHECK-NEXT: vdup.16 q0, r0253; CHECK-NEXT: add r0, sp, #16254; CHECK-NEXT: vcmp.i16 ne, q0, zr255; CHECK-NEXT: vldrw.u32 q0, [r0]256; CHECK-NEXT: mov r0, sp257; CHECK-NEXT: vldrw.u32 q1, [r0]258; CHECK-NEXT: vpsel q0, q1, q0259; CHECK-NEXT: vmov r0, r1, d0260; CHECK-NEXT: vmov r2, r3, d1261; CHECK-NEXT: bx lr262entry:263 %c = icmp eq <8 x i16> %src, zeroinitializer264 %sh = shufflevector <8 x i1> %c, <8 x i1> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>265 %s = select <8 x i1> %sh, <8 x i16> %a, <8 x i16> %b266 ret <8 x i16> %s267}268 269define <16 x i8> @shuffle3_v16i8(<16 x i8> %src, <16 x i8> %a, <16 x i8> %b) {270; CHECK-LABEL: shuffle3_v16i8:271; CHECK: @ %bb.0: @ %entry272; CHECK-NEXT: vmov d1, r2, r3273; CHECK-NEXT: vmov.i8 q1, #0xff274; CHECK-NEXT: vmov d0, r0, r1275; CHECK-NEXT: vcmp.i8 eq, q0, zr276; CHECK-NEXT: vmov.i8 q0, #0x0277; CHECK-NEXT: vpsel q0, q1, q0278; CHECK-NEXT: vmov.u8 r0, q0[0]279; CHECK-NEXT: vdup.8 q0, r0280; CHECK-NEXT: add r0, sp, #16281; CHECK-NEXT: vcmp.i8 ne, q0, zr282; CHECK-NEXT: vldrw.u32 q0, [r0]283; CHECK-NEXT: mov r0, sp284; CHECK-NEXT: vldrw.u32 q1, [r0]285; CHECK-NEXT: vpsel q0, q1, q0286; CHECK-NEXT: vmov r0, r1, d0287; CHECK-NEXT: vmov r2, r3, d1288; CHECK-NEXT: bx lr289entry:290 %c = icmp eq <16 x i8> %src, zeroinitializer291 %sh = shufflevector <16 x i1> %c, <16 x i1> undef, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>292 %s = select <16 x i1> %sh, <16 x i8> %a, <16 x i8> %b293 ret <16 x i8> %s294}295 296define <2 x i64> @shuffle4_v2i64(<2 x i64> %src, <2 x i64> %a, <2 x i64> %b) {297; CHECK-LABEL: shuffle4_v2i64:298; CHECK: @ %bb.0: @ %entry299; CHECK-NEXT: orrs.w r0, r2, r3300; CHECK-NEXT: csetm r0, eq301; CHECK-NEXT: vmsr p0, r0302; CHECK-NEXT: add r0, sp, #16303; CHECK-NEXT: vldrw.u32 q0, [r0]304; CHECK-NEXT: mov r0, sp305; CHECK-NEXT: vldrw.u32 q1, [r0]306; CHECK-NEXT: vpsel q0, q1, q0307; CHECK-NEXT: vmov r0, r1, d0308; CHECK-NEXT: vmov r2, r3, d1309; CHECK-NEXT: bx lr310entry:311 %c = icmp eq <2 x i64> %src, zeroinitializer312 %sh = shufflevector <2 x i1> %c, <2 x i1> undef, <2 x i32> <i32 1, i32 1>313 %s = select <2 x i1> %sh, <2 x i64> %a, <2 x i64> %b314 ret <2 x i64> %s315}316 317define <4 x i32> @shuffle4_v4i32(<4 x i32> %src, <4 x i32> %a, <4 x i32> %b) {318; CHECK-LABEL: shuffle4_v4i32:319; CHECK: @ %bb.0: @ %entry320; CHECK-NEXT: vmov d0, r0, r1321; CHECK-NEXT: vmov.i8 q1, #0xff322; CHECK-NEXT: vmov d1, r2, r3323; CHECK-NEXT: add r0, sp, #16324; CHECK-NEXT: vcmp.i32 eq, q0, zr325; CHECK-NEXT: vmov.i8 q0, #0x0326; CHECK-NEXT: vpsel q0, q1, q0327; CHECK-NEXT: vmov.f32 s4, s0328; CHECK-NEXT: vmov.f32 s5, s0329; CHECK-NEXT: vmov.f32 s6, s0330; CHECK-NEXT: vmov.f32 s7, s1331; CHECK-NEXT: vldrw.u32 q0, [r0]332; CHECK-NEXT: mov r0, sp333; CHECK-NEXT: vcmp.i32 ne, q1, zr334; CHECK-NEXT: vldrw.u32 q1, [r0]335; CHECK-NEXT: vpsel q0, q1, q0336; CHECK-NEXT: vmov r0, r1, d0337; CHECK-NEXT: vmov r2, r3, d1338; CHECK-NEXT: bx lr339entry:340 %c = icmp eq <4 x i32> %src, zeroinitializer341 %sh = shufflevector <4 x i1> %c, <4 x i1> undef, <4 x i32> <i32 0, i32 0, i32 0, i32 1>342 %s = select <4 x i1> %sh, <4 x i32> %a, <4 x i32> %b343 ret <4 x i32> %s344}345 346define <8 x i16> @shuffle4_v8i16(<8 x i16> %src, <8 x i16> %a, <8 x i16> %b) {347; CHECK-LABEL: shuffle4_v8i16:348; CHECK: @ %bb.0: @ %entry349; CHECK-NEXT: vmov d1, r2, r3350; CHECK-NEXT: vmov.i8 q1, #0xff351; CHECK-NEXT: vmov d0, r0, r1352; CHECK-NEXT: vcmp.i16 eq, q0, zr353; CHECK-NEXT: vmov.i8 q0, #0x0354; CHECK-NEXT: vpsel q0, q1, q0355; CHECK-NEXT: vmov.u16 r0, q0[0]356; CHECK-NEXT: vdup.16 q1, r0357; CHECK-NEXT: add r0, sp, #16358; CHECK-NEXT: vmov.f32 s7, s0359; CHECK-NEXT: vldrw.u32 q0, [r0]360; CHECK-NEXT: mov r0, sp361; CHECK-NEXT: vcmp.i16 ne, q1, zr362; CHECK-NEXT: vldrw.u32 q1, [r0]363; CHECK-NEXT: vpsel q0, q1, q0364; CHECK-NEXT: vmov r0, r1, d0365; CHECK-NEXT: vmov r2, r3, d1366; CHECK-NEXT: bx lr367entry:368 %c = icmp eq <8 x i16> %src, zeroinitializer369 %sh = shufflevector <8 x i1> %c, <8 x i1> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1>370 %s = select <8 x i1> %sh, <8 x i16> %a, <8 x i16> %b371 ret <8 x i16> %s372}373 374define <16 x i8> @shuffle4_v16i8(<16 x i8> %src, <16 x i8> %a, <16 x i8> %b) {375; CHECK-LABEL: shuffle4_v16i8:376; CHECK: @ %bb.0: @ %entry377; CHECK-NEXT: vmov d1, r2, r3378; CHECK-NEXT: vmov.i8 q1, #0xff379; CHECK-NEXT: vmov d0, r0, r1380; CHECK-NEXT: vcmp.i8 eq, q0, zr381; CHECK-NEXT: vmov.i8 q0, #0x0382; CHECK-NEXT: vpsel q0, q1, q0383; CHECK-NEXT: vmov.u8 r0, q0[0]384; CHECK-NEXT: vdup.8 q1, r0385; CHECK-NEXT: vmov.u8 r0, q0[1]386; CHECK-NEXT: vmov.8 q1[15], r0387; CHECK-NEXT: add r0, sp, #16388; CHECK-NEXT: vldrw.u32 q0, [r0]389; CHECK-NEXT: mov r0, sp390; CHECK-NEXT: vcmp.i8 ne, q1, zr391; CHECK-NEXT: vldrw.u32 q1, [r0]392; CHECK-NEXT: vpsel q0, q1, q0393; CHECK-NEXT: vmov r0, r1, d0394; CHECK-NEXT: vmov r2, r3, d1395; CHECK-NEXT: bx lr396entry:397 %c = icmp eq <16 x i8> %src, zeroinitializer398 %sh = shufflevector <16 x i1> %c, <16 x i1> undef, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1>399 %s = select <16 x i1> %sh, <16 x i8> %a, <16 x i8> %b400 ret <16 x i8> %s401}402 403define <2 x i64> @shuffle5_b_v2i64(<4 x i32> %src, <2 x i64> %a, <2 x i64> %b) {404; CHECK-LABEL: shuffle5_b_v2i64:405; CHECK: @ %bb.0: @ %entry406; CHECK-NEXT: vmov d1, r2, r3407; CHECK-NEXT: vmov.i8 q1, #0xff408; CHECK-NEXT: vmov d0, r0, r1409; CHECK-NEXT: vcmp.i32 eq, q0, zr410; CHECK-NEXT: vmov.i8 q0, #0x0411; CHECK-NEXT: vpsel q0, q1, q0412; CHECK-NEXT: vmov r0, r1, d0413; CHECK-NEXT: vmov q0[2], q0[0], r0, r1414; CHECK-NEXT: vmov q0[3], q0[1], r0, r1415; CHECK-NEXT: add r0, sp, #16416; CHECK-NEXT: vcmp.i32 ne, q0, zr417; CHECK-NEXT: vldrw.u32 q0, [r0]418; CHECK-NEXT: mov r0, sp419; CHECK-NEXT: vldrw.u32 q1, [r0]420; CHECK-NEXT: vpsel q0, q1, q0421; CHECK-NEXT: vmov r0, r1, d0422; CHECK-NEXT: vmov r2, r3, d1423; CHECK-NEXT: bx lr424entry:425 %c = icmp eq <4 x i32> %src, zeroinitializer426 %sh = shufflevector <4 x i1> %c, <4 x i1> undef, <2 x i32> <i32 0, i32 1>427 %s = select <2 x i1> %sh, <2 x i64> %a, <2 x i64> %b428 ret <2 x i64> %s429}430 431define <2 x i64> @shuffle5_t_v2i64(<4 x i32> %src, <2 x i64> %a, <2 x i64> %b) {432; CHECK-LABEL: shuffle5_t_v2i64:433; CHECK: @ %bb.0: @ %entry434; CHECK-NEXT: vmov d1, r2, r3435; CHECK-NEXT: vmov.i8 q1, #0xff436; CHECK-NEXT: vmov d0, r0, r1437; CHECK-NEXT: vcmp.i32 eq, q0, zr438; CHECK-NEXT: vmov.i8 q0, #0x0439; CHECK-NEXT: vpsel q0, q1, q0440; CHECK-NEXT: vmov r0, r1, d1441; CHECK-NEXT: vmov q0[2], q0[0], r0, r1442; CHECK-NEXT: vmov q0[3], q0[1], r0, r1443; CHECK-NEXT: add r0, sp, #16444; CHECK-NEXT: vcmp.i32 ne, q0, zr445; CHECK-NEXT: vldrw.u32 q0, [r0]446; CHECK-NEXT: mov r0, sp447; CHECK-NEXT: vldrw.u32 q1, [r0]448; CHECK-NEXT: vpsel q0, q1, q0449; CHECK-NEXT: vmov r0, r1, d0450; CHECK-NEXT: vmov r2, r3, d1451; CHECK-NEXT: bx lr452entry:453 %c = icmp eq <4 x i32> %src, zeroinitializer454 %sh = shufflevector <4 x i1> %c, <4 x i1> undef, <2 x i32> <i32 2, i32 3>455 %s = select <2 x i1> %sh, <2 x i64> %a, <2 x i64> %b456 ret <2 x i64> %s457}458 459define <4 x i32> @shuffle5_b_v4i32(<8 x i16> %src, <4 x i32> %a, <4 x i32> %b) {460; CHECK-LABEL: shuffle5_b_v4i32:461; CHECK: @ %bb.0: @ %entry462; CHECK-NEXT: vmov d1, r2, r3463; CHECK-NEXT: vmov.i8 q1, #0xff464; CHECK-NEXT: vmov d0, r0, r1465; CHECK-NEXT: vcmp.i16 eq, q0, zr466; CHECK-NEXT: vmov.i8 q0, #0x0467; CHECK-NEXT: vpsel q0, q1, q0468; CHECK-NEXT: vmov.u16 r0, q0[2]469; CHECK-NEXT: vmov.u16 r1, q0[0]470; CHECK-NEXT: vmov q1[2], q1[0], r1, r0471; CHECK-NEXT: vmov.u16 r0, q0[3]472; CHECK-NEXT: vmov.u16 r1, q0[1]473; CHECK-NEXT: vmov q1[3], q1[1], r1, r0474; CHECK-NEXT: add r0, sp, #16475; CHECK-NEXT: vldrw.u32 q0, [r0]476; CHECK-NEXT: mov r0, sp477; CHECK-NEXT: vcmp.i32 ne, q1, zr478; CHECK-NEXT: vldrw.u32 q1, [r0]479; CHECK-NEXT: vpsel q0, q1, q0480; CHECK-NEXT: vmov r0, r1, d0481; CHECK-NEXT: vmov r2, r3, d1482; CHECK-NEXT: bx lr483entry:484 %c = icmp eq <8 x i16> %src, zeroinitializer485 %sh = shufflevector <8 x i1> %c, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>486 %s = select <4 x i1> %sh, <4 x i32> %a, <4 x i32> %b487 ret <4 x i32> %s488}489 490define <4 x i32> @shuffle5_t_v4i32(<8 x i16> %src, <4 x i32> %a, <4 x i32> %b) {491; CHECK-LABEL: shuffle5_t_v4i32:492; CHECK: @ %bb.0: @ %entry493; CHECK-NEXT: vmov d1, r2, r3494; CHECK-NEXT: vmov.i8 q1, #0xff495; CHECK-NEXT: vmov d0, r0, r1496; CHECK-NEXT: vcmp.i16 eq, q0, zr497; CHECK-NEXT: vmov.i8 q0, #0x0498; CHECK-NEXT: vpsel q0, q1, q0499; CHECK-NEXT: vmov.u16 r0, q0[6]500; CHECK-NEXT: vmov.u16 r1, q0[4]501; CHECK-NEXT: vmov q1[2], q1[0], r1, r0502; CHECK-NEXT: vmov.u16 r0, q0[7]503; CHECK-NEXT: vmov.u16 r1, q0[5]504; CHECK-NEXT: vmov q1[3], q1[1], r1, r0505; CHECK-NEXT: add r0, sp, #16506; CHECK-NEXT: vldrw.u32 q0, [r0]507; CHECK-NEXT: mov r0, sp508; CHECK-NEXT: vcmp.i32 ne, q1, zr509; CHECK-NEXT: vldrw.u32 q1, [r0]510; CHECK-NEXT: vpsel q0, q1, q0511; CHECK-NEXT: vmov r0, r1, d0512; CHECK-NEXT: vmov r2, r3, d1513; CHECK-NEXT: bx lr514entry:515 %c = icmp eq <8 x i16> %src, zeroinitializer516 %sh = shufflevector <8 x i1> %c, <8 x i1> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>517 %s = select <4 x i1> %sh, <4 x i32> %a, <4 x i32> %b518 ret <4 x i32> %s519}520 521define <8 x i16> @shuffle5_b_v8i16(<16 x i8> %src, <8 x i16> %a, <8 x i16> %b) {522; CHECK-LABEL: shuffle5_b_v8i16:523; CHECK: @ %bb.0: @ %entry524; CHECK-NEXT: vmov d1, r2, r3525; CHECK-NEXT: vmov.i8 q1, #0xff526; CHECK-NEXT: vmov d0, r0, r1527; CHECK-NEXT: vcmp.i8 eq, q0, zr528; CHECK-NEXT: vmov.i8 q0, #0x0529; CHECK-NEXT: vpsel q1, q1, q0530; CHECK-NEXT: vmov.u8 r0, q1[0]531; CHECK-NEXT: vmov.16 q0[0], r0532; CHECK-NEXT: vmov.u8 r0, q1[1]533; CHECK-NEXT: vmov.16 q0[1], r0534; CHECK-NEXT: vmov.u8 r0, q1[2]535; CHECK-NEXT: vmov.16 q0[2], r0536; CHECK-NEXT: vmov.u8 r0, q1[3]537; CHECK-NEXT: vmov.16 q0[3], r0538; CHECK-NEXT: vmov.u8 r0, q1[4]539; CHECK-NEXT: vmov.16 q0[4], r0540; CHECK-NEXT: vmov.u8 r0, q1[5]541; CHECK-NEXT: vmov.16 q0[5], r0542; CHECK-NEXT: vmov.u8 r0, q1[6]543; CHECK-NEXT: vmov.16 q0[6], r0544; CHECK-NEXT: vmov.u8 r0, q1[7]545; CHECK-NEXT: vmov.16 q0[7], r0546; CHECK-NEXT: add r0, sp, #16547; CHECK-NEXT: vcmp.i16 ne, q0, zr548; CHECK-NEXT: vldrw.u32 q0, [r0]549; CHECK-NEXT: mov r0, sp550; CHECK-NEXT: vldrw.u32 q1, [r0]551; CHECK-NEXT: vpsel q0, q1, q0552; CHECK-NEXT: vmov r0, r1, d0553; CHECK-NEXT: vmov r2, r3, d1554; CHECK-NEXT: bx lr555entry:556 %c = icmp eq <16 x i8> %src, zeroinitializer557 %sh = shufflevector <16 x i1> %c, <16 x i1> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>558 %s = select <8 x i1> %sh, <8 x i16> %a, <8 x i16> %b559 ret <8 x i16> %s560}561 562define <8 x i16> @shuffle5_t_v8i16(<16 x i8> %src, <8 x i16> %a, <8 x i16> %b) {563; CHECK-LABEL: shuffle5_t_v8i16:564; CHECK: @ %bb.0: @ %entry565; CHECK-NEXT: vmov d1, r2, r3566; CHECK-NEXT: vmov.i8 q1, #0xff567; CHECK-NEXT: vmov d0, r0, r1568; CHECK-NEXT: vcmp.i8 eq, q0, zr569; CHECK-NEXT: vmov.i8 q0, #0x0570; CHECK-NEXT: vpsel q1, q1, q0571; CHECK-NEXT: vmov.u8 r0, q1[8]572; CHECK-NEXT: vmov.16 q0[0], r0573; CHECK-NEXT: vmov.u8 r0, q1[9]574; CHECK-NEXT: vmov.16 q0[1], r0575; CHECK-NEXT: vmov.u8 r0, q1[10]576; CHECK-NEXT: vmov.16 q0[2], r0577; CHECK-NEXT: vmov.u8 r0, q1[11]578; CHECK-NEXT: vmov.16 q0[3], r0579; CHECK-NEXT: vmov.u8 r0, q1[12]580; CHECK-NEXT: vmov.16 q0[4], r0581; CHECK-NEXT: vmov.u8 r0, q1[13]582; CHECK-NEXT: vmov.16 q0[5], r0583; CHECK-NEXT: vmov.u8 r0, q1[14]584; CHECK-NEXT: vmov.16 q0[6], r0585; CHECK-NEXT: vmov.u8 r0, q1[15]586; CHECK-NEXT: vmov.16 q0[7], r0587; CHECK-NEXT: add r0, sp, #16588; CHECK-NEXT: vcmp.i16 ne, q0, zr589; CHECK-NEXT: vldrw.u32 q0, [r0]590; CHECK-NEXT: mov r0, sp591; CHECK-NEXT: vldrw.u32 q1, [r0]592; CHECK-NEXT: vpsel q0, q1, q0593; CHECK-NEXT: vmov r0, r1, d0594; CHECK-NEXT: vmov r2, r3, d1595; CHECK-NEXT: bx lr596entry:597 %c = icmp eq <16 x i8> %src, zeroinitializer598 %sh = shufflevector <16 x i1> %c, <16 x i1> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>599 %s = select <8 x i1> %sh, <8 x i16> %a, <8 x i16> %b600 ret <8 x i16> %s601}602 603define <4 x i32> @shuffle6_v2i64(<2 x i64> %src1, <2 x i64> %src2, <4 x i32> %a, <4 x i32> %b) {604; CHECK-LABEL: shuffle6_v2i64:605; CHECK: @ %bb.0: @ %entry606; CHECK-NEXT: orrs r0, r1607; CHECK-NEXT: mov.w r1, #0608; CHECK-NEXT: csetm r0, eq609; CHECK-NEXT: bfi r1, r0, #0, #4610; CHECK-NEXT: orrs.w r0, r2, r3611; CHECK-NEXT: csetm r0, eq612; CHECK-NEXT: bfi r1, r0, #4, #4613; CHECK-NEXT: mov r0, sp614; CHECK-NEXT: vldrw.u32 q0, [r0]615; CHECK-NEXT: vmov r0, r2, d0616; CHECK-NEXT: orrs r0, r2617; CHECK-NEXT: csetm r0, eq618; CHECK-NEXT: bfi r1, r0, #8, #4619; CHECK-NEXT: vmov r0, r2, d1620; CHECK-NEXT: orrs r0, r2621; CHECK-NEXT: csetm r0, eq622; CHECK-NEXT: bfi r1, r0, #12, #4623; CHECK-NEXT: add r0, sp, #32624; CHECK-NEXT: vldrw.u32 q0, [r0]625; CHECK-NEXT: add r0, sp, #16626; CHECK-NEXT: vldrw.u32 q1, [r0]627; CHECK-NEXT: vmsr p0, r1628; CHECK-NEXT: vpsel q0, q1, q0629; CHECK-NEXT: vmov r0, r1, d0630; CHECK-NEXT: vmov r2, r3, d1631; CHECK-NEXT: bx lr632entry:633 %c1 = icmp eq <2 x i64> %src1, zeroinitializer634 %c2 = icmp eq <2 x i64> %src2, zeroinitializer635 %sh = shufflevector <2 x i1> %c1, <2 x i1> %c2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>636 %s = select <4 x i1> %sh, <4 x i32> %a, <4 x i32> %b637 ret <4 x i32> %s638}639 640define <8 x i16> @shuffle6_v4i32(<4 x i32> %src1, <4 x i32> %src2, <8 x i16> %a, <8 x i16> %b) {641; CHECK-LABEL: shuffle6_v4i32:642; CHECK: @ %bb.0: @ %entry643; CHECK-NEXT: .save {r4, lr}644; CHECK-NEXT: push {r4, lr}645; CHECK-NEXT: .pad #16646; CHECK-NEXT: sub sp, #16647; CHECK-NEXT: add.w r12, sp, #24648; CHECK-NEXT: vmov.i8 q0, #0x0649; CHECK-NEXT: vldrw.u32 q2, [r12]650; CHECK-NEXT: vmov.i8 q1, #0xff651; CHECK-NEXT: mov r4, sp652; CHECK-NEXT: vcmp.i32 eq, q2, zr653; CHECK-NEXT: vpsel q2, q1, q0654; CHECK-NEXT: vstrh.32 q2, [r4, #8]655; CHECK-NEXT: vmov d4, r0, r1656; CHECK-NEXT: vmov d5, r2, r3657; CHECK-NEXT: add r0, sp, #56658; CHECK-NEXT: vcmp.i32 eq, q2, zr659; CHECK-NEXT: vpsel q0, q1, q0660; CHECK-NEXT: vstrh.32 q0, [r4]661; CHECK-NEXT: vldrw.u32 q0, [r0]662; CHECK-NEXT: add r0, sp, #40663; CHECK-NEXT: vldrw.u32 q2, [r4]664; CHECK-NEXT: vldrw.u32 q1, [r0]665; CHECK-NEXT: vcmp.i16 ne, q2, zr666; CHECK-NEXT: vpsel q0, q1, q0667; CHECK-NEXT: vmov r0, r1, d0668; CHECK-NEXT: vmov r2, r3, d1669; CHECK-NEXT: add sp, #16670; CHECK-NEXT: pop {r4, pc}671entry:672 %c1 = icmp eq <4 x i32> %src1, zeroinitializer673 %c2 = icmp eq <4 x i32> %src2, zeroinitializer674 %sh = shufflevector <4 x i1> %c1, <4 x i1> %c2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>675 %s = select <8 x i1> %sh, <8 x i16> %a, <8 x i16> %b676 ret <8 x i16> %s677}678 679define <16 x i8> @shuffle6_v8i16(<8 x i16> %src1, <8 x i16> %src2, <16 x i8> %a, <16 x i8> %b) {680; CHECK-LABEL: shuffle6_v8i16:681; CHECK: @ %bb.0: @ %entry682; CHECK-NEXT: .save {r4, lr}683; CHECK-NEXT: push {r4, lr}684; CHECK-NEXT: .pad #16685; CHECK-NEXT: sub sp, #16686; CHECK-NEXT: add.w r12, sp, #24687; CHECK-NEXT: vmov.i8 q0, #0x0688; CHECK-NEXT: vldrw.u32 q2, [r12]689; CHECK-NEXT: vmov.i8 q1, #0xff690; CHECK-NEXT: mov r4, sp691; CHECK-NEXT: vcmp.i16 eq, q2, zr692; CHECK-NEXT: vpsel q2, q1, q0693; CHECK-NEXT: vstrb.16 q2, [r4, #8]694; CHECK-NEXT: vmov d4, r0, r1695; CHECK-NEXT: vmov d5, r2, r3696; CHECK-NEXT: add r0, sp, #56697; CHECK-NEXT: vcmp.i16 eq, q2, zr698; CHECK-NEXT: vpsel q0, q1, q0699; CHECK-NEXT: vstrb.16 q0, [r4]700; CHECK-NEXT: vldrw.u32 q0, [r0]701; CHECK-NEXT: add r0, sp, #40702; CHECK-NEXT: vldrw.u32 q2, [r4]703; CHECK-NEXT: vldrw.u32 q1, [r0]704; CHECK-NEXT: vcmp.i8 ne, q2, zr705; CHECK-NEXT: vpsel q0, q1, q0706; CHECK-NEXT: vmov r0, r1, d0707; CHECK-NEXT: vmov r2, r3, d1708; CHECK-NEXT: add sp, #16709; CHECK-NEXT: pop {r4, pc}710entry:711 %c1 = icmp eq <8 x i16> %src1, zeroinitializer712 %c2 = icmp eq <8 x i16> %src2, zeroinitializer713 %sh = shufflevector <8 x i1> %c1, <8 x i1> %c2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>714 %s = select <16 x i1> %sh, <16 x i8> %a, <16 x i8> %b715 ret <16 x i8> %s716}717 718define <16 x i8> @shuffle2src_v16i8(<16 x i8> %src1, <16 x i8> %src2, <16 x i8> %a, <16 x i8> %b) {719; CHECK-LABEL: shuffle2src_v16i8:720; CHECK: @ %bb.0: @ %entry721; CHECK-NEXT: mov r12, sp722; CHECK-NEXT: vmov d6, r0, r1723; CHECK-NEXT: vldrw.u32 q2, [r12]724; CHECK-NEXT: vmov.i8 q0, #0x0725; CHECK-NEXT: vmov.i8 q1, #0xff726; CHECK-NEXT: vmov d7, r2, r3727; CHECK-NEXT: vcmp.i8 eq, q2, zr728; CHECK-NEXT: add r0, sp, #32729; CHECK-NEXT: vpsel q2, q1, q0730; CHECK-NEXT: vcmp.i8 eq, q3, zr731; CHECK-NEXT: vpsel q0, q1, q0732; CHECK-NEXT: vmovnt.i16 q2, q0733; CHECK-NEXT: vldrw.u32 q0, [r0]734; CHECK-NEXT: add r0, sp, #16735; CHECK-NEXT: vcmp.i8 ne, q2, zr736; CHECK-NEXT: vldrw.u32 q1, [r0]737; CHECK-NEXT: vpsel q0, q1, q0738; CHECK-NEXT: vmov r0, r1, d0739; CHECK-NEXT: vmov r2, r3, d1740; CHECK-NEXT: bx lr741entry:742 %c1 = icmp eq <16 x i8> %src1, zeroinitializer743 %c2 = icmp eq <16 x i8> %src2, zeroinitializer744 %sh = shufflevector <16 x i1> %c1, <16 x i1> %c2, <16 x i32> <i32 16, i32 0, i32 18, i32 2, i32 20, i32 4, i32 22, i32 6, i32 24, i32 8, i32 26, i32 10, i32 28, i32 12, i32 30, i32 14>745 %s = select <16 x i1> %sh, <16 x i8> %a, <16 x i8> %b746 ret <16 x i8> %s747}748 749define <8 x i16> @shuffle2src_v8i16(<8 x i16> %src1, <8 x i16> %src2, <8 x i16> %a, <8 x i16> %b) {750; CHECK-LABEL: shuffle2src_v8i16:751; CHECK: @ %bb.0: @ %entry752; CHECK-NEXT: mov r12, sp753; CHECK-NEXT: vmov d6, r0, r1754; CHECK-NEXT: vldrw.u32 q2, [r12]755; CHECK-NEXT: vmov.i8 q0, #0x0756; CHECK-NEXT: vmov.i8 q1, #0xff757; CHECK-NEXT: vmov d7, r2, r3758; CHECK-NEXT: vcmp.i16 eq, q2, zr759; CHECK-NEXT: add r0, sp, #32760; CHECK-NEXT: vpsel q2, q1, q0761; CHECK-NEXT: vcmp.i16 eq, q3, zr762; CHECK-NEXT: vpsel q0, q1, q0763; CHECK-NEXT: vmovnt.i32 q2, q0764; CHECK-NEXT: vldrw.u32 q0, [r0]765; CHECK-NEXT: add r0, sp, #16766; CHECK-NEXT: vcmp.i16 ne, q2, zr767; CHECK-NEXT: vldrw.u32 q1, [r0]768; CHECK-NEXT: vpsel q0, q1, q0769; CHECK-NEXT: vmov r0, r1, d0770; CHECK-NEXT: vmov r2, r3, d1771; CHECK-NEXT: bx lr772entry:773 %c1 = icmp eq <8 x i16> %src1, zeroinitializer774 %c2 = icmp eq <8 x i16> %src2, zeroinitializer775 %sh = shufflevector <8 x i1> %c1, <8 x i1> %c2, <8 x i32> <i32 8, i32 0, i32 10, i32 2, i32 12, i32 4, i32 14, i32 6>776 %s = select <8 x i1> %sh, <8 x i16> %a, <8 x i16> %b777 ret <8 x i16> %s778}779 780define <4 x i32> @shuffle2src_v4i32(<4 x i32> %src1, <4 x i32> %src2, <4 x i32> %a, <4 x i32> %b) {781; CHECK-LABEL: shuffle2src_v4i32:782; CHECK: @ %bb.0: @ %entry783; CHECK-NEXT: mov r12, sp784; CHECK-NEXT: vmov d6, r0, r1785; CHECK-NEXT: vldrw.u32 q2, [r12]786; CHECK-NEXT: vmov.i8 q0, #0x0787; CHECK-NEXT: vmov.i8 q1, #0xff788; CHECK-NEXT: vmov d7, r2, r3789; CHECK-NEXT: vcmp.i32 eq, q2, zr790; CHECK-NEXT: add r0, sp, #32791; CHECK-NEXT: vpsel q2, q1, q0792; CHECK-NEXT: vcmp.i32 eq, q3, zr793; CHECK-NEXT: vpsel q0, q1, q0794; CHECK-NEXT: vmov.f32 s9, s0795; CHECK-NEXT: vmov.f32 s11, s2796; CHECK-NEXT: vldrw.u32 q0, [r0]797; CHECK-NEXT: add r0, sp, #16798; CHECK-NEXT: vcmp.i32 ne, q2, zr799; CHECK-NEXT: vldrw.u32 q1, [r0]800; CHECK-NEXT: vpsel q0, q1, q0801; CHECK-NEXT: vmov r0, r1, d0802; CHECK-NEXT: vmov r2, r3, d1803; CHECK-NEXT: bx lr804entry:805 %c1 = icmp eq <4 x i32> %src1, zeroinitializer806 %c2 = icmp eq <4 x i32> %src2, zeroinitializer807 %sh = shufflevector <4 x i1> %c1, <4 x i1> %c2, <4 x i32> <i32 4, i32 0, i32 6, i32 2>808 %s = select <4 x i1> %sh, <4 x i32> %a, <4 x i32> %b809 ret <4 x i32> %s810}811 812define <2 x i64> @shuffle2src_v2i64(<2 x i64> %src1, <2 x i64> %src2, <2 x i64> %a, <2 x i64> %b) {813; CHECK-LABEL: shuffle2src_v2i64:814; CHECK: @ %bb.0: @ %entry815; CHECK-NEXT: ldrd r2, r3, [sp]816; CHECK-NEXT: orrs r2, r3817; CHECK-NEXT: mov.w r3, #0818; CHECK-NEXT: csetm r2, eq819; CHECK-NEXT: orrs r0, r1820; CHECK-NEXT: bfi r3, r2, #0, #8821; CHECK-NEXT: csetm r0, eq822; CHECK-NEXT: bfi r3, r0, #8, #8823; CHECK-NEXT: add r0, sp, #32824; CHECK-NEXT: vldrw.u32 q0, [r0]825; CHECK-NEXT: add r0, sp, #16826; CHECK-NEXT: vldrw.u32 q1, [r0]827; CHECK-NEXT: vmsr p0, r3828; CHECK-NEXT: vpsel q0, q1, q0829; CHECK-NEXT: vmov r0, r1, d0830; CHECK-NEXT: vmov r2, r3, d1831; CHECK-NEXT: bx lr832entry:833 %c1 = icmp eq <2 x i64> %src1, zeroinitializer834 %c2 = icmp eq <2 x i64> %src2, zeroinitializer835 %sh = shufflevector <2 x i1> %c1, <2 x i1> %c2, <2 x i32> <i32 2, i32 0>836 %s = select <2 x i1> %sh, <2 x i64> %a, <2 x i64> %b837 ret <2 x i64> %s838}839